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    POS-PHY UTOPIA Search Results

    POS-PHY UTOPIA Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    CN-DSUB50PIN0-000 Amphenol Cables on Demand Amphenol CN-DSUB50PIN0-000 D-Subminiature (DB50 Male D-Sub) Connector, 50-Position Pin Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD62PN-000 Amphenol Cables on Demand Amphenol CN-DSUBHD62PN-000 High-Density D-Subminiature (HD62 Male D-Sub) Connector, 62-Position Pin Contacts, Solder-Cup Terminals Datasheet
    CN-DSUB25SKT0-000 Amphenol Cables on Demand Amphenol CN-DSUB25SKT0-000 D-Subminiature (DB25 Female D-Sub) Connector, 25-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD26SK-000 Amphenol Cables on Demand Amphenol CN-DSUBHD26SK-000 High-Density D-Subminiature (HD26 Female D-Sub) Connector, 26-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUB15PIN0-000 Amphenol Cables on Demand Amphenol CN-DSUB15PIN0-000 D-Subminiature (DB15 Male D-Sub) Connector, 15-Position Pin Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD15PN-000 Amphenol Cables on Demand Amphenol CN-DSUBHD15PN-000 High-Density D-Subminiature (HD15 Male D-Sub) Connector, 15-Position Pin Contacts, Solder-Cup Terminals Datasheet

    POS-PHY UTOPIA Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    PMC-971147

    Abstract: POS-PHY ATM format
    Text: COMPATIBILITY SPECIFICATION PMC-Sierra, Inc. POS-PHY Level 2 PMC-971147, ISSUE 5 SATURN-COMPATIBLE INTERFACE FOR POS PHY DEVICES POS-PHY™ SATURN COMPATIBLE


    Original     		PDF PMC-971147, PMC-971147 POS-PHY ATM format

    PMC-1980495

    Abstract: STM-16 STS-48 TSX 017
    Text: PMC-Sierra, Inc. COMPATIBILITY SPECIFICATION POS-PHY Level 3 PMC-1980495, ISSUE 4 SATURN-COMPATIBLE INTERFACE FOR POS PHY DEVICES POS-PHY™ Level 3 SATURN COMPATIBLE


    Original     		PDF PMC-1980495, PMC-1980495 STM-16 STS-48 TSX 017

    implement motorola bts

    Abstract: NPIS64
    Text: Fact Sheet Freescale Semiconductor, Inc. M-2 UTOPIA / POS-PHY ADAPTER REFERENCE DESIGN Freescale Semiconductor, Inc. PRELIMINARY FEATURES • Adapts the C-3e and C-5e Network Processor interfaces to support single-PHY and multiPHY Utopia and POS-PHY L2, 16 bit interfaces


    Original     		PDF OC-12 54-byte 16-bit 52-byte implement motorola bts NPIS64

    CX29704

    Abstract: F155 GR-253 GR-253-CORE
    Text: A CONEXANT BUSINESS OptiPHY™ F155 Quad OC-3/STM-1 ATM/POS PHY CX29704 Four-Channel, 155 Mbps ATM/POS PHY with Clock and Data Recovery, UTOPIA Level 2 and POS Level 2 The CX29704 is an integrated circuit that implements four-channel ATM/Packet over SONET/SDH POS


    Original     		PDF CX29704 CX29704 GR-253-CORE F155 GR-253

    scrambling

    Abstract: CX29704 F155 GR-253 GR-253-CORE mindspeed JTAG ATM circuit diagram
    Text: OptiPHY F155 Quad OC-3/STM-1 ATM/POS PHY CX29704/2/1 Four-Channel CX29704, two-channel CX29702, one-channel CX29701 155Mbps ATM/POS PHY with Clock and Data Recovery The CX2970x is an integrated circuit that implements four-channel ATM/Packet over SONET/SDH POS


    Original     		PDF CX29704/2/1 CX29704, CX29702, CX29701 155Mbps CX2970x GR-253-CORE scrambling CX29704 F155 GR-253 mindspeed JTAG ATM circuit diagram

    POS-PHY ATM format

    Abstract: No abstract text available
    Text: Sertopia Device UTOPIA Serializer TXC-05860 DESCRIPTION • In-band UTOPIA and POS-PHY Level 2 operating modes for cell and packet traffic • UTOPIA Level 2, and POS-PHY operating modes for cell and packet traffic • One UTOPIA port up to 800 Mbit/s


    Original     		PDF TXC-05860 gC-05860-MB POS-PHY ATM format

    8B10B

    Abstract: 8B10B in serial communication
    Text: µPD98441, µPD98442 eTR Utopia/POS-PHY to LVDS Interface Product Letter Description Express Transmitter Receiver for short: eTR is a powerful transceiver chip family designed to deliver reliable full-duplex high-speed point-to-point UTOPIA/POS-PHY data transfer over a serial LVDS link, either via the


    Original     		PDF PD98441, PD98442 PD98441) S16608EE3V0PL00 8B10B 8B10B in serial communication

    STS-192

    Abstract: STS-48 VSC9112
    Text: SONET/SDH IP/ATM Framer and Mapper Framers and Mappers VSC9112 Product Brief Features: System / Packet Interface • 32-bit Industry Compliant POS-PHY-3, Single-PHY Packet Interface • 32-bit Industry Compliant UTOPIA-3, Single-PHY Cell Interface Physical Layer Channelization


    Original     		PDF VSC9112 32-bit STS-48c STM-16c 16-bit STS-192 VSC9112 STS-48

    DMX chip

    Abstract: DMX single chip controller STS-192 STS-48 VSC9142
    Text: SONET/SDH IP/ATM Framer and Mapper VSC9142 Framers and Mappers Product Brief Features: System / Packet Interface • 32-bit Industry Compliant POS-PHY-3, Single-PHY Packet Interface • 32-bit Industry Compliant UTOPIA-3, Single-PHY Cell Interface Physical Layer Channelization


    Original     		PDF VSC9142 32-bit STS-48c STM-16c VSC9142 320-pin DMX chip DMX single chip controller STS-192 STS-48

    LG1627BXC

    Abstract: TADM042G5 TDAT042G5 TRCV012G5 TTRN012G5 IXF1002 IXF440 transmit data through ethernet to fpga by vhdl
    Text: Product Brief June 2001 Gigabit Ethernet/Fast Ethernet POS-PHY Bridge Overview The gigabit Ethernet GbE /fast Ethernet POS-PHY bridge enables system solutions to be created for two different applications. The first application involves transporting GbE frames or 10 Mbits/s/100 Mbits/s


    Original     		PDF Mbits/s/100 PB01-098NCIP PB01-029NCIP) LG1627BXC TADM042G5 TDAT042G5 TRCV012G5 TTRN012G5 IXF1002 IXF440 transmit data through ethernet to fpga by vhdl

    fifo vhdl

    Abstract: POS-PHY pmc OC48 PM5351 PM7325 ep1m20 vhdl code for phy interface
    Text: POS-PHY Level 2 & 3 Compiler MegaCore Functions April 2001 User Guide v0.5.0 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com A-UG-POS-PHY_COMP-0.5.0 POS-PHY Level 2 & 3 Compiler MegaCore Functions User Guide Altera, ACEX, APEX, APEX 20K, MegaCore, MegaWizard, Mercury, OpenCore, Quartus and Quartus II are trademarks and/or


    Original     		PDF

    GR-253-CORE

    Abstract: PM5358 PM5379 PM5382 "network interface cards"
    Text: PM5379 S/UNI 4x155 Release 4-Channel OC-3c ATM and POS Physical Layer Device FEATURES • Provides UTOPIA Level 3 compatible 32-bit wide System Interface clocked up to 104 MHz with parity support for ATM applications. • Provides SATURN POS-PHY Level 3 32-bit System Interface


    Original     		PDF PM5379 4x155 32-bit PM5380 8x155, PM5382 16x155, PM5358 4x622. GR-253-CORE PM5358 PM5379 "network interface cards"

    TSX 47 software

    Abstract: "network interface cards"
    Text: PM5379 S/UNI 4x155 Release 4-Channel OC-3c ATM and POS Physical Layer Device FEATURES • Provides UTOPIA Level 3 compatible 32-bit wide System Interface clocked up to 104 MHz with parity support for ATM applications. • Provides SATURN POS-PHY Level 3 32-bit System Interface


    Original     		PDF PM5379 4x155 GR-253-CORE S/UNI-4X155 PMC-2022055 S/UNI-4x155 TSX 47 software "network interface cards"

    Gigabit Ethernet PHY

    Abstract: PM3386 PM5358 PM5381 PM5382 PM7390
    Text: PM3386 S/UNI -2xGE Dual Gigabit Ethernet Controller PMC-1991223 R4 • Standard OC-48 bandwidth Packet/Cell interface. • Compatible with PMC-Sierra devices supporting POS-PHY Level 3, including: • PM5381 S/UNI®-2488 ATM and POS physical layer device.


    Original     		PDF PM3386 PMC-1991223 OC-48 PM5381 PM5358 -4x622 OC-48c PM7390 S/UNI-MACH-48 PM5382 Gigabit Ethernet PHY PM3386

    XAPP623

    Abstract: No abstract text available
    Text: POS-PHY Level-4 Core v5.0 DS209 August 7, 2002 Product Specification LogiCORE Facts Features • Fully compliant with OIF-SPI4-02.0 System Packet Interface Level-4 SPI-4 Phase 2 standard • Supports POS, ATM, and Ethernet 10 Gbps applications • Delivered through CORE Generator providing easy


    Original     		PDF DS209 OIF-SPI4-02 XAPP623

    GR-253-CORE

    Abstract: PM5358 PM5382
    Text: PM5380 S/UNI 8x155 Released 8-Channel OC-3c ATM and POS Physical Layer Device FEATURES DEVICE INTERNETWORKING Other PMC-Sierra devices that implement the POS-PHY Level 3 interface include: • S/UNI 12xJET • S/UNI 4x622 • S/UNI 2488 • S/UNI 2xGE • S/UNI MACH48


    Original     		PDF PM5380 8x155 12xJET 4x622 MACH48 16x155 PMC-2021288 GR-253-CORE PM5358 PM5382

    Untitled

    Abstract: No abstract text available
    Text: PHAST -12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412 DATA SHEET PRODUCT PREVIEW Line/Path Ring Ports LINE SIDE APPLICATIONS • SDH/SONET add/drop and terminal multiplexers • Linear MS/Line protection


    Original     		PDF PHASTTM-12P STM-4/OC-12 TXC-06412 VC-4-Xc/STS-1/STS-3c/STC-6c/STS9c/STS-12c 16-bit TXC-06412-MB

    g803

    Abstract: No abstract text available
    Text: PHAST-12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412B DATA SHEET PRELIMINARY TXC-06412B-MB, Ed. 3 December 2006 FEATURES • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery and


    Original     		PDF PHAST-12P STM-4/OC-12 TXC-06412B TXC-06412B-MB, VC-4-Xc/STS-1/STS3c/STC-6c/STS-9c/STS-12c g803

    mpa08

    Abstract: 178 09T AU-AIS PMC-971147 GR-253-CORE MPC8260 MPC860 TXC-06412 DSLAM structure MPD13
    Text: PHAST -12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412 DATA SHEET PRODUCT PREVIEW Line/Path Ring Ports LINE SIDE APPLICATIONS • SDH/SONET add/drop and terminal multiplexers • Linear MS/Line protection


    Original     		PDF STM-4/OC-12 TXC-06412 PHAST-12P TXC-06412-MB, mpa08 178 09T AU-AIS PMC-971147 GR-253-CORE MPC8260 MPC860 TXC-06412 DSLAM structure MPD13

    Untitled

    Abstract: No abstract text available
    Text: PHAST -12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412 DATA SHEET PRODUCT PREVIEW Line/Path Ring Ports LINE SIDE APPLICATIONS • SDH/SONET add/drop and terminal multiplexers • Linear MS/Line protection


    Original     		PDF STM-4/OC-12 TXC-06412 VC-4-Xc/STS-1/STS-3c/STC-6c/STS9c/STS-12c TXC-06412-MB,

    Untitled

    Abstract: No abstract text available
    Text: PHAST-12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412B DATA SHEET PRELIMINARY TXC-06412B-MB, Ed. 2 June 2005 FEATURES • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery and


    Original     		PDF PHAST-12P STM-4/OC-12 TXC-06412B TXC-06412B-MB, VC-4-Xc/STS-1/STS3c/STC-6c/STS-9c/STS-12c

    PHAST-12P

    Abstract: 1211 G integrated circuit
    Text: PHAST -12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412 DATA SHEET PRODUCT PREVIEW Line/Path Ring Ports LINE SIDE APPLICATIONS • SDH/SONET add/drop and terminal multiplexers • Linear MS/Line protection


    Original     		PDF STM-4/OC-12 TXC-06412 VC-4-Xc/STS-1/STS-3c/STC-6c/STS9c/STS-12c 16-bit TXC-06412-MB, PHAST-12P 1211 G integrated circuit

    ATM126

    Abstract: No abstract text available
    Text: PHAST-6P Device Dual STM-1/OC-3 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06406B DATA SHEET PRODUCT PREVIEW TXC-06406B-MB, Ed. 1 May 2005 FEATURES APPLICATIONS • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery


    Original     		PDF TXC-06406B TXC-06406B-MB, 16-bit ATM126

    cd 1619

    Abstract: No abstract text available
    Text: PM5357 S/UNI-622-POS PMC-Sierra,Inc. 622 Mbit/s ATM and Packet Over SONET Physical Layer Device FEATURES GENERAL ATM and Packet over SONET/SDH POS OC-12c (622 Mbit/s) PHY Provides on-chip clock and data recovery and clock synthesis Exceeds Bellcore-GR-253 jitter


    OCR Scan     		PDF PM5357 S/UNI-622-POS 100MHz OC-12c Bellcore-GR-253 S/UNI-622-POS cd 1619