M48Z512
Abstract: No abstract text available
Text: M48Z512 M48Z512Y CMOS 512K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 5 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 512K x 8 SRAMs
|
Original
|
PDF
|
M48Z512
M48Z512Y
M48Z512:
M48Z512Y:
PMLDIP32
M48Z512/512Y
M48Z512
|
M48Z512
Abstract: No abstract text available
Text: M48Z512 M48Z512Y CMOS 512K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 5 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with
|
Original
|
PDF
|
M48Z512
M48Z512Y
M48Z512:
M48Z512Y:
PMLDIP32
M48Z512/512Y
M48Z512Y
AI01218
|
M48Z32Y-100PC1
Abstract: m48z32y M48T08-150PC1 PCDIP28 M48Z32-85PC1 m48t12-150 m48t08-150 MK41T56N00 M48T02-120PC1 105v
Text: MEMORIES and SMARTCARD PRODUCTS STATIC RAMS ZEROPOWER SRAM Organis. Speed ns VCC Range Feature Temperature Range (°C) Package M48Z02-120PC1 x8 120 5V + 10/-5% 10 Year Battery Life 0 to 70 PCDIP24 M48Z02-150PC1 x8 150 5V + 10/-5% 10 Year Battery Life 0 to 70
|
Original
|
PDF
|
M48Z02-120PC1
M48Z02-150PC1
M48Z12-150PC1
M48Z02-150PC6
M48Z12-150PC6
M48Z02-200PC1
M48Z12-200PC1
M48Z02-200PC6
M48Z12-200PC6
M48Z58-70PC1
M48Z32Y-100PC1
m48z32y
M48T08-150PC1
PCDIP28
M48Z32-85PC1
m48t12-150
m48t08-150
MK41T56N00
M48T02-120PC1
105v
|
256k x8 SRAM 5V
Abstract: ST95080 rom 1K x8 mod 10 asynchronous ST1335 M28V210 M6280 3.3 -35Y M48Z09
Text: MEMORY PRODUCTS SELECTOR GUIDE A D) OTP Memory - 5V range Type M27C64A M27C256B M87C257 M27C512 M27C1001* M27C1024* M27C2001* M27C405* M27C4001 M27C4002 M27C801 Size 64K 256K 256K 512K 1 Meg 1 Meg 2 Meg 4 Meg 4 Meg 4 Meg 8 Meg Organisation Access Time ns)
|
Original
|
PDF
|
M27C64A
M27C256B
M87C257
M27C512
M27C1001*
M27C1024*
M27C2001*
M27C405*
M27C4001
M27C4002
256k x8 SRAM 5V
ST95080
rom 1K x8
mod 10 asynchronous
ST1335
M28V210
M6280
3.3 -35Y
M48Z09
|
Untitled
Abstract: No abstract text available
Text: M48Z512 M48Z512Y SGS-THOMSON IIIIM J ì ILIì M W IIÈ Ì 4 Mb 512K x 8 ZEROPOWER SRAM NOT FOR NEW DESIGN INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 5 YEARS of DATA RETENTION in the
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
LDIP32
M48Z512Y
M48Z512/512Y
M48Z512A/512AY)
M48Z512,
PMLDIP32-
|
A6527
Abstract: M48Z512
Text: G 7 . SG S-TH O M SO N « [M a i© © « ! M48Z512 M48Z512Y CMOS 512K x 8 ZEROPOWER SRAM • INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 5 YEARS of DATA RETENTION in the
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
M48Z512Y:
M48Z512/512Y
00b12Dl
M48Z512,
PMLDIP32
PMLDIP32
A6527
|
48Z256
Abstract: No abstract text available
Text: / S T SGS-THOMSON M48Z256 M48Z256Y *7 # . CMOS 256K X 8 ZEROPOWER SRAM PRELIMINARY DATA • INTEGRATED LOW POWER SRAM, POWERFAIL CO NTROL CIRCUIT AND BATTERY ■ C O N V E N T IO N A L SRAM O P E R A T IO N ; UN LIMITED W RITE CYCLES ■ 10 YEAR MINIMUM DATA RETENTION IN THE
|
OCR Scan
|
PDF
|
M48Z256
M48Z256Y
48Z256Y
M48Z256,
48Z256
PMLDIP32
|
Untitled
Abstract: No abstract text available
Text: fZ J 7 # ^ M48Z512 M48Z512Y S C S -T H O M S O N RiflQMSEILKOTORQDÊi CMOS 512K X 8 ZEROPOWER SRAM PRELIMINARY DATA • INTEGRATED LOW POWER SRAM, POWER FUL CONTROL CIRCUIT AND BATTERY ■ CONVENTIONAL SRAM OPERATION; UN LIMITED WRITE CYCLES ■ 5 YEAR MINIMUM DATA RETENTION IN THE
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
M48Z512
M48Z512/512Y
M48Z512,
M48K512Y
PMLDIP32
|
Untitled
Abstract: No abstract text available
Text: 5 7 . M48Z512 M48Z512Y S G S -T H O M S O N i y CMOS 512K x 8 ZEROPOWER SRAM • INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 5 YEARS of DATA RETENTION in the ABSENCE of POWER
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
M48Z512:
48Z512Y
M48Z512/512Y
M48Z512,
M48Z512Y
120ns
PMLDIP32
|
Untitled
Abstract: No abstract text available
Text: / = # S C S -TH O M SO N * 7 # . [lfl g (2 [l(Li(gra®iD(gS M48Z512 M48Z512Y CMOS 512K x 8 ZEROPOWER SRAM • INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 5 YEARS of DATA RETENTION in the
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
M48Z512
48Z512Y
PMLDIP32
M48Z512/512Y
M48Z512,
PMLDIP32
|
M48Z512
Abstract: No abstract text available
Text: M 48Z512 M 48Z512Y w , S G S -T H O M S O N k7 #» RitlDÊlMIlilLIKËinSMQtÊS 4 Mb 512K x 8 ZER O PO W ER SRAM N O T F O R N E W D E S IG N INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
M48Z512:
M48Z512Y
M48Z512/512Ywill
M48Z512A/512AY)
M48Z512/512Y
M48Z512,
PMLDIP32
|
M48Z256
Abstract: No abstract text available
Text: /=T SGS-THOMSON ^ 7 # M48Z256 M48Z256Y E iflD M O [lIL Il g W )E !]D i CMOS 256K x 8 ZEROPOWER SRAM • INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS of DATA RETENTION in the
|
OCR Scan
|
PDF
|
M48Z256
M48Z256Y
M48Z256:
M48Z256Y:
M48Z256/256Y
M48Z256,
M48Z256Y
120ns
PMLDIP32
|
Untitled
Abstract: No abstract text available
Text: M48Z256 M48Z256Y / Ç T S G S -1 H 0 M S 0 N Ä T# 5»i]D ®©[l[Li©¥[B S ÍMD©Í CMOS 256K X 8 ZEROPOWER SRAM PRELIMINARY DATA • INTEGRATED LOW POWER SRAM, POWERFAIL CONTROL CIRCUIT AND BATTERY ■ CONVENTIONAL SRAM OPERATION; UN LIMITED WRITE CYCLES
|
OCR Scan
|
PDF
|
M48Z256
M48Z256Y
M48Z256
M48Z256Y
M48Z256,
PMLDIP32
|
Untitled
Abstract: No abstract text available
Text: M48Z512 M48Z512Y SGS-THOMSON 4 Mb 512K x 8 ZEROPOWER SRAM NOT FOR NEW DESIGN INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 5 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT
|
OCR Scan
|
PDF
|
M48Z512
M48Z512Y
48Z512
LDIP32
48Z512Y
M48Z512/512Ywill
M48Z512A/512AY)
70nsce.
|
|