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    PHYSICAL DIMENSION Search Results

    PHYSICAL DIMENSION Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    AD9866BCPZRL Analog Devices 12B Integrated Physical Layer Visit Analog Devices Buy
    AD9866BCPZ Analog Devices 12B Integrated Physical Layer Visit Analog Devices Buy
    ADIN1200BCP32Z Analog Devices Industrial Ethernet 10 100 PHY Visit Analog Devices Buy
    ADIN1200BCP32Z-R7 Analog Devices Industrial Ethernet 10 100 PHY Visit Analog Devices Buy
    ADIN1200CCP32Z Analog Devices Industrial Ethernet 10 100 PHY Visit Analog Devices Buy

    PHYSICAL DIMENSION Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    lem CTSR

    Abstract: LBC5 cwi 1011
    Text: DP83256,DP83257 DP83256 DP83257 PLAYER+ TM Device (FDDI Physical Layer Controller) Literature Number: SNOS673A October 1994 DP83256 56-AP 57 PLAYER a TM Device (FDDI Physical Layer Controller) The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical


    Original     		PDF DP83256 DP83257 DP83257 SNOS673A 56-AP lem CTSR LBC5 cwi 1011

    UL 248-14 e19180

    Abstract: buss gbb5 fuses buss 250v
    Text: SMALL DIMENSION ELECTRONIC FUSES 1/4” x 1-1/4” Fast-Acting Fuses AGC Fast-Acting ABC Fast-Acting GBB Very Fast-Acting Physical Size: Physical Size: Physical Size: 1/4” x 1-1/4” (6.3mm x 32mm) Construction: Glass Tube, Nickelplated brass endcaps.


    Original     		PDF 0000A GBB-10 GBB-12 UL 248-14 e19180 buss gbb5 fuses buss 250v

    te-5005

    Abstract: TXC oscillator Npi pulse transformer ic 7217 DP83924BVCE tp link schematic TL 722 DP83924A
    Text: DP83924B DP83924B Quad 10 Mb/s Ethernet Physical Layer - 4TPHY Literature Number: SNLS033A DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY • Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer


    Original     		PDF DP83924B DP83924B SNLS033A DP83924BVCE 10Mbps 10BASE-T. te-5005 TXC oscillator Npi pulse transformer ic 7217 tp link schematic TL 722 DP83924A

    TXC oscillator

    Abstract: DP83924BVCE mac 97 ab DP8392 DP83924AVCE DP83924B RXI450 rxc 50 NATIONAL DP83924A
    Text: January 1998 DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY General Description Features The Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Transceiver that includes all the circuitry required to interface four Ethernet


    Original     		PDF DP83924BVCE 10Mbps 10BASE-T. 10Base-T control0-180-530 TXC oscillator mac 97 ab DP8392 DP83924AVCE DP83924B RXI450 rxc 50 NATIONAL DP83924A

    BS-28 POWER TRANSFORMER

    Abstract: 10H11 AUTO100 ethernet transformer centre tap
    Text: DP83840A DP83840A 10/100 Mb/s Ethernet Physical Layer Literature Number: SNLS006A DP83840A 10/100 Mb/s Ethernet Physical Layer Features General Description The DP83840A is a Physical Layer device for Ethernet 10BASE-T and 100BASE-X using category 5 Unshielded,


    Original     		PDF DP83840A DP83840A SNLS006A 10BASE-T 100BASE-X DP83223 BS-28 POWER TRANSFORMER 10H11 AUTO100 ethernet transformer centre tap

    NE255

    Abstract: 4-bit even parity checker circuit diagram 74 TTL PACKAGE OUTLINES cwi 1011 CTSR error monitor comparator multiplexer parity fiber optic FM Modulator p832 pin diagram of ic 741 state of the art
    Text: October 1994 DP83256 56-AP 57 PLAYER a TM Device FDDI Physical Layer Controller Y General Description The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data


    Original     		PDF DP83256 56-AP NE255 4-bit even parity checker circuit diagram 74 TTL PACKAGE OUTLINES cwi 1011 CTSR error monitor comparator multiplexer parity fiber optic FM Modulator p832 pin diagram of ic 741 state of the art

    T55 transformer

    Abstract: AMD 7990 mau aui ML2653 AM7990 DP8390 ML2652 ML2652CQ MPC850 transistor h44
    Text: July 2000 ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface


    Original     		PDF ML2652/ML2653 10Base-T ML2652, ML2652 DS2652 T55 transformer AMD 7990 mau aui ML2653 AM7990 DP8390 ML2652CQ MPC850 transistor h44

    Untitled

    Abstract: No abstract text available
    Text: DP83865 DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer Literature Number: SNLS165B DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer General Description The DP83865 is a fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T,


    Original     		PDF DP83865 DP83865 SNLS165B 10BASE-T, 100BASE-TX 1000BASE-T DP83861

    T55 transformer

    Abstract: LTP Cable 10BASE-TMAU
    Text: December 1998 ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface


    Original     		PDF ML2652/ML2653 10Base-T ML2652, ML2652 T55 transformer LTP Cable 10BASE-TMAU

    RGMII 3COM

    Abstract: LF9203 TG1G 1000BASE-T-FD CSP-9-111C2 duplex-led 0x1213 ACSHL-25 DP83865DVH BCM 100BASE full duplex
    Text: DP83865 DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer Literature Number: SNLS165B DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer General Description The DP83865 is a fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T,


    Original     		PDF DP83865 DP83865 SNLS165B 10BASE-T, 100BASE-TX 1000BASE-T RGMII 3COM LF9203 TG1G 1000BASE-T-FD CSP-9-111C2 duplex-led 0x1213 ACSHL-25 DP83865DVH BCM 100BASE full duplex

    Untitled

    Abstract: No abstract text available
    Text: SMART SM5640130UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • January 6, 1997 Datasheet released.


    Original     		PDF SM5640130UUNWGU

    Untitled

    Abstract: No abstract text available
    Text: SMART SM5640440UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • September 3, 1997 Datasheet released.


    Original     		PDF SM5640440UUNWGU

    Untitled

    Abstract: No abstract text available
    Text: SMART SM5640230UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • March 21, 1997 Datasheet released.


    Original     		PDF SM5640230UUNWGU

    Untitled

    Abstract: No abstract text available
    Text: SMART SM5640280UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • June 16, 1997 Datasheet released.


    Original     		PDF SM5640280UUNWGU

    cwi 1011

    Abstract: No abstract text available
    Text: October 1994 DP83256 56-AP 57 PLAYER a TM Device FDDI Physical Layer Controller The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data Interface (FDDI) ANSI X3T9 5 standard


    Original     		PDF DP83256 56-AP DP83257VF VUL160A cwi 1011

    GEC Plessey Semiconductors

    Abstract: GEC Plessey NWK936 NWK918 DS4544
    Text: COMMERCIAL-IN-CONFIDENCE NWK936 MAY 1996 ADVANCE INFORMATION DS4544 -1.0 NWK936 10/100BASE-TX ETHERNET PHYSICAL CODING SUBLAYER The NWK936 implements the Physical Coding Sublayer of the 10 and 100Mb/s Ethernet Physical Layer. It interfaces directly to the GPS NWK918 Transceiver and clock and data


    Original     		PDF NWK936 DS4544 10/100BASE-TX NWK936 100Mb/s NWK918 GEC Plessey Semiconductors GEC Plessey

    t7351

    Abstract: DD231 T7352 T7351B-FC
    Text: Data Sheet January 1994 microelectronics group Lucent Technologies Bell Labs innovations T7351B/T7352 FDDI/TPDDI Physical Layer Devices Features Description • Single-chip FDDI physical layer PHY solution The T7351B FDDI/T7352 TPDDI Physical Layer Devices are single VLSI components that implement


    OCR Scan     		PDF T7351B/T7352 T7352 0D50D2b DG23112 t7351 DD231 T7351B-FC

    bel ms

    Abstract: ST D63 DP83924A
    Text: t ß DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY General Description Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans­


    OCR Scan     		PDF DP83924BVCE DP83924B 10Mbps 10Base-T bel ms ST D63 DP83924A

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Preliminary specification 3-port physical layer interface 1.0 PDI1394P11A 2.0 FEATURES DESCRIPTION The Philips Sem iconductors PDI1394P11A is an IEEE1394-1995 com pliant Physical Layer interface. The PDI1394P11A provides the analog physical layer functions needed to implement a three port


    OCR Scan     		PDF PDI1394P11A 100Mb/s 1394a PDI1394P11A IEEE1394-1995

    Untitled

    Abstract: No abstract text available
    Text: 7 iqot Preliminary Data Sheet May 1993 m A TaT Microelectronics T7351B FDDI Physical Layer Device Features Description • Single-chip FDDI physical layer PHY solution The T7351B FDDI Physical Layer Device is a single VLSI component that implements the complete fiber


    OCR Scan     		PDF T7351B de086 DS93-067LAN

    PE-67583

    Abstract: SF1153 77V106 77V1254 IDT77V106 TLA-6M103
    Text: 3.3V ATM PHY for 25.6 and 51.2 Mbps Features * Performs the PHY-Transmission Convergence TC and Physical Media Dependent (PMD) Sublayer functions of the Physical Layer * Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5 specifications for 25.6 Mbps physical interface


    OCR Scan     		PDF IDT77V106 af-phy-040 11nterface 64-lead 10x10 IDT77V106 PP64-1) 77V106 25Mbps PE-67583 SF1153 77V1254 TLA-6M103

    DP83924AVCE

    Abstract: DP83924B DP83924BVCE Npi pulse transformer
    Text: July, 1998 Semiconductor 1 * DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer 4TPHY General Description Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans­


    OCR Scan     		PDF DP83924BVCE DP83924B 10Mbps 10BASE-T. 10Base-T DP83924AVCE DP83924BVCE Npi pulse transformer

    lem CTSR

    Abstract: cwi 1011 1170S p832 TWISTER T fiber T27 TIMER RR22H-RR23H
    Text: PRELIMINARY October 1994 DP83256/56-AP/57 PLAYER + Device FDDI Physical Layer Controller General Description The DP8 32 56/56-AP/ 5 7 Enhanced Physical Layer Control­ ler (PLAYER + device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data


    OCR Scan     		PDF DP83256/56-AP/57 56/56-AP/ lem CTSR cwi 1011 1170S p832 TWISTER T fiber T27 TIMER RR22H-RR23H

    Untitled

    Abstract: No abstract text available
    Text: April 1997 Micro Linear ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface


    OCR Scan     		PDF ML2652/ML2653 10Base-T ML2652, 10Base-T) ML2652 CA95131