tda 12155
Abstract: PURE SINE WAVE inverter schematic diagram schematic diagram ac-dc inverter inverter PURE SINE WAVE schematic diagram TRANSISTOR KT 838 1 phase pure sine wave inverter schematic sine wave inverter schematic IVT HS 400 5.1 AUDIO AMP TDA 2030 sine wave inverter schematic IVT pure sine wave using TL 494
Text: Revision History - First Edition: March 1999 - Second Edition: February 2000 • Library name change STD111 • All characteristic values are updated with mass product line characteristics. • Add high density compiled memories to second edition. chapter 5
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STD111
tda 12155
PURE SINE WAVE inverter schematic diagram
schematic diagram ac-dc inverter
inverter PURE SINE WAVE schematic diagram
TRANSISTOR KT 838
1 phase pure sine wave inverter schematic
sine wave inverter schematic IVT HS 400
5.1 AUDIO AMP TDA 2030
sine wave inverter schematic IVT
pure sine wave using TL 494
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tda 12155
Abstract: CL 6807 PURE SINE WAVE inverter schematic diagram TDA 7288 verilog code for 10 gb ethernet tda 7257 Modified Booth Multipliers oa31 diode SAMSUNG DATASHEET CHIP CAPACITOR CL-21 capacitor
Text: Revision History - First Edition: March 1999 - Second Edition: February 2000 • Library name change STD111 • All characteristic values are updated with mass product line characteristics. • Add high density compiled memories to second edition. chapter 5
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STD111
tda 12155
CL 6807
PURE SINE WAVE inverter schematic diagram
TDA 7288
verilog code for 10 gb ethernet
tda 7257
Modified Booth Multipliers
oa31 diode
SAMSUNG DATASHEET CHIP CAPACITOR
CL-21 capacitor
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Untitled
Abstract: No abstract text available
Text: TEKS6400 Vishay Semiconductors CMOS Photodetector with Logic Output Description TEKS6400 is a high sensitive CMOS Photo Schmitt Trigger in a sideview plastic package with spherical lens. The integrated IR filter is matched to IR emitters, λ = 950 nm. TSKS5400 is the compatible IR emitter for design of
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TEKS6400
TEKS6400
TSKS5400
08-Apr-05
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S9301
Abstract: S-9301 74195 pin configuration 74195 pin diagram N9300B HA2E 74195 function table N9301
Text: SPEED/PACKAQE AVAILABILITY 54LS F,W FUNCTION TABLE PIN CONFIGURATION EACH GATE 74LS A INPUTS A B L L H H L H L H OUTPUT L H H L H = high level L = low level SWITCHING CHARACTERISTICS PARAMETER* *PLH *PHL 'PLH *PHL FROM (INPUT) Vc c = 5V, TA = 25"C LIMITS
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S54LS670
N74LS670
16-bit
S9301
S-9301
74195 pin configuration
74195 pin diagram
N9300B
HA2E
74195 function table
N9301
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54175
Abstract: No abstract text available
Text: GEC P L E S S E Y M S E M I C O N D U C T O R S DS3594-3.3 54HSC/T Series RADIATION HARD HIGH SPEED CMOS/SOS LOGIC The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high
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DS3594-3
54HSC/T
54/74LS,
Cobalt-60
MIL-STD-883
54xHSC139xxxxx
54175
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pin diagram of ic 74hc4514
Abstract: No abstract text available
Text: / S T S C S -T O O M S O N M54/74HC4514 _ M54/74HC4515 HC4514 4-TO-16 LINE DECODER/LATCH HC4515 4-TO-16 LINE DECODER/LATCH INV. • HIGH SPEED tpD = 24 ns (TYP.) at VCc = 5V ■ LOW POW ER DISSIPATION |c c = 4 (MAX.) at T a = 2 5 °C ■ HIGH NOISE IM M U NITY
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M54/74HC4514
M54/74HC4515
HC4514
4-TO-16
HC4515
M54HCXXXF1
M74HCXXXM1
M74HCXXXB1N
M74HCXXXF1
pin diagram of ic 74hc4514
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AMZ8173
Abstract: AmZ8133
Text: AmZ8133 • AmZ8173 Octal Latches with Three-State Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • 1Bns max data in to data out • Non-inverting AmZ8173, inverting AmZ8133 • Three-state outputs interface directly with bus organized systems
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AmZ8133
AmZ8173
MIL-STD-883
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA • • • • • • • 850 ps M a x. LEN to O u tp u t 825 ps M a x. D to O u tp u t D iffe re n tia l O u tp u ts A s y n c h ro n o u s M a s te r Reset D ual L atch -E na b le s E x te n d e d 100E R ange o f - 4 . 2 V to
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C10E154
C100E154
10E/100E154
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82S52
Abstract: N8250N N8250 S8250F N8250F N82S52F
Text: DESCRIPTION The 8250, 8251 and 8252 are gate arrays for decoding and logic conversion applica tions. The 8250 converts 3 lines of input to a one-of-eight output. The fourth input line D is utilized as an inhibit to allow use in larger decoding networks.
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82S50
82S52
N8250N
N8250
S8250F
N8250F
N82S52F
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bb 9790 schematic diagram
Abstract: DIGITAL GATE EMULATOR USING 8085 TDA 1006 equivalents ami equivalent gates verilog code motor 04S75 M6845 TDB 2915 KM AMI8G34S AMI8G28S
Text: Libraiy Characteristics AMERICAN MICROSYSTEMS INC. AMI8G 0.8 micron CMOS Gale Array AMI’s “AMI8Gx” series of 0.8|im gate arrays exploits a proprietary power grid and track routing architecture on a compact, channelless, sea-of-gates design to provide one
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32-bits.
MG65C02,
MG29C01,
MG29C10,
MG80C85,
MG82Cxx,
MGMC51
Q172SÖ
AMI86
DD17SbD
bb 9790 schematic diagram
DIGITAL GATE EMULATOR USING 8085
TDA 1006 equivalents
ami equivalent gates
verilog code motor
04S75
M6845
TDB 2915 KM
AMI8G34S
AMI8G28S
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ta 8250
Abstract: 8252 Ta 8251 8251 82S52 N82S52N 8251 pin description Applications of 8251 N8250F S8252F
Text: DESCRIPTION The 8250, 8251 and 8252 are gate arrays fo r decoding and logic conversion a p p lic a tions. The 8250 con verts 3 lines of input to a one-of-eight output. The fourth input line D is utilized as an inhibit to allow use in larger decoding netw orks.
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-18mA
82S50
82S52
82S50/S52
ta 8250
8252
Ta 8251
8251
N82S52N
8251 pin description
Applications of 8251
N8250F
S8252F
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Untitled
Abstract: No abstract text available
Text: BUS INTERFACE REGISTERS FEATURES • F unction, P inout and Drive Com patible w ith the FCT, F and Am29821/23/25 Logic ■ FCT-C speed at 6.0ns max. Com'l FCT-B speed at 7.5ns max. (Com'l) ■
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P54/74FCT823AT/BT/CT-P54/74FCT825AT/BT/CT
Am29821/23/25
MIL-STD-883,
821AT
821BT
821CT
823AT
823BT
823CT
825AT
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Untitled
Abstract: No abstract text available
Text: P54/74FCT3821C/D-P54/74FCT3823C/D P54/74FCT3825C/D 3.3 VOLT BUS INTERFACE REGISTERS FEATURES • ESD protection exceeds 2000V ■ Function and Drive Compatible with the Fastest TTL Logic ■ 48 mA Sink Current Com'l , 32 mA (Mil) 15mA Source Current (Com’l), 12 mA (Mil)
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P54/74FCT3821C/D-P54/74FCT3823C/D
P54/74FCT3825C/D
10-Bit
AE1404-2
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S234
Abstract: "amplifier with complementary" 75S24 55S20DM 75S20DC fairchild dtl core memory sense amplifiers
Text: 55/75S20 • 55/75S24 • 55/75S234 DUAL SCHOTTKY CORE MEMORY SENSE AMPLIFIERS F A IR C H IL D LIN EAR IN T E G R A T E D C IR C U IT S GENERAL DESCRIPTION — The 55/75S20 series of Schottky sense amplifiers are designed for use with high-speed core memory systems, where a guaranteed narrow threshold uncertainty of ± 2 .5 mV is guaran
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55/75S20
55/75S24
55/75S234
55/75S20
75S20
75S24
55/75S234
S234
"amplifier with complementary"
55S20DM
75S20DC
fairchild dtl
core memory sense amplifiers
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Untitled
Abstract: No abstract text available
Text: HEF40193B MSI 4-BIT UP/DOWN BINARY COUNTER The H E F 4 0 1 93 B is a 4 -b it synchronous u p /d o w n b in a ry counter. The co u n te r has a co u n t-u p clo ck in p u t C P y , a c o u n t-d o w n c lo ck in p u t (C P q ), an asynchronous parallel load in p u t (P L), fo u r parallel
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HEF40193B
7Z84172
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Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Preliminary specification 16-bit O-type registered transceiver 3-State 74ALVCH16543 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1 A. The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of
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16-bit
74ALVCH16543
74ALVCH16245
74ALVCH16373
74ALVCH16543
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Untitled
Abstract: No abstract text available
Text: DIALI6HT CORP T ' V A 3 1SE D I 5ßiab?2 0003Ö71 T 7 N u m e ric D isp la y w ith integral TTL M S I Circuit Chip w ith C ounter c h a ra c te r height: .2 7 0 " 7 4 5 -0 0 0 9 The display and T T L MSI chip are mounted on a substrate and the assembly is then cast within a nonconductive transparent epoxy.
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Untitled
Abstract: No abstract text available
Text: P54/74FCT3821C/D-P54/74FCT3823C/D P54/74FCT3825C/D 3.3 VOLT BUS INTERFACE REGISTERS Xj FEATURES • ■ ESD protection exceeds 2000V Function and Drive Com patible w ith the Fastest TTL Logic 48 mA Sink Current C om 'l , 32 mA (Mil) 15mA Source Current (C om ’l), 12 mA (Mil)
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P54/74FCT3821C/D-P54/74FCT3823C/D
P54/74FCT3825C/D
AE1604-2
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT4024 MSI 7-STAGE B INA RY RIPPLE COUNTER FEATURES • • TYPICAL Output capability: standard IcC category: MSI GENERAL DESCRIPTION The 74HC/HCT4024 are high-speed Si-gate CMOS devices and are pin compatible w ith the “ 402 4 " o f the "4 0 0 0 B " series. They are specified ¡n
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74HC/HCT4024
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ys 2103
Abstract: No abstract text available
Text: pyp R U co ^ CY54/74FCT821T CY54/74FCT823T CY54/74FCT825T 8/9/10-BIT BUS INTERFACE REGISTERS FEATURES • Function, Pinout and Drive Compatible with the FCT, F and Am29821/23/25 Logic ■ Power-off disable feature ■ Matched Rise and Fall times Fully Compatible with TTL Input and Output
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CY54/74FCT821T
CY54/74FCT823T
CY54/74FCT825T
8/9/10-BIT
Am29821/23/25
823CT
10-Bit
AE1725
ys 2103
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4024 pin configuration
Abstract: 4000B 74HC 74HCT
Text: 74HC/HCT4024 MSI 7-STAGE BINARY RIPPLE COUNTER FE A T U R E S • • TYPICAL O utput capability: standard I q c category: MSI G E N E R A L D E S C R IP T IO N The 74HC/HCT4024 are high-speed Si-gate CMOS devices and are pin compatible with the "4024" of the
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74HC/HCT4024
74HC/HCT4024
4000B"
4024 pin configuration
4000B
74HC
74HCT
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Untitled
Abstract: No abstract text available
Text: P54/74FCT821A/B/C P54/74PCT821A/B/C P54/74FCT823A/B/C (P54/74PCT823A/B/C) P54/74FCT825A/B/C (P54/74PCT825A/B/C) BUS INTERFACE REGISTERS FEATURES • Function, Pinout, and Drive Compatible with the FCT, F Logic, and Am2982l/23/25 Inputs and Outputs Interface Directly with TTL,
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P54/74FCT821A/B/C
P54/74PCT821A/B/C)
P54/74FCT823A/B/C
P54/74PCT823A/B/C)
P54/74FCT825A/B/C
P54/74PCT825A/B/C)
Am2982l/23/25
1817TW
MIL-STD-883,
10-Bit
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Untitled
Abstract: No abstract text available
Text: P54/74PCT821A/B-P54/74PCT823A/B P54/74PCT825A/B BUS INTERFACE REGISTERS IFBEILÔMDMÂIHIY FEATURES • Equivalent to Bipolar Am29821/23/25 Bipolar Registers Buffered Common Clock Enable EN and Asynchronous Clear Input (CLR) ■ Full CMOS Implementation l^ s 48mA (Commercial) and 32mA (Military)
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P54/74PCT821A/B-P54/74PCT823A/B
P54/74PCT825A/B
Am29821/23/25
24-Pin
28-Pad
P54/74PCT820
MIL-STD-883,
10-Bit
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745-0008
Abstract: COUNTER LED bcd Seven-Segment Numeric LED Display with latch TTL "Seven Segment LED Display" Two Digit bcd counter diagram DIALIGHT DIGIT DISPLAY MSI MS-5 1N3064 25CC decade counter digits BCD 16
Text: DIALIGHT CORP 1EE 0 ! T - <//• 3 7 26121.72 0003371 T N u m eric Display with integral TTL MSI Circuit Chip with Counter character height: .270" 7 4 5 -0 0 0 9 The display and T T L MSI chip are mounted on a substrate and the assembly is then cast within a nonconductive transparent epoxy.
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