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    PLX Technology PCI9060

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    PLX Technology PCI9060-3A

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    PLX Technology PCI90603

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    PLX Technology PCI9060ES

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    Bristol Electronics PCI9060ES 28 1
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    PCI9060 Datasheets (12)

    Part ECAD Model Manufacturer Description Curated Type PDF
    PCI9060 Unknown 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS Original PDF
    PCI9060 PLX Technology PCI Bus Master Interface Chip for Adapters and Embedded Systems Original PDF
    PCI9060 PLX Technology PCI Bus Master Interface Chip for Adapters and Embedded Systems Original PDF
    PCI9060ES Unknown 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS Original PDF
    PCI9060ES PLX Technology PCI Bus Master Interface Chip for Adapters and Embedded Systems Original PDF
    PCI9060ES PLX Technology PCI Bus Master Interface Chip for Adapters and Embedded Systems Original PDF
    PCI9060ES PLX Technology PCI Bus Master Interface Chip for Adapters and Embedded Systems Scan PDF
    PCI9060SD Unknown 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS Original PDF
    PCI9060SD PLX Technology PCI bus master interface chip Original PDF
    PCI9060SD PLX Technology PCI Bus Master Interface Chip Original PDF
    PCI9060SD PLX Technology PCI Bus Master Interface Chip for Master and Slave Adapters Scan PDF
    PCI9060SD PLX Technology PCI Bus Master Interface Chip for Master and Slave Adapters Scan PDF

    PCI9060 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MSL260G

    Abstract: MSL-260-G D0806 R0807 T0803 D0802 D0807 RDD0804 D0808 5 pin reset ic ARB
    Text: Using the Intel 80960 CA with the PCI 9060 PCI evaluation board, Schematics PLX TECHNOLOGY PCI9060 Demo Board I/O MAP 06/16/96 PCI Configuration Registers Address BIT Function 0x00000000 0-15 Vendor ID, Allocated to PLX by PCI SIG (Read-only) (Default = 10B5)


    Original     		PDF PCI9060 0x00000000 0x00000002 0x00000004 100ns 200ns 300ns 80960CA) PCLK1-33 MSL260G MSL-260-G D0806 R0807 T0803 D0802 D0807 RDD0804 D0808 5 pin reset ic ARB

    93CS46

    Abstract: 0x00000018 E 32.0000 C 10B5 c code for pci master
    Text: PCI9060/68040 AN July 1995 PCI9060/68040 Application Note VERSION 1.0 _ _ _ Features_ • • • • • • • • PCI9060 bridge between Primary PCI Bus and Intel


    Original     		PDF PCI9060/68040 PCI9060 32-bit PCI9060, 16-bit 93CS46) 93CS46 0x00000018 E 32.0000 C 10B5 c code for pci master

    0x00000010

    Abstract: 0x300000C0 0x0000000b E 32.0000 C 000D 10B5 0x300000C4 0x10000000-0x2FFFFFFF
    Text: PLX Technology PCI9060/68040 DEMO Memory Map 06/24/96 PCI Configuration Registers PCI CFG Offset BIT 0x00000000 0-15 0x00000002 0-15 Function Vendor ID, Allocated to PLX by PCI SIG Read-only (Default = 10B5) Device ID, Allocated by PLX (Read-only) (Default = 9060)


    Original     		PDF PCI9060/68040 0x00000000 0x00000002 0x00000004 16-bit 93CS46) PCI9060 93CS46 0x00000010 0x300000C0 0x0000000b E 32.0000 C 000D 10B5 0x300000C4 0x10000000-0x2FFFFFFF

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 100ns 200ns 300ns PCI9060 STATIC RAM WRITE 68040 , 4 WORDS, ONE WAIT STATE [SWR4_040.TD] (07/10/95) BCLK-30 [6.5,25] LA[2.31], SIZ0,1 [6.5,25] [6.5,25] TS~ [6.5,25] [6.5,25] [6.5,25] [6.5,25] TIP~ R/W [2,7.5] [2,7.5] SRCS~ [1,5] <14.33,> <12.67,>


    Original     		PDF 100ns 200ns 300ns PCI9060 BCLK-30

    16V8H-15

    Abstract: 20-2136J res 10k sip 16V8H-15 pc IC 4020 pulse TRANSFORMER valor res 0402 MSL-260-G-H ic 0808 data sheet 16v8h
    Text: PLX Technology PCI9060 DEMO List of Materials 06/16/96 Description Qty Vendor Vendor Part Reference Designator PCB,PCI9060 DEMO,Rev A IC,PCI9060,PQFP IC,80960CA,33 MHz,PQFP IC,82596CA,33 MHz,PFQP IC,82C503,PLCC IC,16550A,PLCC IC,Static Ram, 32Kx8, 15 nsec, 28 Pin 300 Mil SOJ


    Original     		PDF PCI9060 80960CA 82596CA 82C503 6550A 32Kx8, 256Kx8 NS16550AV 16V8H-15 20-2136J res 10k sip 16V8H-15 pc IC 4020 pulse TRANSFORMER valor res 0402 MSL-260-G-H ic 0808 data sheet 16v8h

    R101

    Abstract: No abstract text available
    Text: 0ns TITLE 50ns 100ns 150ns PCI9060 DRAM REFRESH CYCLE [RFSH.TD] 09/02/95 BCLK-33 [2,11] [2,11] RFSHCLK [1,5] [1,5] RFSHRQ~ CAS_STATE IDLE C9 C10 C11 [1,5] IDLE [1,5] REFRESH~ [1,5] [1,5] CASENL~ [2,7.5] [2,7.5] CASL[0.3]~ [1,5] [1,5] CASENH~ [2,7.5] [2,7.5]


    Original     		PDF 100ns 150ns PCI9060 BCLK-33 R101

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 50ns 100ns 150ns 200ns PCI9060/68040 DIRECT SLAVE STATIC RAM READ, 4 WORDS, NO WAIT STATES [DSRD4.TD] 08/01/95 <8.33,> BCLK-30 [8,20] [8,20] [8,20] [8,20] [8,20] LA[2.31], LBE[0.3] [6,16.5] [6,16.5] ADS~ [6,17] [6,17] LW/R [8,20] [8,20] BLAST~


    Original     		PDF 100ns 150ns 200ns PCI9060/68040 BCLK-30

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 50ns 100ns 150ns 200ns 250ns PCI9060 DIRECT SLAVE INTERLEAVED DRAM 4 WORD WRITE [DSWR4.TD] 08/30/95 BCLK-33 BCLKN-33 [8,20] [8,20] LA[2.31], LBE[0.3] [8,20] [8,20] A0 [8,20] A1 A2 A3 [9,20] [9,20] [9,20] LD[0.31] NEW ADDRESS [9,20] D0 D1 [9,20]


    Original     		PDF 100ns 150ns 200ns 250ns PCI9060 BCLK-33 BCLKN-33

    diode S2

    Abstract: No abstract text available
    Text: 0ns TITLE 100ns 200ns 300ns PCI9060 DIRECT SLAVE STATIC RAM WRITE, 4 WORDS, ONE WAIT STATE [DSWR4.TD] 08/01/95 BCLK-30 [8,20] LA[2.31], LBE[0.3] [6,16.5] [6,16.5] ADS~ [6,17] [6,17] LW/R [8,20] [8,20] BLAST~ [2,7.5] [2,7.5] SRCS~ [1,5] <14.33,> <12.67,>


    Original     		PDF 100ns 200ns 300ns PCI9060 BCLK-30 diode S2

    D0807

    Abstract: C0702 D0801 D0806 R0807 T0803 D0808 D0802 RDD0804 C0705
    Text: PLX Technology PCI9060 Demo Board REV 1 1 2 3 4 5 6 7 8 9 10 11 Schematics 06/16/96 Title Page PCI9060, EEPROM 80960CA CPU Local Bus Control SRAM FLASH EPROM, UART 82596CA Ethernet Controller Ethernet Physical Layer PCI Bus Connector Reset, Test Headers Capacitors, Resistors


    Original     		PDF PCI9060 PCI9060, 80960CA 82596CA U0101 20V8R U0102 PCI9060 D0807 C0702 D0801 D0806 R0807 T0803 D0808 D0802 RDD0804 C0705

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 100ns 200ns 300ns 400ns POWERPC , 1 WORD DRAM READ BY PCI9060 [PCIRD1.TD] 01/23/96 STATE LCLK-25 [5,17] [5,17] LHOLD [8,20] [8,20] [8,20] [8,20] LA[31:2] LBE[3:0] [6,17] [6,17] LW/R [6,13] [6,13] ADS~ [8,16] [8,16] BLAST~ [2,6.5] DRAMCTL STATE


    Original     		PDF 100ns 200ns 300ns 400ns PCI9060 LCLK-25

    68040* part numbering

    Abstract: 93CS46 SR96 L16 eeprom Motorola 68040 Pal programming 10B5
    Text: Go to next Section: Designing a PCI Memory Board Return to Table of Contents Using the Motorola 68040 with the PCI 9060 Schematics etc. PCI9060/68040 AN July 1995 PCI9060/68040 Application Note VERSION 1.0 _ _ _


    Original     		PDF PCI9060/68040 PCI9060 32-bit PCI9060, 100ns 200ns 300ns 68040* part numbering 93CS46 SR96 L16 eeprom Motorola 68040 Pal programming 10B5

    DATA18

    Abstract: No abstract text available
    Text: 0ns TITLE 250ns 500ns 750n POWERPC , 3 WORD WRITE TO DRAM FROM PCI9060 [PCIWR3.TD] 01/23/96 STATE LCLK-25 [5,17] [5,17] LHOLD [9,20] [9,20] LD[31:0] WRITE DATA 1 [8,20] [8,20] LA[31:2] [9,20] [9,20] DATA2 ADDR1 DATA3 [8,20] [8,20] ADDR2 ADDR3 [8,20] [8,20]


    Original     		PDF 250ns 500ns PCI9060 LCLK-25 DATA18

    DT 94

    Abstract: 80960CA
    Text: 0ns TITLE 50ns 100ns 150ns 200ns PCI9060 FLASH EPROM WRITE 80960CA , 1 WORD [PWR_960.TD] (07/12/94) STATE A 3 2 1 D A PCLK1-33 [3,14] [3,14] LA[2.31], LBE[0.3] [3,16] [3,16] LD[0.7] [6,18] [6,18] [6,18] [6,18] [3,18] [3,18] ADS~ LW/R [5,16] [5,16] BLAST~


    Original     		PDF 100ns 150ns 200ns PCI9060 80960CA) PCLK1-33 DT 94 80960CA

    LD31

    Abstract: No abstract text available
    Text: 0ns TITLE 50ns 100ns 150ns 200ns 250ns 300ns POWERPC , 1 WORD READ FROM PCI9060 INTERNAL REGISTERS [PPCRD1.TD] 01/24/96 STATE LCLK-25 [4,15] [4,15] A[6:29] [3,11] [3,11] [3,12] [3,12] [2,12] [2,12] PR/W WBE[0:3] CS1~ [3,10] [3,10 CS9060~ [0,0] [0,0] LA[25:2]


    Original     		PDF 100ns 150ns 200ns 250ns 300ns PCI9060 LCLK-25 CS9060~ LD31

    16v8

    Abstract: 20V8 U0401 286E application PAL 16v8 Transistor Equivalent list u0507 U0404 U1002 U0405
    Text: PLX Technology PCI9060 DEMO 1 2 3 4 5 6 7 PAL List 06/16/96 NAME TYPE REV arb ioctl msel ready reset srctl srwe 20V8-10 20V8-10 20V8-7 16V8-7 16V8-15 16V8-7 16V8-7 1 1 CHKSUM 822A 9d8c 60b8 42dc 20db 4469 286e SHEET REFERENCE 4 4 4 4 10 5 5 U0405 U0402 U0401


    Original     		PDF PCI9060 20V8-10 20V8-7 16V8-7 16V8-15 U0405 U0402 16v8 20V8 U0401 286E application PAL 16v8 Transistor Equivalent list u0507 U0404 U1002 U0405

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 100ns 200ns 300ns 400ns 500ns POWERPC , 1 WORD WRITE TO DRAM FROM PCI9060 [PCIWR1.TD] 01/23/96 STATE LCLK-25 [5,17] [5,17] LHOLD [9,20] [9,20] LD[31:0] WRITE DATA [8,20] [8,20] [8,20] [8,20] LA[31:2] LBE[3:0] [6,17] [6,17] LW/R [6,13] [6,13] ADS~


    Original     		PDF 100ns 200ns 300ns 400ns 500ns PCI9060 LCLK-25

    Y0803

    Abstract: R0801 U0801A Y0802 PU0806 C0801 STI3400 R0806 U0802 R0803
    Text: 1 2 1 7 Y0801 NC VCC GND OUT 3 14 4 5 6 7 8 VCC 8 1 CLK50R 50 MHz R0801 2 CLK50 FOR STI3400 33 A 4 A CLK25R~ 1 PU0801 4 3 D PR 2 CLK25A FOR PCI9060, FIFO 33 U0801A Q R0802 2 5 CLK25R 1 R0803 2 CLK25B FOR MACHS 33 CLK CL Q 2,4,9 3 6 74ACT74 1 PU0802 1 7 B VCC


    Original     		PDF Y0801 CLK50R R0801 CLK50 STI3400 CLK25R~ PU0801 CLK25A PCI9060, U0801A Y0803 U0801A Y0802 PU0806 C0801 STI3400 R0806 U0802 R0803

    E442

    Abstract: U0301 350B E422 U0401
    Text: PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL state machine to allow both words of a long word to be read. Return READY to the PCI9060 for


    Original     		PDF PCI9060 16-bits. U0401-53 U0301-40 E442 U0301 350B E422 U0401

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 250ns 500ns 750ns POWERPC , 4 WORD DRAM READ BY PCI9060 [PCIRD4.TD] 01/23/96 STATE {18,27} LCLK-25 [5,17] [5,17] LHOLD [8,20] [8,20] [8,20] [8,20] LA[31:2] ADDR1 [8,20] ADDR2 ADDR3 ADDR4 [8,20] [8,20] LBE[3:0] 0000 [6,17] [6,17] LW/R [6,13] [6,13]


    Original     		PDF 250ns 500ns 750ns PCI9060 LCLK-25

    80960ca

    Abstract: DT 94
    Text: 0ns TITLE STATE 50ns 100ns 150ns 200ns PCI9060 STATIC RAM READ 80960CA , 4 WORDS, NO WAIT STATES [SRD_960.TD] (07/18/94) A D D D D A <3.1,> <-1,> PCLK1-33 [3,14] [3,14] LA[2.31], LBE[0.3] [6,18] [6,18] ADS~ [3,18] [3,18] LW/R [5,16] [5,16] BLAST~ [3,14]


    Original     		PDF 100ns 150ns 200ns PCI9060 80960CA) PCLK1-33 80960ca DT 94

    Untitled

    Abstract: No abstract text available
    Text: 0ns TITLE 50ns 100ns 150ns 200ns 250ns 300ns PCI9060 DIRECT SLAVE INTERLEAVED DRAM READ, 4 WORDS, WORD 0 FIRST [DSRD4.TD] 08/25/95 <1.65,> BCLK-33 BCLKN-33 [8,20] [8,20] LA[2.31], LBE[0.3] [8,20] [8,20] A0 [8,20] A1 A2 A3 NEW ADDRESS [6,16.5] [6,16.5]


    Original     		PDF 100ns 150ns 200ns 250ns 300ns PCI9060 BCLK-33 BCLKN-33

    doorbell application

    Abstract: No abstract text available
    Text: SECTION 3 FUNCTIONAL DESCRIPTION 3. SECTION 3 - FUNCTIONAL DESCRIPTION 3.1 PCI 9060 Initialization The PCI9060 configuration registers can be programmed by an optional serial EEPROM and/or by a local processor. EEPROM Initialization During serial EEPROM initialization, the PCI9060 response to PCI target accesses is RETRYs. During serial EEPROM


    OCR Scan     		PDF PCI9060 doorbell application

    Untitled

    Abstract: No abstract text available
    Text: BUS OPERATION SECTION 2 2. SECTION 2 - BUS OPERATION 2.1 PCI BUS CYCLES The PCI9060 is PCI Compliant. 2.1.1 PCI Target Command Codes As a target, the PCI9060 allows access to the PCI9060 internal registers and the local bus using the following commands;


    OCR Scan     		PDF PCI9060 PCI9060.