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    PC2700 SPD JEDEC Search Results

    PC2700 SPD JEDEC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMP139AIYAHR Texas Instruments JEDEC DDR5 temperature sensor with 0.5 °C accuracy 6-DSBGA -40 to 125 Visit Texas Instruments Buy
    SN74SSQEA32882ZALR Texas Instruments JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments Buy
    SN74SSQE32882ZALR Texas Instruments JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments
    SN74SSQEB32882ZALR Texas Instruments JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments Buy
    SN74SSQEC32882ZALR Texas Instruments JEDEC SSTE32882 Compliant Low Power 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments Buy

    PC2700 SPD JEDEC Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: NT256D64S88B1G 256MB : 32M x 64 PC2700 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • 32Mx64 Unbuffered DDR DIMM based on 32Mx8 DDR SDRAM • DRAM DLL aligns DQ and DQS transitions with clock transitions • JEDEC Standard 184-pin Dual In-Line Memory Module


    Original     		NT256D64S88B1G 256MB PC2700 184pin DDR333 32Mx8 32Mx64 184-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: NT256D64S88B1G 256MB : 32M x 64 PC2700 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • 32Mx64 Unbuffered DDR DIMM based on 32Mx8 DDR SDRAM • DRAM DLL aligns DQ and DQS transitions with clock transitions • JEDEC Standard 184-pin Dual In-Line Memory Module


    Original     		NT256D64S88B1G 256MB PC2700 184pin DDR333 32Mx8 32Mx64 184-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: NT256D64SH8BAGM 256MB : 32M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT256D64SH8BAGM 256MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 32Mx64 PDF

    NT256D64S88B1G-6K

    Abstract: DDR333 NT256D64S88B1G PC2700 256mb ddr333 200 pin
    Text: NT256D64S88B1G 256MB : 32M x 64 PC2700 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • JEDEC Standard 184-Pin Unbuffered Dual In-Line Memory • Data is read or written on both clock edges Module • DRAM DLL aligns DQ and DQS transitions with clock transitions


    Original     		NT256D64S88B1G 256MB PC2700 184pin DDR333 32Mx8 184-Pin 32Mx64 32Mx8 PC2700 NT256D64S88B1G-6K NT256D64S88B1G 256mb ddr333 200 pin PDF

    DDR266B

    Abstract: DDR333 NT128D64SH4B1G PC2100 PC2700
    Text: NT128D64SH4B1G 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 184-Pin Unbuffered Dual In-Line Memory • Data is read or written on both clock edges Module • DRAM DLL aligns DQ and DQS transitions with clock transitions


    Original     		NT128D64SH4B1G 128MB PC2700 PC2100 184pin DDR333/266 16Mx16 184-Pin 16Mx64 16Mx16 DDR266B DDR333 NT128D64SH4B1G PDF

    Untitled

    Abstract: No abstract text available
    Text: NT128D64SH4B1G 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 184-Pin Unbuffered Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock transitions


    Original     		NT128D64SH4B1G 128MB PC2700 PC2100 184pin DDR333/266 16Mx16 184-Pin 16Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT512D64S8HB1G 512MB : 64M x 64 PC2700 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • 64Mx64 Unbuffered DDR DIMM based on 32Mx8 DDR SDRAM • DRAM DLL aligns DQ and DQS transitions with clock transitions • JEDEC Standard 184-pin Dual In-Line Memory Module


    Original     		NT512D64S8HB1G 512MB PC2700 184pin DDR333 32Mx8 64Mx64 184-pin PDF

    NT128D64SH4BBGM-75B

    Abstract: PC2100 PC2700 DDR266B NT128D64SH4BBGM-6K nanya nt128d64sh4bbgm-75b
    Text: NT128D64SH4BBGM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT128D64SH4BBGM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 16Mx16 NT128D64SH4BBGM-75B DDR266B NT128D64SH4BBGM-6K nanya nt128d64sh4bbgm-75b PDF

    Untitled

    Abstract: No abstract text available
    Text: NT128D64SH4B0GM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT128D64SH4B0GM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 16Mx16 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT256D64SH8BAGM 256MB : 32M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT256D64SH8BAGM 256MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 32Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT512D64S8HB1G 512MB : 64M x 64 PC2700 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • 64Mx64 Unbuffered DDR DIMM based on 32Mx8 DDR SDRAM • DRAM DLL aligns DQ and DQS transitions with clock transitions • JEDEC Standard 184-pin Dual In-Line Memory Module


    Original     		NT512D64S8HB1G 512MB PC2700 184pin DDR333 32Mx8 64Mx64 184-pin PDF

    NT256D64SH8B0GM-75B

    Abstract: NT256D64SH8B0GM DDR266B DDR333 PC2100 PC2700 256mb ddr333 200 pin
    Text: NT256D64SH8B0GM 256MB : 32M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT256D64SH8B0GM 256MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 32Mx64 16Mx16 NT256D64SH8B0GM-75B NT256D64SH8B0GM DDR266B DDR333 256mb ddr333 200 pin PDF

    NT512D64S8HB1G-6K

    Abstract: DDR333 NT512D64S8HB1G PC2100 PC2700
    Text: NT512D64S8HB1G 512MB : 64M x 64 PC2700 Unbuffered DDR DIMM 184pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • JEDEC Standard 184-Pin Unbuffered Dual In-Line Memory • Data is read or written on both clock edges Module • DRAM DLL aligns DQ and DQS transitions with clock transitions


    Original     		NT512D64S8HB1G 512MB PC2700 184pin DDR333 32Mx8 184-Pin 64Mx64 32Mx8 NT512D64S8HB1G-6K NT512D64S8HB1G PC2100 PDF

    DDR266B

    Abstract: DDR333 NT128D64SH4B0GM PC2100 PC2700
    Text: NT128D64SH4B0GM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT128D64SH4B0GM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 16Mx16 DDR266B DDR333 NT128D64SH4B0GM PDF

    Untitled

    Abstract: No abstract text available
    Text: NT512D64S8HB0WM 512MB : 64M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 32Mx8 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT512D64S8HB0WM 512MB PC2700 PC2100 200pin DDR333/266 32Mx8 200-Pin 64Mx64 16Mx16 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT128D64SH4B0GM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT128D64SH4B0GM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT128D64SH4BAGM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT128D64SH4BAGM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT128D64SH4B0GM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT128D64SH4B0GM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 PDF

    NT128D64SH4BAGM

    Abstract: NT128D64SH4BAGM-75B 128MB PC2100 DDR DDR266B PC2100 PC2700
    Text: NT128D64SH4BAGM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges Module SO-DIMM


    Original     		NT128D64SH4BAGM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 16Mx16 NT128D64SH4BAGM NT128D64SH4BAGM-75B 128MB PC2100 DDR DDR266B PDF

    Untitled

    Abstract: No abstract text available
    Text: NT256D64SH8B0GM 256MB : 32M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT256D64SH8B0GM 256MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 32Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT512D64S8HB1G 512MB : 64M x 64 PC2700 Unbuffered DDR DIMM 184-pin Unbuffered DDR DIMM Based on DDR333 32Mx8 SDRAM Features • 64Mx64 Unbuffered DDR DIMM based on 32Mx8 DDR SDRAM • DRAM DLL aligns DQ and DQS transitions with clock transitions • JEDEC Standard 184-pin Dual In-Line Memory Module


    Original     		NT512D64S8HB1G 512MB PC2700 184-pin DDR333 32Mx8 64Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT128D64SH4B0GM 128MB : 16M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT128D64SH4B0GM 128MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 16Mx64 PDF

    PC2100

    Abstract: No abstract text available
    Text: NT256D64SH8B0GM 256MB : 32M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT256D64SH8B0GM 256MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 32Mx64 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT256D64SH8B0GM 256MB : 32M x 64 PC2700 / PC2100 Unbuffered DDR SO-DIMM 200pin Unbuffered DDR SO-DIMM Based on DDR333/266 16Mx16 SDRAM Features • JEDEC Standard 200-Pin Small Outline Dual In-Line Memory • Data is read or written on both clock edges • DRAM DLL aligns DQ and DQS transitions with clock


    Original     		NT256D64SH8B0GM 256MB PC2700 PC2100 200pin DDR333/266 16Mx16 200-Pin 32Mx64 PDF