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    UT61L256CJC-10

    Abstract: UT61L256CJC-12 UT61L256CJC-15 UT61L256CLS-10 Utron Technology
    Text:  UTRON Rev. 1.1 UT61L256C 32K X 8 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 DESCRIPTION Original Sample ready and release Add package 28-pin 300 mil skinny PDIP & Package outline dimension DATE May 4,2001


    Original     		UT61L256C 28-pin P80058 28PIN UT61L256CJC-10 UT61L256CJC-12 UT61L256CJC-15 UT61L256CLS-10 Utron Technology PDF

    UT61L256CJC-10

    Abstract: UT61L256CJC-12 UT61L256CJC-15 UT61L256CLS-10 UT61L256CLS-15E
    Text:  UTRON Rev. 1.1 UT61L256C 32K X 8 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION DESCRIPTION Preliminary Rev. 0.1 Original Rev. 1.0 Sample ready and release Rev. 1.1 1. Add package 28-pin 300 mil skinny PDIP & Package outline dimension 2. Add Extended temperature : -25℃~85℃


    Original     		UT61L256C 28-pin P80058 UT61L256C 28PIN UT61L256CJC-10 UT61L256CJC-12 UT61L256CJC-15 UT61L256CLS-10 UT61L256CLS-15E PDF