Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    P30 N48 Search Results

    P30 N48 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    barnier 8010

    Abstract: N48.315 PM114/93 B65541-D-R30 n48 smd B65651-D-R48 SMD N48 N48 315 B65541D100A33 b65611-D-R48
    Text: Генеральный представитель Epcos по ферритам в России и СНГ СОДЕРЖАНИЕ: 1 Вступление 2 Характеристики материалов 5 3 Сердечники конфигурации P 10


    Original     		PDF

    OAI222

    Abstract: OAI22 ATL35 OAI22224 OAI222H 014748 023414 p6 n60 ATL35/208
    Text: OAI22 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2-input OR into 2-input NAND Truth Table: A A B C | O -X X 0 | 1 1 X 1 | 0 X 1 1 | 0 0 0 1 | 1 ATL55Cells B O OAI22 C VDD! p B P11 p A P7 VDD! p P3 O N10 n n n N30 VSS! N29 VSS! C


    Original     		PDF OAI22 ATL35 ATL55Cells 25degC OAI222 OAI22 OAI22224 OAI222H 014748 023414 p6 n60 ATL35/208

    MB9BF500R

    Abstract: N114 n117 R14 P1F mb9b RTO11 N109 IC021 P30 N48 sck5#
    Text: VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 N51 N52 N53 N54 N55 117 38 X0A 41 X1A 42 INITX 43 MD1 56 MD0 57 X0 58 X1 59 AVSS AVRH AVCC 72 71 70 S 0R C1 100n N119 N118 R20 0R N117 0R R21 4,7uF N43 R17 0R N71 N70 C16 C17 not fitted N41 X0A RESET N42 X1A N57 N58 X0 10p C E


    Original     		PDF MB9BF500R P20/INT05 P21/SIN0 0/INT06 P22/SOT0 P23/SCK0 1/RTO00 P24/RX1 1/INT01 2/RTO01 MB9BF500R N114 n117 R14 P1F mb9b RTO11 N109 IC021 P30 N48 sck5#

    P30 CORE N48

    Abstract: n38n ATL35 latr CMOS GATE ARRAY
    Text: LAT ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: LATCH Truth Table: H D | Q T+1 -0 0 | 0 1 | 1 1 X | Q(T) ATL55Cells H LAT D Q VDD! VDD! p P58 p P53 p P62 D Q n n N59 N52 N63 n VSS! VSS! VDD! N56 n p P57 p P65 VDD! n VDD!


    Original     		PDF ATL35 ATL55Cells 25degC P30 CORE N48 n38n latr CMOS GATE ARRAY

    OAI22

    Abstract: OAI222 orr5 OAI23 ATL60 OAI22224 OAI222H 1314750 014-364
    Text: OAI22 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2 input OR into 2 input NAND Truth Table: A A B C | O -X X 0 | 1 1 X 1 | 0 X 1 1 | 0 0 0 1 | 1 at60Cells B O OAI22 C VDD! p B P11 p A P7 VDD! p P3 O N10 n n n N30 VSS! N29 VSS! C


    Original     		PDF OAI22 ATL60 at60Cells 25degC OAI22 OAI222 orr5 OAI23 OAI22224 OAI222H 1314750 014-364

    P62d

    Abstract: ATL60 1147-000
    Text: LAT ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: LATCH Truth Table: H D | Q T+1 -0 0 | 0 1 | 1 1 X | Q(T) at60Cells H LAT D Q VDD! VDD! p P58 p P53 p P62 D Q n n N59 N52 N63 n VSS! VSS! VDD! N56 n p P57 p P65 VDD! n VDD!


    Original     		PDF ATL60 at60Cells 25degC P62d 1147-000

    XC6200

    Abstract: p61 s43 XC6264 w1p77 w56 transistor BUF C038 N48 pqfp Package Typ P194 B1 121 W97 diode ak38
    Text:  XC6200 Field Programmable Gate Arrays Table Of Contents Features Description Architecture Logical and Physical Organization Additional Routing Resources Magic Wires Global Wires Function Unit Cell Logic Functions Routing Switches Clock Distribution Clear Distribution


    Original     		PDF XC6200 XC6200 XC6216 -2PC84C 84-Pin HT144 144-Pin BG225 225-Pin HQ240 p61 s43 XC6264 w1p77 w56 transistor BUF C038 N48 pqfp Package Typ P194 B1 121 W97 diode ak38

    ATL35

    Abstract: P102 truth table nand gate
    Text: NAN2 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2-input NAND Truth Table: A B | O -0 X | 1 X 0 | 1 1 1 | 0 ATL55Cells B NAN2 O A VDD! p VDD! p P4 P13 O n B N3 n A N10 VSS! / $Revision: 1.35 $


    Original     		PDF ATL35 ATL55Cells 25degC 162ise P102 truth table nand gate

    XC6200

    Abstract: BUF C038 XC6264 xilinx XC6216 PN16 XC6209 XC6216 PW16 XC6000 N16O
    Text: XC6200 FPGA Family  Advanced Product Description Features • Flexible Pin Configuration - All User I/O’s programmable as in, out, bidirect, tristate or open drain. - Configurable pull-up/down resistors - CMOS or TTL logic levels - 8.32-bit CPU interface


    Original     		PDF XC6200 32-bit 220MHz XC6216 -2PC84C -40oC -55oC 125oC 84-Pin TQ144 BUF C038 XC6264 xilinx XC6216 PN16 XC6209 PW16 XC6000 N16O

    0044300

    Abstract: ATL60 P102 3-input NAND gate
    Text: NAN2 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2 input NAND Truth Table: A B | O -0 X | 1 X 0 | 1 1 1 | 0 at60Cells B NAN2 O A VDD! p VDD! p P4 P13 O n B N3 n A N10 VSS! / $Revision: 1.27 $


    Original     		PDF ATL60 at60Cells 25degC 0044300 P102 3-input NAND gate

    XC6200

    Abstract: XC009 PN16 XC6209 XC6216 XC6264 C031 vhdl code up down counter
    Text:  XC6200 Field Programmable Gate Arrays Table Of Contents Features Description Architecture Logical and Physical Organization Additional Routing Resources Magic Wires Global Wires Function Unit Cell Logic Functions Routing Switches Clock Distribution Clear Distribution


    Original     		PDF XC6200 XC6200 XC6216 -2PC84C -40oC 100oC -55oC 125oC 84-Pin HT144 XC009 PN16 XC6209 XC6264 C031 vhdl code up down counter

    N136

    Abstract: n133 MUX8n ATL35 N132 P103 P133 023632 P107N N144
    Text: MUX2 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2:1 MUX Truth Table: S | O -0 | I0 1 | I1 ATL55Cells S MUX2 I0 O I1 VDD! p P14 S n N3 VSS! VDD! p P20 p P23 I0 VDD! n N6 N22 n p P32 VSS! O n VDD! N34 p P16 p P21 I1 n N25 VSS! VDD! N29


    Original     		PDF ATL35 ATL55Cells 25degC Int94 N136 n133 MUX8n N132 P103 P133 023632 P107N N144

    Siemens Ni1000 temperature sensor

    Abstract: n531 QAC22 N9292 LG-Ni1000 QFM3100 triac BT 317 DATASHEET
    Text: System Catalog 2014 The information in this document contains general descriptions of technical options available, which do not always have to be present in individual cases. The required features should therefore be specified in each individual case at the time of closing the contract.


    Original     		PDF

    A7 SMD TRANSISTOR

    Abstract: fnd 503 7-segment 4013 FLIP FLOP APPLICATION DIAGRAMS SMD fuse P110 HP 1003 WA transistor SMD making code GC 1736DPC verilog code for 32 BIT ALU implementation xilinx xc95108 jtag cable Schematic RCL TOKO data
    Text: Data Book The Programmable Logic Data Book Success made simple Click anywhere on this page to continue 9/96 On behalf of the employees of Xilinx, our sales representatives, our distributors, and our manufacturing partners, welcome to our 1996 Data Book, and thank you for your interest in


    Original     		PDF

    P103

    Abstract: P133 ATL60 N132 MUX8n 0020700 P107N 08155 PP201 1251-1-1
    Text: MUX2 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2:1 MUX Truth Table: S | O -0 | I0 1 | I1 at60Cells S MUX2 I0 O I1 VDD! p P14 S n N3 VSS! VDD! p P20 p P23 I0 VDD! n N6 N22 n p P32 VSS! O n VDD! N34 p P16 p P21 I1 n N25 VSS! VDD! N29


    Original     		PDF ATL60 at60Cells 25degC P103 P133 N132 MUX8n 0020700 P107N 08155 PP201 1251-1-1

    G993P1UF

    Abstract: TPS2231 compal ICS9LP306 BCCAS LM358 isl6260 la2841 schematic lcd inverter dell ics954
    Text: A B C D E 1 1 Compal confidential 2 2 Schematics Document Mobile Yonah uFCPGA with Intel Calistoga_GM/PM+ICH7-M core logic 3 3 2006-01-02 REV:1.B 4 4 Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL


    Original     		PDF LA-2841 G993P1UF TPS2231 compal ICS9LP306 BCCAS LM358 isl6260 la2841 schematic lcd inverter dell ics954

    ALC271X

    Abstract: alc271x audio rt8205e RT8205EGQW KB930 kb930qf KB930QF A1 ENE KB930QF A1 LA-6901P RTM890N-631-VB-GRT
    Text: A B C D E Compal Confidential 1 Model Name : P5WE0 File Name : LA-6901P BOM P/N:43 1 Compal Confidential 2 2 P5WE0 M/B Schematics Document Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH Nvidia N12P GS/GV 2010-08-11 3 3 REV:0.1 4 4 Issued Date


    Original     		PDF LA-6901P ALC271X alc271x audio rt8205e RT8205EGQW KB930 kb930qf KB930QF A1 ENE KB930QF A1 RTM890N-631-VB-GRT

    RTL8105E

    Abstract: KB930 rts5137 rts-5137 SY8033BDBC ENE KB9012 la-7201p ISL95831CRZ-T rtl8105 FCBGA989
    Text: A B C D E 1 1 PWWHA 2 Delhi 10RG 2 LA-7201P REV 1.0 Schematic 3 Intel Processor Sandy Bridge / PCH(Cougar Point) 2011-01-31 Rev 1.0 3 4 4 Compal Electronics, Inc. Compal Secret Data Security Classification 2010/09/03 Issued Date Deciphered Date 2012/12/31


    Original     		PDF LA-7201P RTL8105E KB930 rts5137 rts-5137 SY8033BDBC ENE KB9012 ISL95831CRZ-T rtl8105 FCBGA989

    PCI7412

    Abstract: L295N L297N ICS9LPR310BGLF Phoenix BIOS manual f.34 CLEVO 28K1 SST49LF004B-33-4C-NHE ChiMei led epson printer board pm 235
    Text: Preface LCD Computer L295N/L297N Series Service Manual Preface I Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are


    Original     		PDF L295N/L297N 276D110 C60D60 C55D55 MTH276D110B MTH400D130 MTH276D169A MTH276D169B L295N PCI7412 L295N L297N ICS9LPR310BGLF Phoenix BIOS manual f.34 CLEVO 28K1 SST49LF004B-33-4C-NHE ChiMei led epson printer board pm 235

    compal

    Abstract: isl6260crz isl6260 PLC1045P Socket AM2 Compal Electronics skul30-02 la2841 N4 SOT23 TPS2231
    Text: A B C D E 1 1 Compal confidential 2 2 Schematics Document Mobile Yonah uFCPGA with Intel Calistoga_GM/PM+ICH7-M core logic 3 3 2005-07-18 REV:0.3 4 4 Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL


    Original     		PDF PR249 LA-2841 compal isl6260crz isl6260 PLC1045P Socket AM2 Compal Electronics skul30-02 la2841 N4 SOT23 TPS2231

    la2841

    Abstract: ICS9LP306 compal TPS2231 PLC1045P mini pcie connector 52 pin vertical Socket AM2 Compal Electronics G993 samsung electronics ba41
    Text: A B C D E 1 1 Compal confidential 2 2 Schematics Document Mobile Yonah uFCPGA with Intel Calistoga_GM/PM+ICH7-M core logic 3 3 2005-12-15 REV:1.0 4 4 Compal Secret Data Security Classification 2005/03/10 Issued Date 2006/03/10 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL


    Original     		PDF LA-2841 la2841 ICS9LP306 compal TPS2231 PLC1045P mini pcie connector 52 pin vertical Socket AM2 Compal Electronics G993 samsung electronics ba41

    xgold 118

    Abstract: No abstract text available
    Text: Intel Atom Processor S1200 Product Family for Microserver Datasheet, Volume 1 of 2 December 2012 Document Number: 328194-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS


    Original     		PDF S1200 S1200 xgold 118

    N1702

    Abstract: 2N277 2SA63 2N390A L204A 2N408 TFK 940 OC59 2N374 2n1922
    Text: $1.50 Cat. No. SSH-4 TRANSISTOR SUBSTITUTION HANDBOOK by The H ow ard W . Sams Engineering Staff HOWARD W. SAMS & CO., INC. THE BOBBS-MERRILL COMPANY, INC. Indianapolis • New York FIRST EDITION FIRST PR IN T IN G — MARCH, 1961 SECOND PR IN T IN G — MARCH, 1961


    OCR Scan     		PDF 2N34A 2N43A 2N44A 2N59A 2N59B 2N59C 2N60A 2N60B 2N60C 2N61A N1702 2N277 2SA63 2N390A L204A 2N408 TFK 940 OC59 2N374 2n1922

    PJ41

    Abstract: CBA112 diode SKN 100 1P40 HD68POIMO-I Y22V
    Text: H D68P01V07, H D68P01V07-1 HD68P01 MO ,HD68P01 MO-1 IVI O U M icrocom pu ter Unit The HD68P01 is an 8-bit single chip microcomputer unit (M C U ) which significantly enhances the capabilities o f the HM CS6800 family o f parts. It can be used in production sys­


    OCR Scan     		PDF D68P01V07, D68P01V07-1 HD68P01 HMCS6800 HD680I HD6800 PJ41 CBA112 diode SKN 100 1P40 HD68POIMO-I Y22V