MN103 panasonic
Abstract: MN103 intel 8212 data sheet hp 5610 MN10300 MN103S00 PC9800 MN103 assembler E8201 panasonic MN103
Text: MICROCOMPUTER MN10300 MN10300 Series C Compiler User’s Manual Usage Guide Pub.No.13120-050E PanaXSeries is a trademark of Matsushita Electric Industrial Co., Ltd. Sun and SUN OS are registered trademarks of Sun Microsystems, Inc. USA . HP and HP-UX are trademarks of Hewlett-Packard.
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MN10300
MN10300
13120-050E
MN103 panasonic
MN103
intel 8212 data sheet
hp 5610
MN103S00
PC9800
MN103 assembler
E8201
panasonic MN103
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Untitled
Abstract: No abstract text available
Text: N-CHANNEL ENHANCEM ENT M ODE VERTICAL DM OS FET ZVNL120A ISSUE 2 – MARCH 94 FEATURES * 200 Volt VDS * RDS on =10Ω * Low threshold D G APPLICATIONS * Telephone handsets S E-Line TO92 Compatible ABSOLUTE M AXIM UM RATINGS. PA RA M ETER SYM BOL VALUE UNIT
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ZVNL120A
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S2416
Abstract: No abstract text available
Text: S T S 3402 S amHop Microelectronics C orp. AUG .18 2004 N-C hannel E nhancement Mode Field E ffect Trans is tor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m W ) Max R ugged and reliable. 30@ V G S = 10V
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OT-23
OT-23
S2416
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Untitled
Abstract: No abstract text available
Text: S T S 3402 Green Product S amHop Microelectronics C orp. AUG .18 2004 N-C hannel E nhancement Mode Field E ffect Trans is tor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m Ω ) Max R ugged and reliable.
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OT-23
OT-23
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vhdl code for ddr3
Abstract: TSMC 0.18 um CMOS DDR SDRAM HY 7411 pin configuration pin configuration 1K variable resistor repeater 10g passive SAS controller chip sata to usb cable diagram usb to sata cable schematic vhdl code SECDED
Text: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.1 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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TIMER FINDER TYPE 85.32
Abstract: tsmc design rule 40-nm FINDER TYPE 85.32 Texas Instruments Stratix IV EP4S series Power Ref Design 8 tap fir filter verilog FBP BGA
Text: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.4 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.
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Untitled
Abstract: No abstract text available
Text: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.6 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
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EP4SE530
Abstract: hard disk SATA schematic pin configuration 1K variable resistor TSMC 40nm SRAM
Text: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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free transistor equivalent book
Abstract: handbook texas instruments verilog code for twiddle factor ROM add round key for aes algorithm DDR3 "application note" RSEL* "cross reference" texas instruments the voltage regulator handbook DIN 5463
Text: Stratix III Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIII5V1-1.1 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
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higig pause frame
Abstract: verilog code for 128 bit AES encryption OF IC 741 tsmc design rule 40-nm cyclone V
Text: 1. Stratix IV Device Family Overview SIV51001-3.1 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor
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SIV51001-3
40-nm
higig pause frame
verilog code for 128 bit AES encryption
OF IC 741
tsmc design rule 40-nm
cyclone V
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mini PCI express pcb
Abstract: hard disk SATA pcb schematic ATX 2005 schematic diagram mini-lvds source driver 4000 CMOS texas instruments Ethernet transceive 8-port GbE PHY pin number of ic cy 327 handbook texas instruments repeater 10g passive
Text: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.1 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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Untitled
Abstract: No abstract text available
Text: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.5 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.
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tsmc design rule 40-nm
Abstract: No abstract text available
Text: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.2 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.
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Untitled
Abstract: No abstract text available
Text: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.6 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
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Untitled
Abstract: No abstract text available
Text: ICS1494 Integrated Circuit Systems, Inc. Enhanced Video Dot Clock Generator Features Features • Low cost - eliminates need for multiple crystal clock os • 135 MHz Guaranteed Performance • Fast acquisition of selected frequencies cillators in video display subsystems
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ICS1494
ICS1494AN-XXX
ICS1494AM-XXX
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ics1494m
Abstract: No abstract text available
Text: ICS1494 Integrated Circuit Systems, Inc. Enhanced Video Dot Clock Generator Features Features • Low cost - eliminates need for multiple crystal clock os • cillators in video display subsystems 135 MHz Guaranteed Performance • Fast acquisition of selected frequencies
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ICS1494
ICS1494
ICS1494M-XXX
ICS1494N-XXX
ics1494m
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tuner 3402
Abstract: TRANSISTOR SMD MARKING 2 HA SDA34 XP113 smd transistor marking P7
Text: bSE D • ÔE 3 S b OS 0G53554 774 WÊSIZG S IE M E N S SIEMENS A K T I EN GE SE LLS CH AF; GHz PLL with I 2C Bus, In-Lock Detector and four programmable Chip Addresses SDA 3402X Bipolar 1C Preliminary Data Features • 1 - chip system for MPU control I2C bus
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0G53554
3402X
Q67000-A5047
Q67006-A5047
P-DSO-20
P-DSO-20
tuner 3402
TRANSISTOR SMD MARKING 2 HA
SDA34
XP113
smd transistor marking P7
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Untitled
Abstract: No abstract text available
Text: MICRO POWER SYSTEMS INC b lE btmMMM D GDOHßbb m HMPS MP87198 ML CM OS Very Low Power 10-Bit, Analog-to-Digital Converter with 4-Channel Mux Micro Power Systems BENEFITS FEATURES • • • • • 10-Bit Resolution Sampling Rates from <1.5 kHz to 1.0 MHz
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MP87198
10-Bit,
10-Bit
000MB80
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CV04C
Abstract: srt hitachi HM538253 HM538253J-10 HM538253J-7 HM538253J-8 HM538253TT-7 HM538253TT-8 934S2
Text: HM538253 Series Preliminary ^262,144-Word x 8-Bit Multiport CM OS Video RAM 0 HITACHI The HM538253 is a 2-Mbit multiport video R A M equipped with a 256-kwortfx 8-bit dynamic R A M and a 512-word * 8-bit SA M full-sized SA M . Its R A M and SA M operate independently and
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HM538253
144-Word
256-kwordx
512-word
HM534253A
HM538123A
CV04C
srt hitachi
HM538253J-10
HM538253J-7
HM538253J-8
HM538253TT-7
HM538253TT-8
934S2
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MTP2N85
Abstract: MTP2N90 td 3404 ap n1TM transistor 3405 motorola MTM2N85
Text: IM E M O TO RO LA SC X S T R S / R D I b 3 b 7 2 S 4 Q Q f i'n b ö 5 | F M O TO R O LA • SEMICONDUCTOR T E C H N IC A L D A T A MTM2N85 MTM2N90 MTP2N85 MTP2N90 Designer's Data Sheet Power Field Effect Transistor N-Channel Enhancement-Mode Silicon Gate TM OS
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MTM2N85
MTM2N90
MTP2N85
MTP2N90
021SBSC
21A-04
O-220AB
0005KS)
T0-204M
MTP2N90
td 3404 ap
n1TM
transistor 3405 motorola
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Untitled
Abstract: No abstract text available
Text: TM S 3401 LC, NC -512-BIT DYNAMIC SHIFT REGISTER TMS 3402 LC, NC 500-BIT DYNAMIC SHIFT REGISTER features • Two-phase dynamic logic • 5-MHz operation • Directly T T L compatible at input and output • No external resistors required • Low power dissipation - 0.2 mW/bit 1 MHz
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-512-BIT
500-BIT
512-bit
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ct 55r
Abstract: SIS 648 MC3302 MC33023 MC34023 w200m
Text: 367 M C 34023, M C 33023 n. . u — k H z T v ^ ^ — M O S F E T ^ IB S ÍJ -C ^ ^ . 2 A c ^ — ? ? MOT o ^ V ; l/ ta t} o t É lŒ O ^ l h u «, ^ 7 ^ i^ E O /'Ç -y ^r — H 7 M Ô I1 É & T ^cc < £ • V -Y -y W 1? V [Ü B P d g 16tT V 20tl°V Z f = 7 ' ^ ^ -y 7
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MC34023,
MC33023
400kHz
862mW
MC34023)
-40TC~
MC33023)
145-C/W
200mA
200mA
ct 55r
SIS 648
MC3302
MC34023
w200m
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75322
Abstract: lc 5013 NC-512-BIT
Text: TM S 3401 LC. NC -512-BIT DYNAMIC SHIFT REGISTER TMS 3402 LC. NC - 500-B IT DYNAMIC SHIFT REGISTER MOS LSI featu es Tw o -ph a se d y n a m ic lo g ic 5 -M H z o p e ra tio n D ire c tly T T L c o m p a tib le a t in p u t a nd o u tp u t N o e x te rn a l resistors re q u ire d
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NC-512-BIT
500-BIT
512-bit
7S212
75322
lc 5013
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USB B F RA
Abstract: s13 package CY7C6300
Text: fax id: 3402 C Y7C631 01 C Y 7 C 6 3 1 00 PRELIMINARY Universal Serial Bus Microcontroller • USB S pecification C om pliance Features — Con fo rm s to USB 1.5 Mbps Specific atio n, Version 1.0 L o w -c o s t solution for slow-speed USB peripherals such as s up e rm o us e, jo y s tic k , and gamepad
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Y7C631
CY7C63100)
CY7C63101)
USB B F RA
s13 package
CY7C6300
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