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    OPTIMUM RECIEVERS Search Results

    OPTIMUM RECIEVERS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MC10116FNR2 Rochester Electronics LLC MC10116 - Triple Line Receiver (R2 is ) Visit Rochester Electronics LLC Buy
    AM79866AJC-G Rochester Electronics LLC AM79866A - Physical Data Receiver Visit Rochester Electronics LLC Buy
    55142AJ/B Rochester Electronics LLC 55142 - Line Receiver Visit Rochester Electronics LLC Buy
    55154J/B Rochester Electronics LLC 55154 - Line Driver/Receiver Visit Rochester Electronics LLC Buy
    AM79866AJC Rochester Electronics LLC AM79866A - Physical Data Receiver Visit Rochester Electronics LLC Buy

    OPTIMUM RECIEVERS Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    CXE-2022

    Abstract: MARKING RFMD CXE-2022Z InP transistor HEMT optimum recievers 106-172 106172
    Text: CXE-2022Z CXE-2022Z 50MHz to 1000MHz MMIC 75Ω Low Noise Amplifier 50MHz to 1000MHz MMIC 75Ω LOW NOISE AMPLIFIER Package: 2x2 DFN Product Description Features RFMD’s CXE-2022Z is a 75Ω high performance low noise pHEMT MMIC amplifier utilizing a self bias network. The CXE-2022Z is designed to run over a wide 2.7V to 3.3V single supply voltage


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    CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z CXE-2022 MARKING RFMD InP transistor HEMT optimum recievers 106-172 106172 PDF

    CXE2022SR

    Abstract: CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7 CXE2022Z CXE-2022Z amplifier DFN 2x2 MARKING RFMD CXE2022
    Text: CXE-2022Z CXE-2022Z 50MHz to 1000MHz MMIC 75Ω Low Noise Amplifier 50MHz to 1000MHz MMIC 75Ω LOW NOISE AMPLIFIER Package: 2x2 DFN Product Description Features RFMD’s CXE-2022Z is a 75Ω high performance low noise pHEMT MMIC amplifier utilizing a self bias network. The CXE-2022Z is designed to run over a wide 2.7V to 3.3V single supply voltage


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    CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z CXE2022SR CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7 CXE2022Z amplifier DFN 2x2 MARKING RFMD CXE2022 PDF

    RF2817PCBA-410

    Abstract: gps schematic diagram micro SD Vdd schematic diagram bluetooth reciever 101p1
    Text: RF2817 RF2817GPS Low Noise Amplifier with Integrated Input/Output SAW Filters GPS LOW NOISE AMPLIFIER WITH INTEGRATED INPUT/OUTPUT SAW FILTERS Package: Module, 4.5mmx2.2mmx0.975mm Features           VDD Low Noise Figure: 1.80dB


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    RF2817 RF2817GPS 975mm 86dBc 82dBc DS091215 RF2817PCBA-410 gps schematic diagram micro SD Vdd schematic diagram bluetooth reciever 101p1 PDF

    MARKING RFMD

    Abstract: CXE2022Z CXE2022SR CXE-2022Z inp hemt low noise amplifier CXE-2022 CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7
    Text: CXE-2022Z CXE-2022Z 50MHz to 1000MHz MMIC 75 Low Noise Amplifier 50MHz to 1000MHz MMIC 75 LOW NOISE AMPLIFIER Package: 2x2 DFN Product Description Features RFMD’s CXE-2022Z is a 75 high performance low noise pHEMT MMIC amplifier utilizing a self


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    CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z MARKING RFMD CXE2022Z CXE2022SR inp hemt low noise amplifier CXE-2022 CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7 PDF

    Untitled

    Abstract: No abstract text available
    Text: RF2817 RF2817GPS Low Noise Amplifier with Integrated Input/Output SAW Filters GPS LOW NOISE AMPLIFIER WITH INTEGRATED INPUT/OUTPUT SAW FILTERS Package: Module, 4.5mmx2.2mmx0.975mm Features           VDD Low Noise Figure: 1.80dB


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    RF2817 RF2817GPS 975mm 86dBc 82dBc DS091215 PDF

    Untitled

    Abstract: No abstract text available
    Text: CXE-2022Z CXE-2022Z 50MHz to 1000MHz MMIC 75 Low Noise Amplifier 50MHz to 1000MHz MMIC 75 LOW NOISE AMPLIFIER Package: 2x2 DFN Product Description Features RFMD’s CXE-2022Z is a 75 high performance low noise pHEMT MMIC amplifier utilizing a self


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    CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z PDF

    Untitled

    Abstract: No abstract text available
    Text: RF2817 RF2817GPS Low Noise Amplifier with Integrated Input/Output SAW Filters GPS LOW NOISE AMPLIFIER WITH INTEGRATED INPUT/OUTPUT SAW FILTERS Package: Module, 4.5mmx2.2mmx0.975mm Features           VDD Low Noise Figure: 1.80dB


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    RF2817 RF2817GPS 975mm 86dBc 82dBc DS091215 PDF

    Untitled

    Abstract: No abstract text available
    Text: RF2815 RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3 x 2.1 x 1.0 Features „ „ „ „ „ „ „ „ Low Noise Figure: 0.85 dB Typ. High Gain: 13.5 dB High IIP3: +9 dBm


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    RF2815 RF2815GPS RF2815 DS090722 PDF

    Untitled

    Abstract: No abstract text available
    Text: RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter RF2815 Preliminary GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3x2.1x1.0 Features „ „ „ „ „ „ „ „ VDD Low Noise Figure: 0.85dB Typ. High Gain: 13.5dB


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    RF2815GPS RF2815 RF2815 DS090220 PDF

    DS100211

    Abstract: No abstract text available
    Text: RF2815 RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3x2.1x1.0 Features         VDD Low Noise Figure: 0.85dB Typ. High Gain: 13.5dB High IIP3: +9dBm


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    RF2815 RF2815GPS DS100211 DS100211 PDF

    RF2815

    Abstract: optimum recievers RF2185 GPS SAW filter 1200 MHz
    Text: RF2815 RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3x2.1x1.0 Features „ „ „ „ „ „ „ „ VDD Low Noise Figure: 0.9dB Typ. High Gain: 13dB High IIP3: +9dBm


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    RF2815 RF2815GPS RF2815 DS090604 optimum recievers RF2185 GPS SAW filter 1200 MHz PDF

    RF2815

    Abstract: RF2185 HDR1X4 RF2815GPS Bluetooth reciever
    Text: RF2815 RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3x2.1x1.0 Features         VDD Low Noise Figure: 0.85dB Typ. High Gain: 13.5dB High IIP3: +9dBm


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    RF2815 RF2815GPS RF2815 DS100211 RF2185 HDR1X4 RF2815GPS Bluetooth reciever PDF

    YAGEO CHIP RESISTORS instruction

    Abstract: AD9287
    Text: Preliminary Technical Data Quad 12-bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter AD9228 FEATURES FUNCTIONAL BLOCK DIAGRAM Four ADCs in one package Serial LVDS ANSI-644 ,IEEE 1596.3 reduced range link Data and frame clock outputs SNR = 70 dB (to Nyquist)


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    ANSI-644 12-bit, AD9228 MO-220-VKKD-2 48-Lead CP-48-1) AD9228BCPZ-40 AD9228BCPZ-65 AD9228-65EB CP-48 YAGEO CHIP RESISTORS instruction AD9287 PDF

    AD9287

    Abstract: No abstract text available
    Text: Preliminary Technical Data Quad 10-bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter AD9219 FEATURES FUNCTIONAL BLOCK DIAGRAM Four ADCs in one package Serial LVDS ANSI-644 ,IEEE 1596.3 reduced range link Data and frame clock outputs SNR = 61 dB (to Nyquist)


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    10-bit, AD9219 ANSI-644 PR05726-0-9/05 MO-220-VKKD-2 48-Lead CP-48-1) AD9219BCPZ-40 AD9219BCPZ-65 AD9219-65EB AD9287 PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT74SSTUB32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE RANGE 1.8V CONFIGURABLE BUFFER WITH PARITY FEATURES: • • • • • • • • When used in pairs, the C0 input of the first register is tied low and the C0 input of the second register is tied high. The C1 input of both registers


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    IDT74SSTUB32866B 25-bit 14-bit 100mA MIL-STD-883, 200pF, 410MHz 96spect PDF

    DDR2-400

    Abstract: IDT74SSTU32866B 866b
    Text: IDT74SSTU32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST FEATURES: COMMERCIAL TEMPERATURE RANGE IDT74SSTU32866B When used in pairs, the C0 input of the first register is tied low and the


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    IDT74SSTU32866B SSTU32866B SSTU32866B. SSTU32 DDR2-400 IDT74SSTU32866B 866b PDF

    CSPUA877

    Abstract: IDT74SSTUA32866 SSTUA32866
    Text: IDT74SSTUA32866 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST FEATURES: • • • • • • • • • IDT74SSTUA32866 When used in pairs, the C0 input of the first register is tied low and the


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    IDT74SSTUA32866 SSTUA32866 SSTUA32866. 10MHz, SSTUA32 CSPUA877 IDT74SSTUA32866 PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT74SSTUA32866 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST FEATURES: • • • • • • • • • APPLICATIONS: • Along with CSPUA877 DDR2 PLL, provides complete solution for DDR2 DIMMs


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    IDT74SSTUA32866 IDT74SSTUA32866 25-bit 14-bit 100mA MIL-STD-883, 200pF, 410MHz 96-pin 10MHz, PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT74SSTU32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST COMMERCIAL TEMPERATURE RANGE IDT74SSTU32866B When used in pairs, the C0 input of the first register is tied low and the C0 input of the second register is tied high. The C1 input of both registers


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    IDT74SSTU32866B SSTU32866B SSTU32866B. SSTU32 PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT74SSTU32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST FEATURES: COMMERCIAL TEMPERATURE RANGE IDT74SSTU32866B When used in pairs, the C0 input of the first register is tied low and the


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    IDT74SSTU32866B IDT74SSTU32866B 25-bit 14-bit 100mA MIL-STD-883, 200pF, 96-pin CSPU877/A/D DDR2-400 PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT74SSTUA32866 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST 1.8V Operation SSTL_18 style clock and data inputs Differential CLK input Configurable as 25-bit 1:1 or 14-bit 1:2 registered buffer


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    IDT74SSTUA32866 25-bit 14-bit 100mA MIL-STD-883, 200pF, 410MHz 96-pin 10MHz, PDF

    P-VFBGA 49 package

    Abstract: ddr ram optimum recievers smd code a12 HYB18M512160BFX P-VFBGA-60-1
    Text: November 2006 HYB18M512160BFX-7.5 DRAMs for Mobile Applications 512-Mbit DDR Mobile-RAM RoHS compliant Data S heet Rev. 1.10 HYB18M512160BFX 512-Mbit DDR Mobile-RAM HYB18M512160BFX-7.5, , Revision History: 2006-11, Rev. 1.10 Page Subjects major changes since last revision


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    HYB18M512160BFX-7 512-Mbit HYB18M512160BFX 04052006-4SYQ-ZRN3 P-VFBGA 49 package ddr ram optimum recievers smd code a12 HYB18M512160BFX P-VFBGA-60-1 PDF

    HYB18M512

    Abstract: No abstract text available
    Text: . Home > Products > Packages > Green Products > Introduction On 27.01.2003 the European Parliament and the council adopted the directives: 2002/95/EC on the Restriction of the use of certain Hazardous Substances in electrical and electronic


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    2002/95/EC 2002/96/EC 04032006-xxxx-xxxx 18M512160BF 512-Mbit P-VFBGA-60-1 HYB18M512 PDF

    HYB18M512160AF

    Abstract: HYE18M512160AF-7 HYE18M512160AF-8
    Text: P r e l i m i n a r y D a t a S h e e t , V 1. 3 , M ay 2 00 4 H Y B 18 M 5 1 2 1 6 0 A F - 6 H Y E 18 M 5 1 2 1 6 0 A F - 6 H Y B 18 M 5 1 2 1 6 0 A F - 7 . 5 H Y E 18 M 5 1 2 1 6 0 A F - 7 . 5 H Y B 18 M 5 1 2 1 6 0 A F - 8 H Y E 18 M 5 1 2 1 6 0 A F - 8


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    18M512160AF 512-Mbit P-VFBGA-60-1 HYB18M512160AF HYE18M512160AF-7 HYE18M512160AF-8 PDF