NCP5269 D
Abstract: No abstract text available
Text: NCP5269 Synchronous Buck Controller with Auto Power Saving Mode and 2-Bit VID Inputs for System Agent NCP5269 is a synchronous buck controller that is optimized for converting the battery voltage or adaptor voltage into power supply rails required in notebook and desktop system. NCP5269 is designed
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NCP5269
NCP5269/D
NCP5269 D
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Untitled
Abstract: No abstract text available
Text: NCP5269 Synchronous Buck Controller with Auto Power Saving Mode and 2-Bit VID Inputs for System Agent NCP5269 is a synchronous buck controller that is optimized for converting the battery voltage or adaptor voltage into power supply rails required in notebook and desktop system. NCP5269 is designed
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NCP5269
NCP5269/D
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5269A
Abstract: ncp52
Text: NCP5269 Synchronous Buck Controller with Auto Power Saving Mode and 2-Bit VID Inputs for System Agent NCP5269 is a synchronous buck controller that is optimized for converting the battery voltage or adaptor voltage into power supply rails required in notebook and desktop system. NCP5269 is designed
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NCP5269
NCP5269/D
5269A
ncp52
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Untitled
Abstract: No abstract text available
Text: CAT5269 Dual Digitally Programmable Potentiometers DPP with 256 Taps and 2-wire Interface FEATURES DESCRIPTION Four linear taper digitally programmable potentiometers The CAT5269 is two digitally programmable poten– tiometers (DPPs™) integrated with control logic and
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CAT5269
24-lead
MD-2123
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Untitled
Abstract: No abstract text available
Text: CAT5269 Dual Digitally Programmable Potentiometers DPP with 256 Taps and 2-wire Interface FEATURES DESCRIPTION Four linear taper digitally programmable potentiometers The CAT5269 is two digitally programmable poten– tiometers (DPPs™) integrated with control logic and
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CAT5269
24-lead
MD-2123
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CAT5259
Abstract: CAT5269 CAT5269WI-00-T1 CAT5269WI-50 CAT5409 MS-013
Text: CAT5269 Dual Digitally Programmable Potentiometers DPP with 256 Taps and 2-wire Interface FEATURES DESCRIPTION Four linear taper digitally programmable potentiometers The CAT5259 is two digitally programmable poten– tiometers (DPPs™) integrated with control logic and
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CAT5269
CAT5259
MD-2123
CAT5269
CAT5269WI-00-T1
CAT5269WI-50
CAT5409
MS-013
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Untitled
Abstract: No abstract text available
Text: CAT5269 Dual Digitally Programmable Potentiometers DPPt with 256 Taps and 2-wire Interface http://onsemi.com Description The CAT5269 is two Digitally Programmable Potentiometers (DPPst) integrated with control logic and 18 bytes of NVRAM memory. Each DPP consists of a series of resistive elements connected
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CAT5269
CAT5269/D
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CAT5269
Abstract: CAT5259 CAT5269WI-00-T1 CAT5269WI-50-T1 CAT5409 MS-013
Text: CAT5269 Dual Digitally Programmable Potentiometers DPP with 256 Taps and 2-wire Interface FEATURES DESCRIPTION Four linear taper digitally programmable potentiometers The CAT5269 is two digitally programmable poten– tiometers (DPPs™) integrated with control logic and
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CAT5269
CAT5269
MD-2123
CAT5259
CAT5269WI-00-T1
CAT5269WI-50-T1
CAT5409
MS-013
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E42008
Abstract: Potentiometer datasheet mil normal size CAT5259 CAT5269 CAT5269WI-50 CAT5409 MS-013
Text: CAT5269 Dual Digitally Programmable Potentiometers DPP with 256 Taps and 2-wire Interface FEATURES DESCRIPTION Four linear taper digitally programmable potentiometers The CAT5269 is two digitally programmable poten– tiometers (DPPs™) integrated with control logic and
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CAT5269
CAT5269
MD-2123
E42008
Potentiometer datasheet mil normal size
CAT5259
CAT5269WI-50
CAT5409
MS-013
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CAT5259
Abstract: CAT5269 CAT5409
Text: H CAT5269 EE GEN FR ALO Dual Digitally Programmable Potentiometers DPP with 256 Taps and 2-wire Interface LE A D F R E ETM FEATURES • Two linear taper digitally programmable poten- ■ Automatic recall of saved wiper settings at tiometers power up ■ 256 resistor taps per potentiometer
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CAT5269
24-lead
CAT5259
CAT5269
CAT5409
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PF412
Abstract: STM8S105K STM8S105XX 5201H STM8S
Text: STM8S105xx Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C Preliminary Data Features Core • ■ 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline LQFP48 7x7 LQFP44 10x10
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STM8S105xx
10-bit
LQFP48
LQFP44
10x10
LQFP32
VFQFN32
PF412
STM8S105K
STM8S105XX
5201H
STM8S
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STM8S903
Abstract: 903K3 5401 DM stm8s903k STM8 S 903 K 3 T 6 C TR pm0051 UM04 ic 8038 STM8 CPU programming manual switching regulator ic LM 5304
Text: STM8S903K3 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, 1 Kbyte RAM, 640 bytes EEPROM,10-bit ADC, 2 timers, UART, SPI, I²C Preliminary data Features Core • ■ 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline LQFP32 7x7 VFQFPN32 5x5
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STM8S903K3
10-bit
LQFP32
VFQFPN32
16-bit
STM8S903
903K3
5401 DM
stm8s903k
STM8 S 903 K 3 T 6 C TR
pm0051
UM04
ic 8038
STM8 CPU programming manual
switching regulator ic LM 5304
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5401 DM transistor
Abstract: No abstract text available
Text: STM8S003K3 STM8S003F3 Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 27 external interrupts on 6 vectors LQFP32 7x7
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STM8S003K3
STM8S003F3
10-bit
LQFP32
TSSOP20
16-bit,
UFQFPN20
DocID018576
5401 DM transistor
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transistor equivalent 505a
Abstract: REGULATOR S 812 50cc STM8S103F WFQFPN pwm example sTM8s YL 1500 AFR7
Text: STM8S103K3 STM8S103F3 STM8S103F2 Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C Preliminary Data Features Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline ■ Extended instruction set
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STM8S103K3
STM8S103F3
STM8S103F2
10-bit
LQFP32
VFQFN32
TSSOP20
WFQFN20
transistor equivalent 505a
REGULATOR S 812 50cc
STM8S103F
WFQFPN
pwm example sTM8s
YL 1500
AFR7
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SCL 1058
Abstract: cog S1D15 7409 voltage regulator
Text: S1D15710 Series Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind aristing out of any inaccuracies contained
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S1D15710
E-08190
SCL 1058
cog S1D15
7409 voltage regulator
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STM8S
Abstract: 5401 DM transistor STM8S003F3 UFQFPN20-pin PWM generation STM8s stm8s003 STM8S003K3 STM8S00 5401 DM STM8 CPU programming manual
Text: STM8S003K3 STM8S003F3 Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 27 external interrupts on 6 vectors LQFP32 7x7
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STM8S003K3
STM8S003F3
10-bit
LQFP32
TSSOP20
UFQFPN20
16-bit,
16-bit
DocID018576
STM8S
5401 DM transistor
STM8S003F3
UFQFPN20-pin
PWM generation STM8s
stm8s003
STM8S00
5401 DM
STM8 CPU programming manual
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stm8s003
Abstract: STM8S003F3 STM8S003F STM8S003K3 5401 DM transistor UFQFPN20-pin stm8s00 5401 DM transistor equivalent 505a PWM generation STM8s
Text: STM8S003K3 STM8S003F3 Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 27 external interrupts on 6 vectors LQFP32 7x7
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STM8S003K3
STM8S003F3
10-bit
LQFP32
TSSOP20
UFQFPN20
16-bit,
16-bit
DocID018576
stm8s003
STM8S003F3
STM8S003F
5401 DM transistor
UFQFPN20-pin
stm8s00
5401 DM
transistor equivalent 505a
PWM generation STM8s
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CD4520BCN
Abstract: No abstract text available
Text: CD4518BM/CD4518BC, CD4520BM/CD452QBC National 4HmSemiconductor CD4518BM/CD4518BC, CD4520BM/CD4520BC Dual Synchronous Up Counters General Description The CD4518BM/CD4518BC dual BCD counter and the CD4520BM/CD4520BC dual binary counter are imple mented with complementary MOS CMOS circuits con
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CD4518BM/CD4518BC,
CD4520BM/CD452QBC
CD4520BM/CD4520BC
CD4518BM/CD4518BC
54C/74C
AN-90.
CD4520BM/CD4520BC
CD4520BCN
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Untitled
Abstract: No abstract text available
Text: W T E X A XR-15/25/3543 R Power Supply Output Supervisory Circuit GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM The XR-1543/2543/3543 are monolithic inlegrated cir cuits that contain all the functions necessary to monitor and control the output of a power supply system. In
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XR-15/25/3543
XR-1543/2543/3543
16-Pin
XR-1543
XR-2543
XR-1568M
XR-1568/XR-1468C
XR-1468/1568
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pml 003 am
Abstract: ic pml 003 am OP-64 photomultiplier tube operational amplifier discrete schematic 4012r OP-64E
Text: OP-64 PMÏ HIGH-SPEED,WIDE BANDWIDTH OPERATIONAL AMPLIFIER A VCL> 5) FEATURES GENERAL DESCRIPTION • • • • • • • • • • The OP-64 is a high-performance monolithic operational ampli fier that combines high speed and wide bandwidth with low
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OP-64
30V/ns
100ns
80MHz
6666667E-3
5157E5
006E-3
1E-15)
pml 003 am
ic pml 003 am
OP-64
photomultiplier tube
operational amplifier discrete schematic
4012r
OP-64E
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pmi op 02 z
Abstract: P64AZ E63216 ZR12
Text: OP-64 PMÏ HIGH-SPEED,WIDE BANDWIDTH OPERATIONAL AMPLIFIER A VCL> 5) M o n o lit h h s I FEATURES GENERAL DESCRIPTION • High Slew Rate. 130V/(is Min The O P -64 is a high-perform ance m onolithic operational a m p li
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OP-64
100ns
OP-64
pmi op 02 z
P64AZ
E63216
ZR12
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U24A
Abstract: No abstract text available
Text: LH543601/11 PRODUCT PREVIEW 256 x 36 x 2 / 512 x 36 x 2 BiFIFOs FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 15/20/25/30/35 ns The LH543601/11 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and
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LH543601/11
LH5420
36-bit/512
36-bit
36/18/9-bit
LH543601/11
132-Lead,
PQFP132-P-S950)
120-Lead,
U24A
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D2SB 73
Abstract: No abstract text available
Text: 256 x 36 x 2 /512 x 36 x 2 BiFIFOs FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 15/20/25/30/35 ns The LH543601/11 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and
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LH5420
36-bi1/512x
36-bit
18/9-bit
LH543601/11
132-Lead,
PQFP132-P-S950)
120-Lead,
PGA120-C-S1360)
D2SB 73
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Untitled
Abstract: No abstract text available
Text: SSI 32P4782A SiliconMkms 100 Mbit/s Read Channel Device A TDK G roup/C om pany Advance Information January 1995 DESCRIPTION FEATURES The 32P 4782A device is a high perform ance BiCM OS single chip read channel 1C that, together with the 32D 4680 tim e base generator, contains allthe functions
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32P4782A
A253Tb5
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