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    pic16f876 usart assembly code example

    Abstract: PIC16f876 usart init example p16F876 mastri2c.inc 16F873 PIE1 A8085 temperature MPASM ADM9240 C103
    Text: Pentium III Processor Active Thermal Management Techniques Application Note August 2000 Order Number: 273405-001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C - FEBRUARY 1993 - REVISED FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Input-Ready, Output-Ready, and Half-Full Flags


    OCR Scan     		PDF SN74ACT7881 SCAS227C SN74ACT7882, SN74ACT7884, SN74ACT7811 50-pF 68-Pin 80-Pln DO-D17

    Untitled

    Abstract: No abstract text available
    Text: ICS5340 GENDAC Integrated Circuit Systems, Inc. 16-Bit Integrated Clock-LUT-DAC General Description Features The ICS5340 GENDAC is a combination of dual p ro ­ gram m able clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit


    OCR Scan     		PDF ICS5340 16-Bit ICS5340 18-bit 15-bit, 24bit ICS5340V

    TAG L7

    Abstract: fpu coprocessor PR31 PR3400 PR3000A mps 1136 TAG 93
    Text: PaceMips" PR3400N CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR FEATURES • CPU and FPA in a monolithic VLSI package ■ 32-BIT RISC Processor PaceMips PR3000A that contains thiity-two general purpose 32-bit registers ■ On-Chip Memory Management Unit provides fast


    OCR Scan     		PDF PR3400N 32-BIT PR3000A) 256KBytes PR3010A) PR3400N- TAG L7 fpu coprocessor PR31 PR3400 PR3000A mps 1136 TAG 93

    ITE 8721

    Abstract: fnd 503 7-segment TAA 2761 A 486 motherboard schematic 3860S 486dx isa bios pin assignment RAS 0510 cxd 9897 tn ti77 k244
    Text: ISA/486 C H |p g . CepyTlgtt N ette S o t t r a e C o p y ñ f tt O 1962, a * « * d T e d » a i e s i e * . l w x M t o n i I C o p y r i i h t O 1992 . Q ñ p » » d T c c t n o f a p B » , ! ^ . A B SIduR am i Poned ib UJ5A. Tw dw u U t h w lw lgim iil


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    ICS5300

    Abstract: FBIR1
    Text: ICS5300 GENDAC Integrated A Circuit Systems, Inc. Preliminary 8-bit Integrated Clock-LUT-DAC General Description Features The ICS5300 GENDAC is a combination of dual program ­ m able clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit pseudo


    OCR Scan     		PDF ICS5300 18-bit 15-bit, 16-bit 24-bit ICS5300V FBIR1

    AT40498

    Abstract: No abstract text available
    Text: AT40498 Features • One-Chip PC/AT Compatible Core Logic Controller for 80486 Systems Operating Up to 66 MHz. One 208-Pin Quad Flatpack, Sub-Micron CMOS Technology Direct Mapped Write-Back Cache Controller with Burst Fill Programmable 2-1-1-1,3-1-1-1,2-2-2-2 and 3-2-2-2 Cache Burst Cycles


    OCR Scan     		PDF AT40498 208-Pin 16-Bit AT40498 AT40498-25 AT40498-33 AT40498-50

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE 4 MEG X 64 DRAM SODIMM M IC R O N I TF.CHNOLOOY, INC. SMALL-OUTLINE DRAM MODULE MT4LDT464H X S FEATURES PIN ASSIGNMENT (Front View) • JEDEC- and industry-stand ard pinout in a 144-pin, sm all-outline, dual in-line m em ory m odule (DIMM) • 32MB (4 M eg x 64)


    OCR Scan     		PDF MT4LDT464H 144-pin, 096-cycle 256ms

    schematic diagram cga to vga converter

    Abstract: mda to vga converter schematic diagram cga to vga 640x400 el display cga ega to vga converter cga to vga circuits plasma 640x400 schematic diagram RGB to vga converter cga to vga converter circuits cga to vga converter
    Text: S-M 0 S SYSTEMS INC 5bE J> m 7^32^0^ DDD1573 0T7 H S F1 0 SPC8100 LOW POWER LCD/CRT VGA CONTROLLER • DESCRIPTION The SPC8100Foa is a single chip multi-function Low Power LCD & CRT VGA Controller with an integrated RAMDAC and Liquid Crystal Display interface. The controller's unique architecture allows a fully VGA


    OCR Scan     		PDF DDD1573 SPC8100 SPC8100Foa 640x480 schematic diagram cga to vga converter mda to vga converter schematic diagram cga to vga 640x400 el display cga ega to vga converter cga to vga circuits plasma 640x400 schematic diagram RGB to vga converter cga to vga converter circuits cga to vga converter

    TA73G8P

    Abstract: T6668 mioz3 T70 No3 T6668-3 T6668-16 256KD T6668-6 F/TA73G8P dSMC
    Text: b4E » • 00EMTM2 TOSHIBA 1. S i b WÊTQS3 UC/UP GENERAL The T6668 is a single chip CMOS LSI for voice recording and reproducing using the ADM (Adaptive Delta Modulation) system. When a dynamic RAM is used as a voice data memory and an audio circuit including a microphone, speaker, amplifier, etc. is externally connected, a voice


    OCR Scan     		PDF 00E4T42 T6668 64Kbit of256Kbit. 16phrases. T6668-51 25MAX T6668-52 TA73G8P mioz3 T70 No3 T6668-3 T6668-16 256KD T6668-6 F/TA73G8P dSMC

    80386 microprocessor pin out diagram

    Abstract: microprocessor 80386 pin out diagram block diagram of 80386 microprocessor 80386 microprocessor architecture 80386 microprocessor interface keyboard monitor gigabyte MOTHERBOARD CIRCUIT diagram MA intel 80386 motherboard, 80386 microprocessor functional block diagram 80386 microprocessor interface keyboard pin out of 80386 microprocessor
    Text: Advance Information FE6010 DMA and Channel Control Logic Completely compatible with the IBM Personal □ Micro Channel* Arbitration Control Logic System/2* Models 70 and 80 □ Functionality equivalent to two 8237 DMA con­ Configurable for systems based on the 80386


    OCR Scan     		PDF FE6010 FE6500) 80386SX 80387/80387SX 132-Lead FE6010 FE6500 80386 microprocessor pin out diagram microprocessor 80386 pin out diagram block diagram of 80386 microprocessor 80386 microprocessor architecture 80386 microprocessor interface keyboard monitor gigabyte MOTHERBOARD CIRCUIT diagram MA intel 80386 motherboard, 80386 microprocessor functional block diagram 80386 microprocessor interface keyboard pin out of 80386 microprocessor

    circuit TOP 242 PN

    Abstract: SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ACT7884 7s26a
    Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS2 2 7 B - FE BH UA HY 1 9 9 3 - REVISED O CTO BER 1994 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Read and Write Operations Can Be Synchronized to Independent System


    OCR Scan     		PDF SN74ACT7881 SCAS227B 1993-REVISED SN74ACT7882, SN74ACT7884, SN74ACT7811 50-pF 68-Pin 80-Pin D0-D17 circuit TOP 242 PN SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ACT7884 7s26a

    C1951

    Abstract: ICS53
    Text: ICS5340 GENDAC Integrated Circuit Systems, Inc. 16-Bit Integrated Clock-LUT-DAC General Description Features The ICS5340 GENDAC is a combination of dual pro­ gram m able clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit


    OCR Scan     		PDF ICS5340 16-Bit 18-bit 15-bit, 24bit ICS5340V Q00165B C1951 ICS53

    518221

    Abstract: No abstract text available
    Text: O K I Semiconductor M SM 518221 262,214-Word x 8-Bit Field Memory DESCRIPTION The OKI MSM518221 is a high performance 2-Mbit, 256K x 8-bit, Field Memory. It is designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies


    OCR Scan     		PDF 214-Word MSM518221 TheMSM518221 MSM518221 518221

    Untitled

    Abstract: No abstract text available
    Text: HY5216256 Series -HYUNDAI 256Kx 16-bit Video RAM with 2CAS Introduction Overview The 4megabit Video RAM is an application specific memory device designed for graphics applications. It comprises a 256k x16 DRAM memory array interfaced to a 256 x16 Serial Access Memory SAM , or register.


    OCR Scan     		PDF HY5216256 256Kx 16-bit 16bits 4b750Ã 1VC01-00-MAY95 525mil 64pin 4b750flÃ

    cd 1191 acb

    Abstract: crystal oscillator 8mhz ntk tl38a 82C356 SI-111J CS82310 387DX WK2C mip 2F3 82C351
    Text: PEAK/DM Data Book February 1991 Copyright Notio« Software Copyright ê 1991, CHIPS and Technologies, Inc. Manual Copyright 1991, CHIPS and Technologies, Inc. All Rights Reserved. P tizüed in U.S.A. Trademarks PEAK , PEAK/DM™ and PEAK/5X™ are trademarks ofCHIPS and Technologies,


    OCR Scan     		PDF CS82310 386DXâ 387DXâ 9513d -DB04 012004-0M cd 1191 acb crystal oscillator 8mhz ntk tl38a 82C356 SI-111J 387DX WK2C mip 2F3 82C351

    f82c235

    Abstract: a19t 82C765 82C235 1NTC0 LG lcd tv tuner 80286 microprocessor schematics 82C601 82c710 sues 1132
    Text: 82C235 System Controller $ ' >"•' fipÉlI «V M M V // S A V A A >V * A * ^ÿV IV fWJ V ÿ . # v . . v K M ^ 0v . 4 v w v v W/ s Single CHIP 286 AT m fÊ P R E L I M I / N A R Y CH!PS* Copyright Nolle* Manual Copyright C 1991, CHIPS aad Technologies. Ine.


    OCR Scan     		PDF 82C235 C1991, -MEMCS16 82C235 408-434-060Q f82c235 a19t 82C765 1NTC0 LG lcd tv tuner 80286 microprocessor schematics 82C601 82c710 sues 1132

    block diagram of 80386 microprocessor

    Abstract: 80386SX microprocessor pin out diagram pvga1a 80387
    Text: WESTERN DIGITAL CORP EIE D • “1710520 000blS3 b ■ T-sl*h-\0\ Advance Information FE6010 DMA and Channel Control Logic Completely compatible with the IBM Personal □ Micro Channel* Arbitration Control Logic System/2* Models 70 and 80 □ Functionality equivalent to two 8237 DMA con­


    OCR Scan     		PDF 000blS3 FE6010 FE6500) 80386SX 80387/80387SX 132-Lead FE6010 block diagram of 80386 microprocessor 80386SX microprocessor pin out diagram pvga1a 80387

    Untitled

    Abstract: No abstract text available
    Text: MOSEL- VITEUC M S76502A 2 5 6 x 16 B I-D IR E C TIO N A L F IFO W ITH P A R IT Y G ENER A TO R /C H EC K ER Features Description • ■ ■ ■ The MS76502A is an asynchronous 256 x 16 BiFlFO using a dual port RAM based architecture. The MS76502 has two 16-bit bi-directional data


    OCR Scan     		PDF S76502A 16-bit 25MHz 33MHz 52-pin MS76502A MS76502 S76502A MS76502A-25JC

    CH8398

    Abstract: CH8398A STG1703 TQD4133 stg170
    Text: CH8398A CHRONTEL True-Color ChronDAC with 16-bit Interface Features Description • 16-bit pixel bus interface On-chip clock doubler Three high speed 8-bit 110/135 MHz DACs Three high speed 256 x 6-bit color palette RAMs Compatible with ATT20C498 display modes


    OCR Scan     		PDF CH8398A 16-bit ATT20C498 T004133 CH8398 CH8398A STG1703 TQD4133 stg170

    AT24C04-10PI-2.7

    Abstract: 10PI1 AT24C04N10SI AT24C04N-10SI AT24C16
    Text: AT24C01A/2/4/8/16 Features • Low Voltage and Standard Voltage Operation 5.0 Vcc = 4.5 V to 6.0 V 3.0 (Vcc = 2.7 V to 6.0 V) 2.5 (VCC = 2.5 V to 6.0 V) 2.0 (VCC = 18 V to 6.0 V) • Internally Organized 128 * 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K)


    OCR Scan     		PDF AT24C01A/2/4/8/16 16-byte 128x8) 512x8) AT24C01A/02/24C16-10PC-2 AT24C16N-1 AT24C16-10SC-2 AT24C16-10PI-2 AT24C16N-10SI-2 AT24C16-10SI-2 AT24C04-10PI-2.7 10PI1 AT24C04N10SI AT24C04N-10SI AT24C16

    B33A10

    Abstract: R6095 Q031 THOMSON-CSF PRODUCTS A24C11
    Text: 's i m m m ê m m m w m m TSPC860 ü b 32 BIT QUAD INTEGRATED POWER QUICC COMMUNICATION CONTROLLER D ESC RIPTIO N The TSPC860 PowerPC” QUad Integrated Communication Controller Power QUICC™ is a versatile one-chip Integrated microprocessor and peripheral combination that can be used


    OCR Scan     		PDF TSPC860 TSPC860 TS68EN360 32-bit TS68EN360 46-91401ORSA B33A10 R6095 Q031 THOMSON-CSF PRODUCTS A24C11

    TGUI9400CXi

    Abstract: AM 5766 analog 486DX symphony chip set Tvga9200cxr TGUI9400 TGUI9400CX T304L 512kx4 Tvga 3728 lx data
    Text: T R I D EN T M I C R O S Y S T E M S T GUI 9 4 2 0 DGÎ INC TDD2162 D O O O n D b7E » PRE LI MI NARY DATA SHEET 10T ITRID ^Trident TGUI9420DGÌ INTEGRATED GUI ACCELERATOR General Description Features Hardware acceleration of BitBLTs, line drawing, short stroke vectors, rectangle fills, text transfer ana color


    OCR Scan     		PDF TDD2162 TGUI9420DGÌ TGUI9420DGi 32-bit 24-bit TGUI9400CXi TVGA9200CXr AM 5766 analog 486DX symphony chip set TGUI9400 TGUI9400CX T304L 512kx4 Tvga 3728 lx data

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT7811 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY _SCAS151C - JANUAR Y 1981 - R E V IS E D FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Input-Ready, Output-Ready, and Half-Full Flags • Independent Asynchronous Inputs and


    OCR Scan     		PDF SN74ACT7811 SCAS151C SN74ACT7881, SN74ACT7882, SN74ACT7884 50-pF 68-Pin 80-Pin