VBH48A
Abstract: VPC176A PQFP 176 pqfp144 VQZ120A PLASTIC FLAT PACKAGE VBG48A VEF44A VEJ44A VGB52A
Text: Plastic Quad Flat Package PQFP 32 Lead Molded Plastic Quad Flat Package NS Package Number VBE32A 2000 National Semiconductor Corporation MS101167 www.national.com Plastic Quad Flat Package (PQFP) May 1999 Plastic Quad Flat Package (PQFP) 44 Lead (10mm x 10mm) Molded Plastic Quad Flat Package, EIAJ
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VBE32A
MS101167
VEF44A
VEJ44A
VEK44A
VGZ44A
VBH48A
VPC176A
PQFP 176
pqfp144
VQZ120A
PLASTIC FLAT PACKAGE
VBG48A
VEF44A
VEJ44A
VGB52A
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483/DS90CR484
48-Bit
DS90CR483
DS90CR484
112MHz,
672Mbps
112MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support
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DS90CR486
SNLS149C
DS90CR486
133MHz
48-Bit
66MHz
100-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support
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DS90CR486
SNLS149C
DS90CR486
133MHz
48-Bit
66MHz
133MHz
100-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support
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Original
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DS90CR486
SNLS149C
DS90CR486
133MHz
48-Bit
66MHz
133MHz
100-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support
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DS90CR486
SNLS149C
DS90CR486
133MHz
48-Bit
66MHz
133MHz
100-pin
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PDF
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AN-1163
Abstract: to112MHz
Text: November 2000 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description Features The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL
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DS90C387/DS90CF388
24-bit
112MHz,
672Mbps,
38Gbps
14-Sep-
18-Feb-
5-Dec-2000]
AN-1163
to112MHz
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PDF
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marking G15
Abstract: No abstract text available
Text: July 2000 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL
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Original
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DS90C387/DS90CF388
24-bit
112MHz,
672Mbps,
38Gbps
AN-1163:
2-Sep-2000]
14-Sep-
marking G15
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483/DS90CR484
48-Bit
DS90CR483
DS90CR484
112MHz,
672Mbps
112MHz
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PDF
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100L
Abstract: DS90CR483 DS90CR483VJD DS90CR484 DS90CR484VJD VJD100A
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483
DS90CR484
48-Bit
DS90CR484
112MHz,
672Mbps
112MHz
38Gbit/s
672Mbytes/s)
100L
DS90CR483VJD
DS90CR484VJD
VJD100A
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 • • • 2 • • • • • • • • •
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DS90CR483A,
DS90CR484A
SNLS291A
DS90CR483A
DS90CR484A
48-Bit
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 • • • 2 • • • • • • • • •
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DS90CR483A,
DS90CR484A
SNLS291A
DS90CR483A
DS90CR484A
48-Bit
ANSI/TIA/EIA-644-1995
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES DESCRIPTION • The DS90C387/DS90CF388 transmitter/receiver pair
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DS90C387,
DS90CF388
SNLS012H
DS90CF388
DS90C387/DS90CF388
24-bit
112MHz,
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES DESCRIPTION • The DS90C387/DS90CF388 transmitter/receiver pair
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DS90C387,
DS90CF388
SNLS012H
DS90CF388
112/170MHz
112MHz
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PDF
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SNLS012H
Abstract: No abstract text available
Text: DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES DESCRIPTION • The DS90C387/DS90CF388 transmitter/receiver pair
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DS90C387,
DS90CF388
SNLS012H
DS90CF388
DS90C387/DS90CF388
24-bit
112MHz,
SNLS012H
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PDF
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DS90CR483
Abstract: DS90CR484
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483
DS90CR484
48-Bit
DS90CR484
112MHz,
672Mbps
112MHz
38Gbit/s
672Mbytes/s)
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PDF
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DS90CR483
Abstract: DS90CR484 LVDS out connector cable 20 pins
Text: June 1999 DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483
DS90CR484
48-Bit
DS90CR484
112MHz,
672Mbps
112MHz
38Gbit/s
672Mbytes/s)
LVDS out connector cable 20 pins
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PDF
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notebook flat cable connector lvds 30 pin
Abstract: AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A
Text: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of
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DS90C387A/DS90CF388A
DS90C387A/DS90CF388A
24-bit
112MHz,
784Mbps,
CSP-9-111S2.
notebook flat cable connector lvds 30 pin
AN-1059
DS90C387
DS90C387A
DS90CF384A
DS90CF388
DS90CF388A
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MDR 26 pin MINI D ribbon
Abstract: lvds 40 pin pinout pin connection lvds cable MDR 20 pin MINI D ribbon MDR 26 pin lvds connector 40 pin LVDS 30 pin connector cable cable tie LVDS connector 26 pin LVDS connector 40 pins
Text: DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz General Description The DS90CR483A transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a ninth LVDS link. Every cycle
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DS90CR483A
DS90CR484A
48-Bit
DS90CR484A
112MHz,
672Mbps
112MHz
38Gbit/s
672Mbytes/s)
MDR 26 pin MINI D ribbon
lvds 40 pin pinout
pin connection lvds cable
MDR 20 pin MINI D ribbon
MDR 26 pin
lvds connector 40 pin
LVDS 30 pin connector cable
cable tie
LVDS connector 26 pin
LVDS connector 40 pins
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PDF
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AN-1059
Abstract: DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A
Text: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of
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DS90C387A/DS90CF388A
DS90C387A/DS90CF388A
24-bit
112MHz,
784Mbps,
AN-1059
DS90C387
DS90C387A
DS90CF384A
DS90CF388
DS90CF388A
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PDF
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HSYNC, VSYNC, DE
Abstract: AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A 101-32016 101-32013 CMOS QXGA
Text: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of
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DS90C387A/DS90CF388A
DS90C387A/DS90CF388A
24-bit
112MHz,
784Mbps,
CSP-9-111S2.
HSYNC, VSYNC, DE
AN-1059
DS90C387
DS90C387A
DS90CF384A
DS90CF388
DS90CF388A
101-32016
101-32013
CMOS QXGA
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PDF
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DS90CR483
Abstract: DS90CR484
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483
DS90CR484
48-Bit
DS90CR484
112MHz,
672Mbps
112MHz
38Gbit/s
672Mbytes/s)
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PDF
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LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD
Abstract: No abstract text available
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483/DS90CR484
48-Bit
DS90CR483
DS90CR484
112MHz,
672Mbps
112MHz
LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD
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PDF
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dual pixel lvds
Abstract: CMOS QXGA
Text: DS90C387A,DS90CF388A DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link Literature Number: SNLS065D DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between
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DS90C387A
DS90CF388A
DS90C387A/DS90CF388A
SNLS065D
24-bit
112MHz,
784Mbps,
dual pixel lvds
CMOS QXGA
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