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    NOR SCHMITT MOS Search Results

    NOR SCHMITT MOS Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    TPHR7404PU Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 40 V, 0.00074 Ω@10V, SOP Advance, U-MOS-H Visit Toshiba Electronic Devices & Storage Corporation
    MG800FXF1JMS3 Toshiba Electronic Devices & Storage Corporation N-ch SiC MOSFET Module, 3300 V, 800 A, iXPLV, High-side: SiC SBD、Low-side: SiC MOSFET Visit Toshiba Electronic Devices & Storage Corporation
    TK190U65Z Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 650 V, 15 A, 0.19 Ohm@10V, TOLL Visit Toshiba Electronic Devices & Storage Corporation
    TK7R0E08QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 64 A, 0.0070 Ohm@10V, TO-220AB Visit Toshiba Electronic Devices & Storage Corporation
    XPJ1R004PB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 40 V, 160 A, 0.001 Ω@10V, S-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    TK4K1A60F Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 600 V, 2.0 A, 4.1 Ohm@10V, TO-220SIS Visit Toshiba Electronic Devices & Storage Corporation

    NOR SCHMITT MOS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AUP1G02GW

    Abstract: 74AUP1G02 74AUP1G02GF 74AUP1G02GM
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 3 — 12 October 2010 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02 74AUP1G02 74AUP1G02GW 74AUP1G02GF 74AUP1G02GM

    74AUP2G02

    Abstract: 74AUP2G02DC JESD22-A114E JESD78
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 03 — 11 December 2008 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G02 74AUP2G02 74AUP2G02DC JESD22-A114E JESD78

    74AUP2G02

    Abstract: 74AUP2G02DC
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 4 — 9 November 2010 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G02 74AUP2G02 74AUP2G02DC

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 5 — 2 December 2011 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G02 74AUP2G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 4 — 15 November 2011 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02 74AUP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 5 — 16 February 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02 74AUP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 7 — 4 February 2013 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G02 74AUP2G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02-Q100 Low-power 2-input NOR gate Rev. 1 — 4 June 2014 Product data sheet 1. General description The 74AUP1G02-Q100 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02-Q100 74AUP1G02-Q100 74AUP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AXP1G02 Low-power 2-input NOR gate Rev. 1 — 25 August 2014 Product data sheet 1. General description The 74AXP1G02 is a single 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire


    Original     		PDF 74AXP1G02 74AXP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 6 — 3 August 2012 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V o 3.6 V.


    Original     		PDF 74AUP2G02 74AUP2G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G02 74AUP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G02 74AUP1G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 6 — 3 August 2012 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V o 3.6 V.


    Original     		PDF 74AUP2G02 74AUP2G02

    Untitled

    Abstract: No abstract text available
    Text: 74AXP1G58 Low-power configurable multiple function gate Rev. 2 — 24 July 2014 Product data sheet 1. General description The 74AXP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR,


    Original     		PDF 74AXP1G58 74AXP1G58

    Untitled

    Abstract: No abstract text available
    Text: 74AXP1G58 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR,


    Original     		PDF 74AXP1G58 74AXP1G58

    Untitled

    Abstract: No abstract text available
    Text: 74AXP1G57 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G57 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR,


    Original     		PDF 74AXP1G57 74AXP1G57

    74AUP1G02GW

    Abstract: JESD22-A114-C MO-203 74AUP1G02 74AUP1G02GF 74AUP1G02GM
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 02 — 28 June 2006 Product data sheet 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02 74AUP1G02 74AUP1G02GW JESD22-A114-C MO-203 74AUP1G02GF 74AUP1G02GM

    14671

    Abstract: 74AUP1G02 74AUP1G02GM 74AUP1G02GW JESD22-A114-C MO-203
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 01 — 18 July 2005 Product data sheet 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02 74AUP1G02 14671 74AUP1G02GM 74AUP1G02GW JESD22-A114-C MO-203

    54ACS245S

    Abstract: 54ACS245 54ACS 5962H9657202VXC 301CL qml-38535 UT54ACS245UVAH octal schmitt 5962H9657202VXA
    Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Add device type 02. Add IOH and IOL tests. Add Schmitt trigger threshold tests for device type 02. Change table IB. Editorial changes throughout. 96-11-19 Monica L. Poelking B Changes in accordance with NOR 5962-R259-97. - CFS


    Original     		PDF 5962-R259-97. UT54ACS245S-Q 54ACS245S 54ACS245 54ACS 5962H9657202VXC 301CL qml-38535 UT54ACS245UVAH octal schmitt 5962H9657202VXA

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 01 — 28 August 2006 Product data sheet 1. General description The 74AUP2G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G02 74AUP2G02

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 02.mm — 16 May 2006 Product data sheet 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G02 74AUP1G02

    74AUP2G02

    Abstract: 74AUP2G02DC 74AUP2G02GM JESD22-A114E JESD78
    Text: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 02 — 19 March 2008 Product data sheet 1. General description The 74AUP2G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G02 74AUP2G02 74AUP2G02DC 74AUP2G02GM JESD22-A114E JESD78

    specifications of transistor AC126

    Abstract: 74 Series Logic ICs gate diagrams octal Bilateral Switches specifications of AC126 TC4000 series CMOS Logic ICs inverter TC74HC(T)XXXAP 74HC octal bidirectional latch specifications transistor AC126 VHCV541 TC7PZ17FU
    Text: SEMICONDUCTOR GENERAL CATALOG General-Purpose Logic ICs CMOS Logic ICs Low-Voltage CMOS Logic ICs CMOS Logic ICs in Ultra-Small US Packages Dual-Supply Level Shifters CMOS Bus Switch ICs Application-Specific Logic One-Gate CMOS L-MOS 1 2010/9 SCE0004K


    Original     		PDF 2010/9SCE0004K 74VHC, TC74AC/ACTxxx TC74VHC/VHCT/VHCVxxx ACT00, ACT02 ACT08, ACT32 VHC00, VHCT00A, specifications of transistor AC126 74 Series Logic ICs gate diagrams octal Bilateral Switches specifications of AC126 TC4000 series CMOS Logic ICs inverter TC74HC(T)XXXAP 74HC octal bidirectional latch specifications transistor AC126 VHCV541 TC7PZ17FU

    quad dual input nand schmitt mos

    Abstract: c17 dual mos 4030B 4085B 40098B 40097B 4069UB nor schmitt mos
    Text: FAIRCHILD INTERFACE AUXILIARY DRIVERS tpd-ns Typ Supply Voltage V Logic/Connection Diagram(s) TTL (300) 8.0 +5.0 157,58 6A,6T,9A,9T Item Package(s) Output Current (Capacitive Drive Capability) mA (pF) Dual TTL to CCD/MOS Dvr DEVICE NO. c o o c 3 u. Input Compatibility


    OCR Scan     		PDF 40098B 4030B, 4070B 4077B 4085B quad dual input nand schmitt mos c17 dual mos 4030B 4085B 40098B 40097B 4069UB nor schmitt mos