F618
Abstract: C0148 c006a
Text: APPLICATION NOTE H8/300L Super Low Power Series Multiplication of Single-Precision Floating-Point Numbers FMUL Introduction The software FMUL performs multiplication of single-precision floating-point numbers, which are placed in generalpurpose registers, and places the result of multiplication in the general purpose registers.
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H8/300L
H8/38024
REJ06B0170-0200/Rev
F618
C0148
c006a
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CXD 4191
Abstract: H9925 jd 1803 b 107 jd 1803 data jd 1803 19 B L64032 L6421 SEL620 L64270QC Pal programming 22v10
Text: L64032 32 x 32-Bit Multiplier-Accumulator The L64032 is a high-speed 32 x 32-bit parallel multiplier-accumulator which provides single precision 32 x 32 and multiple precision (64 x 64) fixed point multiplication and single precision multiplication with accumulation.
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L64032
32-Bit
32bit
CXD 4191
H9925
jd 1803 b 107
jd 1803 data
jd 1803 19 B
L6421
SEL620
L64270QC
Pal programming 22v10
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CY7B951
Abstract: G958 PM5345 162C-D
Text: CY7B951 SSTt SONET/SDH Serial Transceiver D D Features D D SONET/SDH and ATM Compatible D D D D D t Clock and data recovery from 51.84Ć or 155.52ĆMHz datastream D 155.52ĆMHz clock multiplication from 19.44ĆMHz source D 51.84ĆMHz clock multiplication from
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CY7B951
52MHz
44MHz
84MHz
24pin
52MHz
CY7B951
G958
PM5345
162C-D
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cs_11004.0
Abstract: No abstract text available
Text: Category: Current Source CIRCUIT IDEAS FOR DESIGNERS Schematic no. cs_11004.0 Current Source Multiplication Description This is a current multiplication circuit. Current I SET is set by determining V+ and RSET values. ISET is given by the equation: ISET = V+ - VDS / RSET where VDS is the drain and gate connected voltage of
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ALD1108xx
ALD1108xx,
cs_11004.0
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BT8222
Abstract: CY7B951 CY7B951-SC CY7B951-SI CY7B951-SXC CY7B951-SXI PM5345
Text: CY7B951 Local Area Network ATM Transceiver Features • SONET/SDH and ATM Compatible • Compatible with PMC-Sierra PM5345 SUNI • Clock and data recovery from 51.84- or 155.52-MHz datastream • 155.52-MHz clock multiplication from 19.44-MHz source • 51.84-MHz clock multiplication from 6.48-MHz source
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CY7B951
PM5345
52-MHz
52-MHz
44-MHz
84-MHz
48-MHz
24-pin
CY7B951
BT8222
CY7B951-SC
CY7B951-SI
CY7B951-SXC
CY7B951-SXI
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BT8222
Abstract: CY7B951 CY7B951-SC CY7B951-SI CY7B951-SXC CY7B951-SXI PM5345 SZ24 BUT12
Text: CY7B951 Local Area Network ATM Transceiver Features • SONET/SDH and ATM Compatible • Compatible with PMC-Sierra PM5345 SUNI • Clock and data recovery from 51.84- or 155.52-MHz datastream • 155.52-MHz clock multiplication from 19.44-MHz source • 51.84-MHz clock multiplication from 6.48-MHz source
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CY7B951
PM5345
52-MHz
52-MHz
44-MHz
84-MHz
48-MHz
24-pin
CY7B951
BT8222
CY7B951-SC
CY7B951-SI
CY7B951-SXC
CY7B951-SXI
SZ24
BUT12
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Untitled
Abstract: No abstract text available
Text: CY7B951 Local Area Network ATM Transceiver Features • SONET/SDH and ATM Compatible • Compatible with PMC-Sierra PM5345 SUNI • Clock and data recovery from 51.84- or 155.52-MHz datastream • 155.52-MHz clock multiplication from 19.44-MHz source • 51.84-MHz clock multiplication from 6.48-MHz source
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CY7B951
PM5345
52-MHz
44-MHz
84-MHz
48-MHz
24-pin
CY7B951
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ADVANCED LINEAR DEVICES
Abstract: ALD1101 ALD1103 ALD1106 ALD1116 Current source
Text: Category: Current Source CIRCUIT IDEAS FOR DESIGNERS Schematic no. cs_11004.0 Current Source Multiplication Description This is a current multiplication circuit. Current ISET is set by determining V+ and RSET values. ISET is given by the equation: ISET = V+ - VDS / RSET where VDS is the drain and gate connected voltage of
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ALD1108xx
ALD1108xx,
ALD1101,
ALD1103,
ALD1106,
ALD1116,
ALD1109xx
ADVANCED LINEAR DEVICES
ALD1101
ALD1103
ALD1106
ALD1116
Current source
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Untitled
Abstract: No abstract text available
Text: Z9104 Variable Delay Motherboard Clock Buffer Product Features Block Diagram Mode FBS1 FBS0 Pcounter Ncounter ÷4 ÷8 2.0 1 ÷4 ÷ 10 2.5 1 ÷4 ÷ 12 3.0 1 1 ÷8 ÷ 12 1.5 1 ÷4 ÷4 1.0 1 1 ÷4 ÷5 1.25 1 1 ÷4 ÷6 1.5 MF* 1 1 1 ÷8 ÷8 1.0 *Multiplication Factor – The multiplication factor for
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Z9104
32-Lead
Z9104
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Clock ic
Abstract: No abstract text available
Text: CLOCK IC DECISION TREE CLOCK IC Clock Generator PLL Computing Server Mobile Network/Consumer Desktop Clock Multiplier PCI Express LVPECL Spread Spectrum Clock Generator Input Frequency DIE Voltage Spread Input Multiplication VCXO IC 2.5V With PLL Down 3.3V
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TREE-09-2008
Clock ic
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E430
Abstract: 8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer
Text: ST52T430/E430 8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer/PWMs, ADC, SCI BRIEF DATASHEET Memories Up to 8 Kbytes EPROM/OTP 256 bytes of RAM Readout Protection Core Register File Based Architecture 55 instructions Hardware multiplication and division
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ST52T430/E430
16-bit
E430
8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer
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ADE7762
Abstract: ADE7762ARW ADE7762ARWZ IEC62053-21 MS-013-AE
Text: Preliminary Technical Data Polyphase Energy Metering IC with Phase Drop Indication ADE7762 FEATURES The only analog circuitry used in the ADE7762 is in the analog-to-digital converters ADCs and reference circuit. All other signal processing (for example, multiplication, filtering,
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ADE7762
ADE7762
IEC62053-21
ADE7762ARWZ
ADE7762ARWZ-RL1
ADE7762ARW
ADE7762ARW-RL
EVAL-ADE7762EB
28-Lead
ADE7762ARW
IEC62053-21
MS-013-AE
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M51485L
Abstract: m51485
Text: MITSUBISHI ICs AV COMMON M51485L 2-MULTIPLICATION FREQUENCY MULTIPLIER DESCRIPTION The M51485L is a semiconductor integrated circuit containing a ^-multiplication frequency multiplier for CCD delay line clock. The circuit consists of the 2-multiplication frequency multiplier,
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M51485L
M51485L
14-pin
50-mVp-p
m51485
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M51485L
Abstract: m51485 frequency multi
Text: MITSUBISHI ICs AV COMMON M51485L 2-MULTIPLICATION FREQUENCY MULTIPLIER DESCRIPTION The M51485L is a semiconductor integrated circuit containing a 2-multiplication frequency multiplier for CCD delay line clock. PIN CONFIGURATION (TOP VIEW) The circuit consists of the 2-multiplication frequency multiplier,
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M51485L
M51485L
14-pin
50-mVp-p
m51485
frequency multi
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74LS384
Abstract: No abstract text available
Text: Am25LS14A A m 2 5 L S l4 A 8-Bit Serial/Parallel Two's Complement Multiplier DISTINCTIVE CHARACTERISTICS Two's complement multiplication without correction Magnitude only multiplication Catcadable for any number of bits 8-blt parallel multiplicand data input
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Am25LS14A
50MHz
SN54LS/74LS384
IC000210
01767C
74LS384
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ADSP-1012A
Abstract: 1012a ADSP-1012 SP1012 ADSP1012ASG
Text: ANALOG DEVICES □ FEATURES 12 x 12-Bit Parallel Multiplication 20MHz Multiplication Rate Worst Case 300mW Power Dissipation with TTL-Compatible CMOS Technology Twos-Complement, Unsigned-Magnitude, and Mixed-Mode Data Formats Available in Hermetically-Sealed 64-Pin DIP,
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12-Bit
ADSP-1012A
20MHz
300mW
64-Pin
68-Pin
68-Contact
MIL-STD-883,
ADSP-1012A
1012a
ADSP-1012
SP1012
ADSP1012ASG
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TMS7
Abstract: YX+8018 8018
Text: A N A LO G D E V IC E S E C L 16 x 16-Bit Multiplier ADSP-8018 FEATURES 16 x 16-bit Parallel Multiplication 15ns Max Multiplication Time ECL 10KH Com patible 4.125W Max Pow er Dissipation Independent Input and Output Latches which Can Be M ade Transparent
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16-Bit
ADSP-8018
32-Bit
B3018
108-Pin
TMS7
YX+8018
8018
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25ls22
Abstract: No abstract text available
Text: 8-Bit Serial/Parallel Two’s Complement Multiplier 25LS14 FEA TU RES • Two's Complement Multiplication Without Correction ■ Magnitude Only Multiplication ■ Cascadable for any Number of Bits ■ 8 -Bit Parallel Multiplicand Data Input V cc v X4 X5 X6
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25LS14
MIL-STD-883
25LS14
25LS22
25ls22
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74F784
Abstract: N74F784D N74F784N
Text: FAST 74F784 Multiplier 8-Bit Serial/Parallel Multiplier With Adder/Subtracter Preliminary Specification FAST Products FEATURES • Serial (n x 8)-bit multiplication • Final stage adder/subtracter for optional use in adding a B bit to obtain S± B. • Two's Complement multiplication
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50MHz
100mA
500ns
74F784
N74F784D
N74F784N
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adsp1016a
Abstract: ADSP-1016ATE ADSP-1016A ADSP1016ASE MPY016HJ1 d64a sp1016 MPY016HJ ADSP-1016ASE ADSP-1016ATE/883B
Text: □ ANALOG DEVICES 16 x 16-Bit CMOS Multiplier ADSP-1016A FEATURES 16 x 16-Bit Parallel Multiplication 70ns Multiplication Time 225mW Power Dissipation with TTL-Compatible CMOS Technology Twos-Complement, Unsigned-Magnitude and MixedMode Data Formats Available in Hermetically Sealed 64-Pin DIP,
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16-Bit
ADSP-1016A
225mW
64-Pin
68-Pln
64-Pln
68-Contact
MIL-STD-883,
ADSP-1016
adsp1016a
ADSP-1016ATE
ADSP-1016A
ADSP1016ASE
MPY016HJ1
d64a
sp1016
MPY016HJ
ADSP-1016ASE
ADSP-1016ATE/883B
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ADSP-1080
Abstract: adsp1080 ADSP-1080ATD MPY008H MPY008 ADSP-1080A is pin-for-pin compatible with the ANALOG DEVICES D40A
Text: ANALOG DEVICES □ 8 X 8-Bit Twos Complement CMOS Multiplier ADSP-1080A FEATURES 8 x 8-Bit Parallel Multiplication 30MHz Multiplication Rate 275mW Power Dissipation with TTL-Compatible 1.5 Micron CM OS Technology Twos-Complement Data Format Available in Hermetically Sealed 40-Pin DIP or
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ADSP-1080A
30MHz
275mW
40-Pin
ADSP-1080
MPY008HJS
ADSP-1080A
adsp1080
ADSP-1080ATD
MPY008H
MPY008
is pin-for-pin compatible with the ANALOG DEVICES
D40A
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Untitled
Abstract: No abstract text available
Text: fax id: 5018 PRELIMINARY C'i- C Y7 B9514V 3.3V Quad PMD ATM Transceiver • 100 pin TQFP Features SONET/SDH and ATM Compatible Clock and data recovery from 51.84- or 155.52-MHz data stream 155.52-MHz clock multiplication from 1 9.44-MHz source 51.84-MHz clock multiplication from 6.48-MHz source
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B9514V
52-MHz
44-MHz
84-MHz
48-MHz
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74LS384
Abstract: sn74ls322 54LS322 L2908
Text: SN54LS384, SN74LS384 8-BIT BY 1-BIT TWO'S-COMPLEMENT MULTIPLIERS D 2 4 1 9 , JA N U A R Y 1981 - REVISED M AR C H 1 9 8 8 S N 5 4 L S 3 8 4 . . . J PACKAGE Two's-Complement Multiplication S N 7 4 L S 3 8 4 . . . N PACKA GE Magnitude Only Multiplication TO P VIE W
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SN54LS384,
SN74LS384
LS384
74LS384
sn74ls322
54LS322
L2908
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Untitled
Abstract: No abstract text available
Text: ANALOG D EV IC ES FEATURES VoUT Real-Time Analog Computational Unit ACU AD538 AD538 FUNCTIONAL BLOCK DIAGRAM Transfer Function Wide Dynamic Range (Denominator) -1000:1 Simultaneous Multiplication and Division Resistor-Programmable Powers & Roots No External Trims Required
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AD538
AD538
AD538â
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