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    MSI 74LS Search Results

    MSI 74LS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS491ANS Rochester Electronics LLC Replacement for AMD part number SN74LS491ANS. Buy from authorized manufacturer Rochester Electronics. Visit Rochester Electronics LLC Buy
    74LS626N Rochester Electronics LLC Replacement for Texas Instruments part number SN74LS626N. Buy from authorized manufacturer Rochester Electronics. Visit Rochester Electronics LLC Buy
    74LS190N Rochester Electronics LLC Replacement for Texas Instruments part number SN74LS190N. Buy from authorized manufacturer Rochester Electronics. Visit Rochester Electronics LLC Buy
    74LS468N Rochester Electronics LLC Replacement for Texas Instruments part number SN74LS468N. Buy from authorized manufacturer Rochester Electronics. Visit Rochester Electronics LLC Buy
    74LS469ANS Rochester Electronics LLC Replacement for AMD part number SN74LS469ANS. Buy from authorized manufacturer Rochester Electronics. Visit Rochester Electronics LLC Buy

    MSI 74LS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS139

    Abstract: demultiplexer truth table LS 74LS139 Truth table of 1 to 16 demultiplexer LS139 74ls139 datasheet SN54/74LS139 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS139 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder /Demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    Original     		PDF SN54/74LS139 SN54/74LS139 LS139 74LS139 demultiplexer truth table LS 74LS139 Truth table of 1 to 16 demultiplexer 74ls139 datasheet SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74LS158

    Abstract: LS158 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS158 QUAD 2-INPUT MULTIPLEXER The LSTTL / MSI SN54L / 74LS158 is a high speed Quad 2-input Multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    Original     		PDF SN54/74LS158 SN54L 74LS158 LS158 SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    demultiplexer truth table

    Abstract: 74ls139 datasheet 74ls139 decoder SN54/74LS139 transistor motorola 236 LS139 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS139 application
    Text: SN54/74LS139 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder /Demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    Original     		PDF SN54/74LS139 SN54/74LS139 LS139 demultiplexer truth table 74ls139 datasheet 74ls139 decoder transistor motorola 236 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS139 application

    74LS163

    Abstract: LS163A LS160A SN54/74LS160A 74LS160 74LS162 LS160 LS161A LS162 LS162A
    Text: SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS The LS160A / 161A / 162A / 163A are high-speed 4-bit synchronous counters. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and


    Original     		PDF SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A LS160A LS162A LS161A LS163A 74LS163 SN54/74LS160A 74LS160 74LS162 LS160 LS162

    74LS75

    Abstract: 74LS77 Equivalent 74LS75 74LS75D notes on 74LS75 751A-02 truth table NOT gate 74 TW 20-UL q1134
    Text: SN54/74LS75 SN54/74LS77 4-BIT D LATCH The TTL/MSI SN54/ 74LS75 and SN54/ 74LS77 are latches used as temporary storage for binary information between processing units and input /output or indicator units. Information present at a data D input is transferred to


    Original     		PDF SN54/74LS75 SN54/74LS77 74LS75 74LS77 16-pin 74LS77 Equivalent 74LS75 74LS75D notes on 74LS75 751A-02 truth table NOT gate 74 TW 20-UL q1134

    motorola zc 5276

    Abstract: 74LS158 circuit diagram of 32-1 multiplexer LS158 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS158 QUAD 2-INPUT MULTIPLEXER The LSTTL/ MSI SN54L/ 74LS158 is a high speed Quad 2-input Multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    Original     		PDF SN54/74LS158 SN54L/ 74LS158 LS158 motorola zc 5276 circuit diagram of 32-1 multiplexer SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74LS160

    Abstract: 74LS162 74LS161A LS160A LS161A LS163A LS162A SN54LSXXXJ
    Text: SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS The LS160A / 161A / 162A / 163A are high-speed 4-bit synchronous counters. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and


    Original     		PDF SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A LS160A LS162A LS161A LS163A 74LS160 74LS162 74LS161A SN54LSXXXJ

    74LS170

    Abstract: 74LS670 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS170 4 x 4 REGISTER FILE OPEN-COLLECTOR The TTL / MSI SN54 / 74LS170 is a high-speed, low-power 4 x 4 Register File organized as four words by four bits. Separate read and write inputs, both address and enable, allow simultaneous read and write operation.


    Original     		PDF SN54/74LS170 74LS170 74LS670 SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74LS75

    Abstract: 74LS77 751A-02 74ls771 74LS75D
    Text: SN54/74LS75 SN54/74LS77 4-BIT D LATCH The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as temporary storage for binary information between processing units and input /output or indicator units. Information present at a data D input is transferred to


    Original     		PDF SN54/74LS75 SN54/74LS77 74LS75 74LS77 16-pin 74LSV 751A-02 74ls771 74LS75D

    74LS151 multiplexer truth table

    Abstract: 74LS151 Logic DIAGRAM TTL 74ls151 74ls151 pin diagram 74LS151 truth table 74LS151 ls151 74LS151 16 SN54LSXXXJ SN74LSXXXD
    Text: SN54/74LS151 8-INPUT MULTIPLEXER The TTL / MSI SN54 / 74LS151 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS151 can be used as a universal function generator to


    Original     		PDF SN54/74LS151 74LS151 LS151 74LS151 multiplexer truth table 74LS151 Logic DIAGRAM TTL 74ls151 74ls151 pin diagram 74LS151 truth table 74LS151 16 SN54LSXXXJ SN74LSXXXD

    LS257B

    Abstract: 74LS257B SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The LSTTL / MSI SN54 / 74LS257B and the SN54 / 74LS258B are Quad 2-Input Multiplexers with 3-state outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present


    Original     		PDF 74LS257B 74LS258B SN54LS251 LS257B SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74LS157

    Abstract: 74ls157 pin diagram 74LS157 datasheet TTL 74ls157 ls157 Motorola LS157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS157 functions
    Text: SN54/74LS157 QUAD 2-INPUT MULTIPLEXER The LSTTL / MSI SN54 / 74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    Original     		PDF SN54/74LS157 74LS157 LS157 74ls157 pin diagram 74LS157 datasheet TTL 74ls157 Motorola LS157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS157 functions

    74LS170

    Abstract: 74LS670 SN54LSXXXJ SN74LSXXXD SN74LSXXXN D1115 EW 512 C
    Text: SN54/74LS170 4 x 4 REGISTER FILE OPEN-COLLECTOR The TTL / MSI SN54 / 74LS170 is a high-speed, low-power 4 x 4 Register File organized as four words by four bits. Separate read and write inputs, both address and enable, allow simultaneous read and write operation.


    Original     		PDF SN54/74LS170 74LS170 74LS670 SN54LSXXXJ SN74LSXXXD SN74LSXXXN D1115 EW 512 C

    74LS257B

    Abstract: SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS258B LS257B motorola zc 40
    Text: QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The LSTTL / MSI SN54 / 74LS257B and the SN54 / 74LS258B are Quad 2-Input Multiplexers with 3-state outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present


    Original     		PDF 74LS257B 74LS258B SN54LSXXXJ SN74LSXXXD SN74LSXXXN LS257B motorola zc 40

    74LS157 datasheet

    Abstract: 74LS157 diode 0750 circuit diagram of 32-1 multiplexer motorola zc data sheet 74ls157 LS157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS157 QUAD 2-INPUT MULTIPLEXER The LSTTL / MSI SN54 / 74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    Original     		PDF SN54/74LS157 74LS157 LS157 74LS157 datasheet diode 0750 circuit diagram of 32-1 multiplexer motorola zc data sheet 74ls157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74LS151 multiplexer truth table

    Abstract: 74LS151 Logic DIAGRAM 74LS151 truth table equivalent integrated circuit 74LS151 74LS151 LS151 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS151 8-INPUT MULTIPLEXER The TTL / MSI SN54 / 74LS151 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS151 can be used as a universal function generator to


    Original     		PDF SN54/74LS151 74LS151 LS151 13uthorized 74LS151 multiplexer truth table 74LS151 Logic DIAGRAM 74LS151 truth table equivalent integrated circuit 74LS151 SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74LS42

    Abstract: PIN 74LS42 74LS42 datasheet LS42
    Text: SN54/74LS42 ONE-OF-TEN DECODER The LSTTL / MSI SN54 / 74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.


    Original     		PDF SN54/74LS42 74LS42 PIN 74LS42 74LS42 datasheet LS42

    7491 shift register IC

    Abstract: 74l91 SN749 7491 shift register 74LS91 internal diagram of 7491 IC SN54L91
    Text: TYPES SN5491A, SNS4L91, SNS4LS91. SN7491A, SN74U1. SN74IS91 8-BIT SHIFT REGISTERS HL MSI B U L L E T I N NO . P L -S 7 611884, M A R C H 1 9 7 4 - R E V IS € D O C T O B E R 1976 MSI T T L ¿ H I F T R E G IS T E R S for applications in • Digital Computer Systems


    OCR Scan     		PDF SN5491A, SNS4L91, SNS4LS91. SN7491A, SN74U1. SN74IS91 54LS91 64L91 74LS91 7491 shift register IC 74l91 SN749 7491 shift register 74LS91 internal diagram of 7491 IC SN54L91

    SN74LS383

    Abstract: No abstract text available
    Text: TYPES SN54LS363. SN54LS364. SN74LS363, SN741S364 OCTAL D-TYPE TRANSPARUT IATCMESAND ED6E-TRI6CEBED FUP-FlOPS TTL MSI BULLETIN HO. OL-& 7*11*6«, OCTOBiR 107« • SNMLS363 . . . J PACKAGE SN74LS383 . . . J OR N PACKAGE TOP VIEW High VOH •• ■3.65 V Min ( 74LS')


    OCR Scan     		PDF SN54LS363. SN54LS364. SN74LS363, SN741S364 SNMLS363 SN74LS383 SN54LS373/SN74LS373 SN54LS374/ SN74LS374 SN54LS364, SN74LS383

    74ls138 truth table

    Abstract: 74LS138 74 LS 138 DECODER connection for 74LS138 74LS138 3 to 8 decoder Pin demultiplexer 3 to 8 truth table 74ls138 demultiplexer LS138 LOGIC OF 74LS138 of 74LS138 3 to 8 decoder
    Text: g MOTOROLA SN54/74LS138 1-0F-8 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/ Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel ex­


    OCR Scan     		PDF SN54/74LS138 1-of-24 LS138 1-of-32 LS138s SN54/74LS138 74ls138 truth table 74LS138 74 LS 138 DECODER connection for 74LS138 74LS138 3 to 8 decoder Pin demultiplexer 3 to 8 truth table 74ls138 demultiplexer LOGIC OF 74LS138 of 74LS138 3 to 8 decoder

    pin diagram of ic 74ls139

    Abstract: decoder 3-8 74ls with nor gate 74ls139 motorola ttl application TTL IC 74
    Text: MOTOROLA SN54/74LS139 DUAL 1-0F-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder/D e­ multiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    OCR Scan     		PDF SN54/74LS139 LS139 pin diagram of ic 74ls139 decoder 3-8 74ls with nor gate 74ls139 motorola ttl application TTL IC 74

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS280 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS Feature Pin Configuration • Generates Either Odd or Even Parity for Nine Data Lines • Cascadable for n-Bits • Can Be Used to upgrade Existing Systems Us­ ing MSI Parity Circuits • Typical Power Dissipation: 80mW


    OCR Scan     		PDF GD54/74LS280

    OF IC 74LS175

    Abstract: 74ls175 pin diagram
    Text: M MOTOROLA SN54/74LS175 QUAD D FLIP-FLOP The LSTTL/MSI SN54/74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to


    OCR Scan     		PDF SN54LS175 SN74LS175 LS175 OF IC 74LS175 74ls175 pin diagram

    74LS161A

    Abstract: LS163 LS163 IC CP015
    Text: 8 < > SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A MOTOROLA BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS The LS160A/161A/162A/163A are high-speed 4-bit synchronous count­ ers. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and


    OCR Scan     		PDF LS160A/161A/162A/163A LS160A LS162A LS161A LS163A 74LS161A LS163 LS163 IC CP015