AHCT32
Abstract: 74AHC32 74AHC32BQ 74AHC32D 74AHC32PW 74AHCT32 TSSOP14
Text: 74AHC32; 74AHCT32 Quad 2-input OR gate Rev. 04 — 22 May 2008 Product data sheet 1. General description The 74AHC32; 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
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74AHC32;
74AHCT32
74AHCT32
74AHC32:
74AHCT32:
EIA/JESD22-A114E
EIA/JESD22-A115-A
AHCT32
74AHC32
74AHC32BQ
74AHC32D
74AHC32PW
TSSOP14
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PDF
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AHCT00
Abstract: 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW 74AHCT00 TSSOP14
Text: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 04 — 28 April 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC
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74AHC00;
74AHCT00
74AHCT00
74AHC00:
74AHCT00:
EIA/JESD22-A114E
EIA/JESD22-A115-A
AHCT00
74AHC00D
74AHC00
74AHC00BQ
74AHC00PW
TSSOP14
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PDF
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dhvqfn14
Abstract: 74HC32 74HCT32 74LV32 74LV32D 74LV32DB 74LV32N 74LV32PW JESD22-A114E
Text: 74LV32 Quad 2-input OR gate Rev. 03 — 9 November 2007 Product data sheet 1. General description The 74LV32 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC32 and 74HCT32. The 74LV32 provides a quad 2-input OR function. 2. Features
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74LV32
74LV32
74HC32
74HCT32.
JESD22-A114E
JESD22-A115-A
dhvqfn14
74HCT32
74LV32D
74LV32DB
74LV32N
74LV32PW
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PDF
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dhvqfn14 footprint
Abstract: 74ALVC00 74ALVC00BQ 74ALVC00D 74ALVC00PW DHVQFN14 TSSOP14 sot762 footprint SOT762-1 AN01026
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC00 Quad 2-input NAND gate Product specification Supersedes data of 2003 Feb 06 2003 May 14 Philips Semiconductors Product specification Quad 2-input NAND gate 74ALVC00 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V
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74ALVC00
74ALVC00
SCA75
613508/02/pp16
dhvqfn14 footprint
74ALVC00BQ
74ALVC00D
74ALVC00PW
DHVQFN14
TSSOP14
sot762 footprint
SOT762-1
AN01026
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PDF
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Untitled
Abstract: No abstract text available
Text: 74ALVC32-Q100 Quad 2-input OR gate Rev. 1 — 16 May 2014 Product data sheet 1. General description The 74ALVC32-Q100 is a quad 2-input OR gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This product has been qualified to the Automotive Electronics Council AEC standard
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74ALVC32-Q100
74ALVC32-Q100
AEC-Q100
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LVC86A Quad 2-input EXCLUSIVE-OR gate Rev. 5 — 19 October 2011 Product data sheet 1. General description The 74LVC86A provides four 2-input EXCLUSIVE-OR functions. It is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS
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74LVC86A
74LVC86A
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LV00 Quad 2-input NAND gate Rev. 03 — 20 December 2007 Product data sheet 1. General description The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC00 and 74HCT00. The 74LV00 provides a quad 2-input NAND function.
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74LV00
74LV00
74HC00
74HCT00.
JESD22-A114E
JESD22-A115-A
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PDF
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Untitled
Abstract: No abstract text available
Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .
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74HC00;
74HCT00
74HCT00
74HC00:
74HCT00:
JESD22-A114F
JESD22-A115-A
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PDF
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74LVC00A
Abstract: 74LVC00AD 74LVC00ADB 74LVC00APW
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 1998 Apr 28 2002 Mar 05 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC00A
74LVC00A
SCA74
613508/03/pp16
74LVC00AD
74LVC00ADB
74LVC00APW
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PDF
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001aab072
Abstract: 74hc154 application 74HC154B 74hct154 74hct154 philips
Text: INTEGRATED CIRCUITS DATA SHEET 74HC154; 74HCT154 4-to-16 line decoder/demultiplexer Product specification Supersedes data of 2004 Jun 01 2004 Oct 05 Philips Semiconductors Product specification 4-to-16 line decoder/demultiplexer 74HC154; 74HCT154 FEATURES
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74HC154;
74HCT154
4-to-16
16-line
EIA/JESD22-A114-B
EIA/JESD22-A115-A
74HCT154
001aab072
74hc154 application
74HC154B
74hct154 philips
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PDF
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC32A Quad 2-input OR gate Product specification Supersedes data of 1997 Jun 30 File under Integrated Circuits, IC24 2002 Sep 24 Philips Semiconductors Product specification Quad 2-input OR gate 74LVC32A FEATURES DESCRIPTION
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74LVC32A
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Untitled
Abstract: No abstract text available
Text: 74ALVC00 Quad 2-input NAND gate Rev. 3 — 16 May 2014 Product data sheet 1. General description The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits
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74ALVC00
74ALVC00
JESD8B/JESD36
JESD22-A114E
JESD22-A115-A
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PDF
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74ALVC32
Abstract: 74ALVC32D 74ALVC32PW TSSOP14 AN01026
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC32 Quad 2-input OR gate Product specification 2002 Nov 15 Philips Semiconductors Product specification Quad 2-input OR gate 74ALVC32 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V The 74ALVC32 is a high-performance, low-power,
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74ALVC32
74ALVC32
JESD8B/JESD36
SCA74
613508/01/pp16
74ALVC32D
74ALVC32PW
TSSOP14
AN01026
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LVC132A-Q100 Quad 2-input NAND Schmitt trigger Rev. 1 — 4 April 2013 Product data sheet 1. General description The 74LVC132A-Q100 provides four 2-input NAND gates with Schmitt trigger inputs. It can transform slowly changing input signals into sharply defined, jitter-free output signals.
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74LVC132A-Q100
74LVC132A-Q100
74LVC132A
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74hc32
Abstract: 74hc32 pdf data sheet 74HC32D 74HC32DB 74HC32PW 74HCT32 74HCT32D 74HCT32PW
Text: INTEGRATED CIRCUITS DATA SHEET 74HC32; 74HCT32 Quad 2-input OR gate Product specification Supersedes data of 1997 Aug 27 2003 Aug 29 Philips Semiconductors Product specification Quad 2-input OR gate 74HC32; 74HCT32 FEATURES GENERAL DESCRIPTION • Wide supply voltage range from 2.0 to 6.0 V
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74HC32;
74HCT32
74HC/HCT32
EIA/JESD22-A114-A
EIA/JESD22-A115-A
SCA75
613508/03/pp20
74hc32
74hc32 pdf data sheet
74HC32D
74HC32DB
74HC32PW
74HCT32
74HCT32D
74HCT32PW
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PDF
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Untitled
Abstract: No abstract text available
Text: 74ALVC00-Q100 Quad 2-input NAND gate Rev. 1 — 16 May 2014 Product data sheet 1. General description The 74ALVC00-Q100 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This product has been qualified to the Automotive Electronics Council AEC standard
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74ALVC00-Q100
74ALVC00-Q100
AEC-Q100
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LVC32A Quad 2-input OR gate Rev. 5 — 17 November 2011 Product data sheet 1. General description The 74LVC32A provides four 2-input OR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
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74LVC32A
74LVC32A
JESD8-C/JESD36
JESD22-A114F
JESD22-A115-B
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PDF
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Untitled
Abstract: No abstract text available
Text: 74HC32-Q100; 74HCT32-Q100 Quad 2-input OR gate Rev. 1 — 1 August 2012 Product data sheet 1. General description The 74HC32-Q100; 74HCT32-Q100 is a quad 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in
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74HC32-Q100;
74HCT32-Q100
74HCT32-Q100
AEC-Q100
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LVC132A Quad 2-input NAND Schmitt trigger Rev. 2 — 29 August 2011 Product data sheet 1. General description The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free
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74LVC132A
74LVC132A
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PDF
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74VHC32
Abstract: 74VHCT32 JESD22-A114E
Text: 74VHC32; 74VHCT32 Quad 2-input OR gate Rev. 01 — 13 August 2009 Product data sheet 1. General description The 74VHC32; 74VHCT32 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC
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74VHC32;
74VHCT32
74VHCT32
74VHC32
JESD22-A114E
JESD22-A115-A
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PDF
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74LVC32A
Abstract: 74LVC32ABQ 74LVC32AD 74LVC32ADB 74LVC32APW DHVQFN14 SSOP14 TSSOP14
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC32A Quad 2-input OR gate Product specification Supersedes data of 1997 Jun 30 2003 Jul 16 Philips Semiconductors Product specification Quad 2-input OR gate 74LVC32A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC32A
74LVC32A
SCA75
613507/03/pp16
74LVC32ABQ
74LVC32AD
74LVC32ADB
74LVC32APW
DHVQFN14
SSOP14
TSSOP14
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PDF
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Untitled
Abstract: No abstract text available
Text: 74LVC32A-Q100 Quad 2-input OR gate Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC32A-Q100 provides four 2-input OR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
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74LVC32A-Q100
74LVC32A-Q100
AEC-Q100
74LVC32A
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PDF
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NA32
Abstract: No abstract text available
Text: Multi-Layer Ceramic Chip Capacitor Array MNA Series Two or four multi-layer ceramic chip capacitors are fabricated on a single chip. Good solderability and small foot print reduce cost and space. #Dim enslons list Unit : mm MNA24 MNA22 Part No. MNA32 MNA34
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MNA22
MNA24
MNA32
MNA34
A22/M
A24/M
MNA34
178mm
NA32
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PDF
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5102-9 terminal
Abstract: JIS-C-6429 JISC5102 MCH21
Text: Ceramic Capacitors Multi-layer ceramic chip capacitors •E x te rn a l dimensions Units: mm 0 .7 ± 0.1 1.0 + 0.2 Multi-layer ceramic network chip capacitors •F e a tu re s 1)Area ratio is approximately 43% smaller than that of chip MCH21, enabling high-density mounting.
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OCR Scan
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MNA24
2012X4
MCH21,
5102-9 terminal
JIS-C-6429
JISC5102
MCH21
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PDF
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