Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    MIPS BUS ARCHITECTURE Search Results

    MIPS BUS ARCHITECTURE Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    CS-USB3.1TYPC-001M Amphenol Cables on Demand Amphenol CS-USB3.1TYPC-001M Amphenol Premium USB 3.1 Gen2 Certified USB Type A-C Cable - USB 3.0 Type A Male to Type C Male [10.0 Gbps SuperSpeed] 1m (3.3ft) Datasheet
    CS-USBAM003.0-001 Amphenol Cables on Demand Amphenol CS-USBAM003.0-001 Amphenol Premium USB 3.0/3.1 Gen1 Certified USB Type A-A Cable - USB 3.0 Type A Male to Type A Male [5.0 Gbps SuperSpeed] 1m (3.3') Datasheet
    CS-USBAB003.0-002 Amphenol Cables on Demand Amphenol CS-USBAB003.0-002 Amphenol Premium USB 3.0/3.1 Gen1 Certified USB Type A-B Cable - USB 3.0 Type A Male to Type B Male [5.0 Gbps SuperSpeed] 2m (6.6') Datasheet
    CS-USBAB003.0-001 Amphenol Cables on Demand Amphenol CS-USBAB003.0-001 Amphenol Premium USB 3.0/3.1 Gen1 Certified USB Type A-B Cable - USB 3.0 Type A Male to Type B Male [5.0 Gbps SuperSpeed] 1m (3.3') Datasheet
    CS-USBAM003.0-002 Amphenol Cables on Demand Amphenol CS-USBAM003.0-002 Amphenol Premium USB 3.0/3.1 Gen1 Certified USB Type A-A Cable - USB 3.0 Type A Male to Type A Male [5.0 Gbps SuperSpeed] 2m (6.6') Datasheet
    CS-USB3.1TYPC-000.5M Amphenol Cables on Demand Amphenol CS-USB3.1TYPC-000.5M Amphenol Premium USB 3.1 Gen2 Certified USB Type A-C Cable - USB 3.0 Type A Male to Type C Male [10.0 Gbps SuperSpeed] 0.5m (1.6ft) Datasheet

    MIPS BUS ARCHITECTURE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    cga motorola

    Abstract: PowerPC755 PC755B 2138F CBGA360 MPC7400 PC745 PC755 PCX755
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755) 7SPECint95, 9SPECfp95 PC745) 64-bit 32-bit cga motorola PowerPC755 PC755B 2138F CBGA360 MPC7400 PC745 PC755 PCX755

    2138F

    Abstract: CBGA360 MPC7400 PC745 PC755 ATMEL 745 PCX755
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755) 7SPECint95, 9SPECfp95 PC745) 64-bit 32-bit 2138F CBGA360 MPC7400 PC745 PC755 ATMEL 745 PCX755

    hall sensor u18 032

    Abstract: CBGA360 MPC7400 PC745B PC755B CBGA-255 atmel 0820 PowerPC755B
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755B 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745B) 733 MIPS at 400 MHz (PC755B) at 641 MIPS at 350 MHz (PC745B) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755B) 7SPECint95, 9SPECfp95 PC745B) 64-bit 32-bit hall sensor u18 032 CBGA360 MPC7400 PC745B PC755B CBGA-255 atmel 0820 PowerPC755B

    80960SA

    Abstract: 80960SB 65A176 AD427
    Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded ■ Pin Compatible with 80960SB Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache


    Original
    PDF 80960SA 32-BIT 16-BIT 80960SB 512-Byte 80960SA 80960SB 65A176 AD427

    cga motorola

    Abstract: CBGA360 MPC7400 PC745 PC755 N-19 CI-CGA360 PowerPC755
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755) 7SPECint95, 9SPECfp95 PC745) 64-bit 32-bit cga motorola CBGA360 MPC7400 PC745 PC755 N-19 CI-CGA360 PowerPC755

    Untitled

    Abstract: No abstract text available
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755) 7SPECint95, 9SPECfp95 PC745) 64-bit 32-bit

    ATMEL 745

    Abstract: PCX755 PC755B CBGA360 MPC7400 PC745 PC755 PCX745 PC745 PBGA255 C PBGA255
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755) 7SPECint95, 9SPECfp95 PC745) 64-bit 32-bit ATMEL 745 PCX755 PC755B CBGA360 MPC7400 PC745 PC755 PCX745 PC745 PBGA255 C PBGA255

    cga motorola

    Abstract: PCX755B IEC C13 pinout Tag 225 600 replacement PC745B PC755B MPC7400 PowerPC755B PC755 20d100
    Text: Features H H H H H H H H H H H H H H H 18.1SPECint95, estimates 12.3 SPECfp95 @400Mhz PC755B 15.7SPECint95, 9SPECfp95 @350Mhz (PC745B) 733 MIPS @ 400Mhz (PC755B) et 641 MIPS@350Mhz (PC745B) Selectable bus clock (12 CPU bus dividers up to 10x) PD typical 6,4W @ 400Mhz, full operating conditions.


    Original
    PDF 1SPECint95, SPECfp95 400Mhz PC755B) 7SPECint95, 9SPECfp95 350Mhz PC745B) cga motorola PCX755B IEC C13 pinout Tag 225 600 replacement PC745B PC755B MPC7400 PowerPC755B PC755 20d100

    PBGA255

    Abstract: 25X25 PowerPC755
    Text: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)


    Original
    PDF 1SPECint95, SPECfp95 PC755) 7SPECint95, 9SPECfp95 PC745) 64-bit 32-bit PBGA255 25X25 PowerPC755

    QFP PACKAGE thermal resistance

    Abstract: 80960SA 80960SB N80960SB1 65A176 AD928
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture ■ Built-in Interrupt Controller — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache


    Original
    PDF 80960SB 32-BIT 16-BIT 512-Byte 80960SA 80960SA 80960SB QFP PACKAGE thermal resistance N80960SB1 65A176 AD928

    QFP PACKAGE thermal resistance

    Abstract: 65a176 AD427 80960SA 80960SB x80960SB 272207 D010D
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture ■ Built-in Interrupt Controller — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache


    Original
    PDF 80960SB 32-BIT 16-BIT 512-Byte 80960SA 80960SA 80960SB QFP PACKAGE thermal resistance 65a176 AD427 x80960SB 272207 D010D

    Untitled

    Abstract: No abstract text available
    Text: V320USC Universal System Controller • • • • • • PCI System Controller for 32-Bit MIPS and SuperH™ System Interface Device Highlights Overview • Glueless interface between popular MIPS and SuperH processors and the standard 32-bit PCI bus


    Original
    PDF V320USC 32-Bit

    Untitled

    Abstract: No abstract text available
    Text: V320USC Universal System Controller • • • • • • PCI System Controller for 32-Bit MIPS and SuperH™ System Interface Device Highlights Overview • Glueless interface between popular MIPS and SuperH processors and the standard 32-bit PCI bus


    Original
    PDF V320USC 32-Bit

    V320USC

    Abstract: No abstract text available
    Text: V320USC HIGH INTEGRATION, LOW COST PCI SYSTEM CONTROLLER For 32 Bit MIPS and SuperH™ Processors ▼ Glueless interface between the popular MIPS™ and SuperH™ processors and the industry standard PCI Bus ▼ Fully compliant with PCI 2.2 specification


    Original
    PDF V320USC 32byte V320USC 2348G USC0000

    BCM1122

    Abstract: MIPS64 DDR PHY ASIC BCM1125H BCM1250 BCM5461 bcm546 DSLAM ALU
    Text: BCM1122 HIGH-PERFORMANCE MIPS CONTROL PROCESSOR SUMMARY OF BENEFITS FEATURES • 400-MHz MIPS64 CPU • Industry-leading performance • 2.2 Dhrystone MIPS/MHz • 51-Gbps on-chip bus bandwidth, 13-Gbps memory bandwidth • Low power dissipation at 4W


    Original
    PDF BCM1122 400-MHz MIPS64TM 51-Gbps 13-Gbps 32-KB 1122-PB01-R BCM1122 MIPS64 DDR PHY ASIC BCM1125H BCM1250 BCM5461 bcm546 DSLAM ALU

    Untitled

    Abstract: No abstract text available
    Text: in tj 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ Built-In Interrupt Controller — 4 Direct Interrupt Pins


    OCR Scan
    PDF 80960SB 32-BIT 16-BIT 512-Byte 16-Bit 8096SA 4fl2bl75

    VAX-11

    Abstract: PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode
    Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped


    OCR Scan
    PDF 80960SA 32-BIT 16-BIT 512-Byte Local\32-Bit 80960SB 80-Lead VAX-11 PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode

    Untitled

    Abstract: No abstract text available
    Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped


    OCR Scan
    PDF 80960SA 32-BIT 16-BIT 512-Byte 80960SB 16-Bit 80960SA

    T7 DIODE

    Abstract: No abstract text available
    Text: inttJ PBßyiiflOMÄlHV 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped


    OCR Scan
    PDF 80960SA 32-BIT 16-BIT 512-Byte 80960KA/ 80960SB T7 DIODE

    n80960sb

    Abstract: No abstract text available
    Text: in tj 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ Built-In Interrupt Controller — 4 Direct Interrupt Pins


    OCR Scan
    PDF 80960SB 32-BIT 16-BIT 512-Byte 16-Bit 8096SA MflEbl75 n80960sb

    Untitled

    Abstract: No abstract text available
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached


    OCR Scan
    PDF 80960SB 32-BIT 16-BIT 512-Byte 80960SA 32-Blt

    Untitled

    Abstract: No abstract text available
    Text: V320USC Universal System Controller PCI System Controller for 32-Bit MIPS and SuperH™ System Interface • Glueless interface between popular MIPS™ and SuperH™ processors and the standard 32-bit PCI bus • Programmable chip select / peripheral device


    OCR Scan
    PDF V320USC 32-Bit

    Untitled

    Abstract: No abstract text available
    Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • ■ ■ High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached


    OCR Scan
    PDF 80960SA 32-BIT 16-BIT 512-Byte 80960SB 80-Lead 84-Le

    Untitled

    Abstract: No abstract text available
    Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached


    OCR Scan
    PDF 80960SA 32-BIT 16-BIT 512-Byte 32-Blt 80960SB 80-Lead