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    MCR 16 313 Search Results

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    Untitled

    Abstract: No abstract text available
    Text: Z550 UART 0.5µ m Technology Mega Macrocell for Universal Asynchronous Receiver/Transmitter DESCRIPTION The Z550 UART Mega Macrocell is a featured library element in all of OKI’s 0.5µm Sea of Gates and 0.5µm Customer Structured Array families. The OKI implementation of the mega macrocell is fully compatible


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    PDF o4/752-2423 OKI-6994 1-800-OKI-6388

    Z550

    Abstract: MSM13R0000 MSM98R000 UART s
    Text: DATA SHEET O K I A S I C P R O D U C T S Z550 0.5 µm UART Mega Macrocell August 1996 • ■ –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––


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    PDF OKI-6994 1-800-OKI-6388 Z550 MSM13R0000 MSM98R000 UART s

    ST16C1450

    Abstract: No abstract text available
    Text: ST16C1450 ST16C1451 STARTECH An Printed June 19, 1996 Company UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER D0 26 DSR* D1 1 27 CD* D2 2 28 VCC D3 3 23 DTR* D7 8 22 RTS* RX 9 21 A0 TX 10 20 A1 CS* 11 19 A2 17 RI* INT 18 16 14 IOW* IOR* 13 GND 15 12 ST16C1450CJ28


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    PDF ST16C1450 ST16C1451 ST16C1450/51 448kHz. 73M1550 73M2550 ST16C1450/ tailo30 161450-MD-1 ST16C1450

    Untitled

    Abstract: No abstract text available
    Text: ST16C2550 STARTECH An Company Printed June 19, 1996 DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs D4 D3 D2 D1 D0 TXRDYA* VCC RIA* CDA* DSRA* CTSA* 4 3 2 1 44 43 42 41 40 D5 7 39 RESET D6 8 38 DTRB* D7 9 37 DTRA* RXB 10 36 RTSA* RXA 11 35 OPA* TXRDYB* 12


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    PDF ST16C2550 ST16C2550CJ44 ST16C2550 162450-TX-1 162550-TX-2 162550-TX-3

    ARM920T

    Abstract: TAG90 141 mrc ARM processor Armv4 ARM920T rom cp15 149 StrongARM SA110 B-30 CP15 arm9tdmi
    Text: ARM920T Rev 1 Technical Reference Manual Copyright 2000, 2001 ARM Limited. All rights reserved. ARM DDI 0151C ARM920T Technical Reference Manual Copyright © 2000, 2001 ARM Limited. All rights reserved. Release Information Change history Date Issue Change


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    PDF ARM920T 0151C ARM920T TAG90 141 mrc ARM processor Armv4 ARM920T rom cp15 149 StrongARM SA110 B-30 CP15 arm9tdmi

    ARM9TDMI

    Abstract: ARM922T 141 mrc basic architecture of ARM Processors B-30 CP15
    Text: ARM922T Rev 0 Technical Reference Manual Copyright 2000, 2001 ARM Limited. All rights reserved. ARM DDI 0184B ARM922T Technical Reference Manual Copyright © 2000, 2001 ARM Limited. All rights reserved. Release Information Change history Date Issue Change


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    PDF ARM922T 0184B ARM9TDMI ARM922T 141 mrc basic architecture of ARM Processors B-30 CP15

    ARM9TDMI

    Abstract: ARM processor ARM processor based Circuit Diagram arm9 architecture ARM946E-S programming arm9 using embedded c 141 mrc arm microprocessor data sheet ARM processor data sheet ARM9E instruction set
    Text: ARM922T Rev 0 Technical Reference Manual ARM DDI 0184A ARM922T (Rev 0) Technical Reference Manual Copyright 2000 ARM Limited. All rights reserved. Release Information Change history Date Issue Change 5th September 2000 A First release. Proprietary Notice


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    PDF ARM922T ARM946E-S, ARM966E-S, ARM9TDMI ARM processor ARM processor based Circuit Diagram arm9 architecture ARM946E-S programming arm9 using embedded c 141 mrc arm microprocessor data sheet ARM processor data sheet ARM9E instruction set

    INS8250

    Abstract: NS16C550 NS16C552 ST16C2552 ST16C2552CJ44 ST16C2552CQ48 ST16C2552IJ44 ST16C450 ST16C550 RXB 24
    Text: STARTECH ST16C2552 An Printed December 17, 1996 Company DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs D4 D3 D2 D1 D0 TXRDYA* VCC RIA* CDA* DSRA* CTSA* 4 3 2 1 44 43 42 41 40 D5 7 39 RXA D6 8 38 TXA D7 9 37 DTRA* A0 10 36 RTSA* XTAL1 11 35 MFA* GND 12 34


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    PDF ST16C2552 ST16C2552CJ44 ST16C2552 INS8250 NS16C550 NS16C552 ST16C2552CJ44 ST16C2552CQ48 ST16C2552IJ44 ST16C450 ST16C550 RXB 24

    DDI0198B

    Abstract: ARM926EJ-S Implementation Guide DDI0198B thumb instruction set ARM DII 0015 DXI 0131 ARM9EJ-S ARM926EJ-S CP15 dii 0157 ARM DII 0222
    Text: ARM926EJ-S Rev 0 Technical Reference Manual Copyright 2001-2002 ARM Limited. All rights reserved. ARM DDI0198B ARM926EJ-S Technical Reference Manual Copyright © 2001-2002 ARM Limited. All rights reserved. Release Information Change history Date Issue


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    PDF ARM926EJ-S DDI0198B DDI0198B ARM926EJ-S Implementation Guide DDI0198B thumb instruction set ARM DII 0015 DXI 0131 ARM9EJ-S ARM926EJ-S CP15 dii 0157 ARM DII 0222

    Untitled

    Abstract: No abstract text available
    Text: a 82C50A HARRIS S E M I C O N D U C T O R CMOS Asynchronous Communications Element August 1996 Features Description • • • • The 82C50A Asynchronous Communication Element ACE is a high performance programmable Universal Asynchro­ nous Receiver/Transmitter (UART) and Baud Rate Genera­


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    PDF 82C50A 82C50A 0-10MHz 10MHz

    16C450CQ

    Abstract: No abstract text available
    Text: JSTEXAR ST16C450 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART GENERAL DESCRIPTION The ST16C450 is a universal asynchronous receiver and transmitter. The ST 16C450 is an improved ver­ sion ot the NS16450 UART with higher operating speed and lower access time. A programmable baud


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    PDF ST16C450 ST16C450 NS16450 ST16C45g X450-MD-1 16C450CQ

    VL16C450

    Abstract: NS16450 NS16C450 ST16C2450 ST16C2450CJ44 ST16C2450CP40 WD16C450 162450-RD-1
    Text: STARTECH ST16C2450 An 28? EX4RCompany Printed August 3, 1995 DUAL UNIVERSAL ASYNCHRONOUSRECEIVER/TRANSMITTER DESCRIPTION PLCC Package The ST16C2450 is a dual universal asynchronous receiverand transmitter. Independent programmable baud rate generators are provided to select transmit


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    PDF ST16C2450 ST16C2450 NS16C450 162450-RX-1 162450-TX-1 VL16C450 NS16450 ST16C2450CJ44 ST16C2450CP40 WD16C450 162450-RD-1

    ST16C650A

    Abstract: No abstract text available
    Text: ST16C650A ZBTEXAR UART WITH 32-BYTE FIFO’s AND INFRARED IrDA ENCODER/DECODER GENERAL DESCRIPTION The ST16C650A"’ is a universal asynchronous receiver and transmitter (UART) and is pin compatible with the ST 16C550 UART. The 650Ais an enhanced UART with 32 byte FIFOs, automatic hardware/software flow control,


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    PDF 32-BYTE ST16C650A ST16C650A" 16C550 650Ais X550-TX-3 ST16C650A

    VL16C450

    Abstract: VL16C550 Delco 195 sorep s3607 MSR 200 VL16C550PC
    Text: VLSI Tech no lo gy , in c . VL16C550 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs FEATURES DESCRIPTION • Fully compatible with VL16C450 ACE The VL16C550 is an asynchronous communications element ACE that is functionally equivalent to the VL16C450, and additionally incorpo­


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    PDF VL16C550 VL16C450 VL16C550 Delco 195 sorep s3607 MSR 200 VL16C550PC

    1fg1

    Abstract: 16C1552 16c1550 st16c1550
    Text: ST16C1550 ST16C1551/1552 STARTECH Printed September 15, 1994 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C1550/51/52 is a universal asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. A programmable baud rate generator is


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    PDF ST16C1550 ST16C1551/1552 ST16C1550/51/52 448kHz. 73M1550 73M2550 ST16C1550/51/52 1fg1 16C1552 16c1550

    80C86

    Abstract: CA82C59A S101 modem circuit echo CA82C84A
    Text: "TUNDRA CA82C52 CMOS SERIAL CONTROLLER INTERFACE • Pin and functional compatibility with the industry standard 8252 • TTL input/output compatibility • Low power CMOS implementation • High speed - DC to 16 MHz operation • Single chip UART/BRG • Crystal or external clock input


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    PDF CA82C52 CA82C52 one7456 80C86 82C52 80C86 80C88 82C88 82C52 CA82C59A CA82C59A S101 modem circuit echo CA82C84A

    16C1450

    Abstract: 73M14 ST16C1450
    Text: ST16C1450 ST16C1451 STARTECH A n 26* E X 4 R C o m p a n y Printed August 3,1995 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER ST16C1450 PLCC Package DESCRIPTION The ST16C1450/51 is a universal asynchronous re­ ceiver and transmitter. A programmable baud rate


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    PDF ST16C1450 ST16C1451 ST16C1450 ST16C1450/51 448kHz. 73M1550 73M2550 ST16C1450/ 16C1450 73M14

    Untitled

    Abstract: No abstract text available
    Text: ^ STARTECH ST16C2450 An 25? EXflRCompany Printed August 3,1995 DUAL UNIVERSAL ASYNCHRONOUSRECEIVER/TRANSMITTER DESCRIPTION PLCC Package The ST16C2450 is a dual universal asynchronous receiverand transmitter. Independent programmable baud rate generators are provided to select transmit


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    PDF ST16C2450 ST16C2450 NS16C450 162450-RD-1 162450-WD-1 lQQ440fci

    Untitled

    Abstract: No abstract text available
    Text: STARTECH ST16C2552 An 2g*EX4RCompany Printed August 3,1995 DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST 16C2552 is a dual asynchronous receiver and transmitter with 16 byte transmit and receive FIFOs. Independent programmable baud rate generators are


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    PDF ST16C2552 16C2552 TheST16C2552 16552-RX-3 100440b

    16C2550

    Abstract: No abstract text available
    Text: ST16C2550 STARTECH Printed December 17, 1996 An J F EXARCompany DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST 16C2550 is a dual asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. Independent programmable baud rate generators are


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    PDF ST16C2550 16C2550 ST16C2550 NS16C550 162550-TX-2

    ST16C2550

    Abstract: NS16C550 INS8250 ST16C2450 ST16C2550CJ44 ST16C2550CP40 ST16C550 ht44
    Text: » STARTECH ST16C2550 Printed August 3, 1995 An 3 P EX4RCompany DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST 16C2550 is a dual asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. Independent programmable baud rate generators are


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    PDF ST16C2550 ST16C2550 NS16C550 16550-TX-2 100440b 16550-TX-3 00002b0 INS8250 ST16C2450 ST16C2550CJ44 ST16C2550CP40 ST16C550 ht44

    Untitled

    Abstract: No abstract text available
    Text: CA82C52 f ÿ TU N D RA CMOS SERIAL CONTROLLER INTERFACE Pin and functional compatibility with the industry standard 8252 TTL input/output compatibility Low power CMOS implementation High speed - DC to 16 MHz operation Single chip UART/BRG Crystal or external clock input


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    PDF CA82C52 CA82C52. CA82C52 80C86 82C52 80C86/CA82C52 GG04GE0

    Untitled

    Abstract: No abstract text available
    Text: JBTEXAR ST16C2552 DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFO’S DESCRIPTION The ST16C2552 2552 is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the NS16C552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs,


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    PDF ST16C2552 16-BYTE ST16C2552 NS16C552

    vl16c552

    Abstract: lpt port direction bit 5
    Text: VLSI Tech n o lo gy , in c . VL16C552 DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • Three-state TTL drive for the data and control bus on each channel • IBM PC/AT -compatible • Two VL16C550 ACEs • Hardware and software compatible with VL16C452 and VL16C452B


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    PDF VL16C552 VL16C550 VL16C452 VL16C452B VL16C552 lpt port direction bit 5