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    MC10E196FNR2G Price and Stock

    onsemi MC10E196FNR2G

    IC DELAY LINE 128TAP PROG 28PLCC
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    MC10E196FNR2G Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    MC10E196FNR2G On Semiconductor BBG ECL PROG DELAY CHIP Original PDF

    MC10E196FNR2G Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SC64046

    Abstract: SC64046FN SC64046FNG SB99026MNG sb99026mn ECLTSSOP20EVB MC10EL58D NB3N3011 SB99026MNR2G SC64029FN
    Text: 1 EO1_LISTED_PART_ID MC100ELT20D MC100ELT20DG MC100ELT20DR2 MC100ELT20DR2G MC100ELT20DTG MC100ELT20DTR2 MC100ELT20DTR2G MC100ELT21D MC100ELT21DG MC100ELT21DR2 MC100ELT21DR2G MC100ELT21DTG MC100ELT21DTR2 MC100ELT21DTR2G MC100ELT22D MC100ELT22DG MC100ELT22DR2


    Original     		PDF MC100ELT20D MC100ELT20DG MC100ELT20DR2 MC100ELT20DR2G MC100ELT20DTG MC100ELT20DTR2 MC100ELT20DTR2G MC100ELT21D MC100ELT21DG MC100ELT21DR2 SC64046 SC64046FN SC64046FNG SB99026MNG sb99026mn ECLTSSOP20EVB MC10EL58D NB3N3011 SB99026MNR2G SC64029FN

    MC10E196

    Abstract: E195 E196 MC100E196
    Text: MC10E196, MC100E196 5V ECL Programmable Delay Chip Description The MC10E/100E196 is a programmable delay chip PDC designed primarily for very accurate differential ECL input edge placement applications. The delay section consists of a chain of gates and a linear ramp delay


    Original     		PDF MC10E196, MC100E196 MC10E/100E196 MC10E196/D MC10E196 E195 E196 MC100E196

    E195

    Abstract: E196 MC100E196 MC10E196
    Text: MC10E196, MC100E196 5V ECL Programmable Delay Chip Description The MC10E/100E196 is a programmable delay chip PDC designed primarily for very accurate differential ECL input edge placement applications. The delay section consists of a chain of gates and a linear ramp delay


    Original     		PDF MC10E196, MC100E196 MC10E/100E196 MC10E196/D E195 E196 MC100E196 MC10E196

    Untitled

    Abstract: No abstract text available
    Text: MC10E196, MC100E196 5V ECL Programmable Delay Chip Description The MC10E/100E196 is a programmable delay chip PDC designed primarily for very accurate differential ECL input edge placement applications. The delay section consists of a chain of gates and a linear ramp delay


    Original     		PDF MC10E196, MC100E196 MC10E/100E196 MC10E196/D