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    MASTER SLAVE CLOCK Search Results

    MASTER SLAVE CLOCK Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S569FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=40 / Iout(A)=2.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation

    MASTER SLAVE CLOCK Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    marking t92

    Abstract: Marking T92 6 PIN TR
    Text: MC10186 Hex D Master-Slave Flip-Flop with Reset The MC10186 contains six high–speed, master slave type “D” flip–flops. Clocking is common to all six flip–flops. Data is entered into the master when the clock is low. Master to slave data transfer


    Original     		PDF MC10186 marking t92 Marking T92 6 PIN TR

    KEIL

    Abstract: No abstract text available
    Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.30 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation  Requires only two pins SDA and SCL to interface to I2C bus


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.10 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation  Requires only two pins SDA and SCL to interface to I2C bus


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.0 Features • Industry-standard NXP® I2C bus interface • Supports Slave, Master, Multi-Master and Multi-Master-Slave operation  Only two pins SDA and SCL required to interface to I2C bus


    Original     		PDF

    MC10186

    Abstract: MC10186FN MC10186L MC10186P
    Text: MC10186 Hex D Master-Slave Flip-Flop with Reset The MC10186 contains six high–speed, master slave type “D” flip–flops. Clocking is common to all six flip–flops. Data is entered into the master when the clock is low. Master to slave data transfer


    Original     		PDF MC10186 MC10186 r14525 MC10186/D MC10186FN MC10186L MC10186P

    Untitled

    Abstract: No abstract text available
    Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.20 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation  Requires only two pins SDA and SCL to interface to I2C bus


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.1 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation  Requires only two pins SDA and SCL to interface to I2C bus


    Original     		PDF

    MC10186

    Abstract: MC10186FN MC10186L MC10186P
    Text: MC10186 Hex D Master-Slave Flip-Flop with Reset The MC10186 contains six high–speed, master slave type “D” flip–flops. Clocking is common to all six flip–flops. Data is entered into the master when the clock is low. Master to slave data transfer


    Original     		PDF MC10186 MC10186 r14525 MC10186/D MC10186FN MC10186L MC10186P

    Untitled

    Abstract: No abstract text available
    Text: MC10186 Hex D Master-Slave Flip-Flop with Reset The MC10186 contains six high–speed, master slave type “D” flip–flops. Clocking is common to all six flip–flops. Data is entered into the master when the clock is low. Master to slave data transfer


    Original     		PDF MC10186 MC10186 r14525 MC10186/D

    Untitled

    Abstract: No abstract text available
    Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 2.20 Features • Industry standard Philips® I2C bus interface • Supports Slave, Master, Multi-Master and Multi-Master-Slave operation    Only two pins SDA and SCL required to interface to I 2C bus


    Original     		PDF

    RNW RESISTOR

    Abstract: arbitrage verilog code for I2C MASTER
    Text: PSoC Creator Component Data Sheet I2C Master/Multi-Master/Slave 2.10 Features • Industry standard Philips® I2C bus interface • Supports Slave, Master, Multi-Master and Multi-Master-Slave operation • Only two pins SDA and SCL required to interface to I2C bus


    Original     		PDF

    megafunction

    Abstract: EP3SE50 EP3C40-6 EP2C35-6
    Text: Run-time programmable master or slave mode operation SPI_MS Serial Peripheral Interface Master/Slave Altera Megafunction High bit rates Bit rates generated in Master mode: ÷2, ÷4, ÷8, ÷10, ÷12, …, ÷512 of the system clock Bit rates supported in slave


    Original     		PDF EP2C35-6 EP3C40-6 EP1S20-5 EP2S60-3 EP3SE50-2 megafunction EP3SE50 EP3C40-6 EP2C35-6

    MC10176L

    Abstract: No abstract text available
    Text: MC10176 Hex D Master/Slave Flip-Flop The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going Clock transition. Thus, outputs may


    Original     		PDF MC10176 MC10176P MC10176L

    MC10176

    Abstract: 2T922 MC10176FN MC10176L MC10176P T92 marking
    Text: MC10176 Hex D Master/Slave Flip-Flop The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going Clock transition. Thus, outputs may


    Original     		PDF MC10176 MC10176 r14525 MC10176/D 2T922 MC10176FN MC10176L MC10176P T92 marking

    verilog code for slave SPI with FPGA

    Abstract: XC3S50 XC2V80
    Text: Run-time programmable master or slave mode operation SPI_MS Serial Peripheral Interface Master/Slave Xilinx Core High bit rates Bit rates generated in Master mode: ÷2, ÷4, ÷8, ÷10, ÷12, …, ÷512 of the system clock Bit rates supported in slave mode: fSCK ≤ fSYSCLK ÷4


    Original     		PDF 64x18 XC3S50-5 XC3S100E-5 XC2V80-6 XC4VLX15-12 XC5VLX30-3 verilog code for slave SPI with FPGA XC3S50 XC2V80

    d5611

    Abstract: MC10176 DL122
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Hex D Master/Slave Flip-Flop MC10176 The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going


    Original     		PDF MC10176 MC10176 DL122 MC10176/D* MC10176/D d5611

    MOTOROLA 3150

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Hex D Master/Slave Flip-Flop The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going


    OCR Scan     		PDF MC10176 50-ohm DL122 MOTOROLA 3150

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA MASTER-SLAVE FLIP-FLOP MASTER-SLAVE FLIP-FLOP Master slave construction renders the MC1670 relatively insen­ sitive to the shape o f the clock w aveform, since only the voltage levels at the clock inputs control the transfer of inform ation from


    OCR Scan     		PDF MC1670 MC1670.

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Hex D Master-Slave Flip-Flop With Reset The MC10186 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going


    OCR Scan     		PDF MC10186 MC10186 50-ohm DL122 Hflb30

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Hex D Master-Slave Flip-Flop With Reset The MC10186 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going


    OCR Scan     		PDF MC10186 MC10186 50-ohm DL122

    8XC751

    Abstract: No abstract text available
    Text: Philips Semiconductors l2C slave routines for the 83C751 AN433 Author: Greg Goodhue Presents short and simple l2C software routines that support only slave rather than master or master & slave operation and an A S M demonstration program. The slave-only software in this app note complements the master


    OCR Scan     		PDF 83C751 AN433 AN422 8XC751 AN434 8XC751. AN435 8XC552, 8XC562,

    transistor BC 550

    Abstract: TRANSISTOR tr4 SP1670LC
    Text: SP1670 MASTER/SLAVE TYPE D FLIP-FLOP The SP1670 is a D-type Master-Slave Flip-Flop designed for use in high speed digital applications. Master-slave construction renders the SP1670 relatively insensitive to the shape o f the clock waveform, since only the voltage levels at


    OCR Scan     		PDF SP1670 SP1670 transistor BC 550 TRANSISTOR tr4 SP1670LC

    SP16F70

    Abstract: No abstract text available
    Text: SP16F70 SP16F70 MASTER/SLAVE D TYPE FLIP-FLOP The SP16F70 is a D-type Master-Slave Flip-Flop designed for use in high speed digital applications. Master-slave construction renders the SP16F70 relatively insensitive to the shape of the clock waveform, since only the voltage levels at


    OCR Scan     		PDF SP16F70 SP16F70

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Hex D Master/Slave Flip-Flop MC10176 The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going


    OCR Scan     		PDF MC10176 MC10176 50-ohm DL122