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    MASTER ATM CONTROLLER Search Results

    MASTER ATM CONTROLLER Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    SSM6J808R Toshiba Electronic Devices & Storage Corporation MOSFET, P-ch, -40 V, -7 A, 0.035 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K819R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 100 V, 10 A, 0.0258 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K809R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 60 V, 6.0 A, 0.036 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K504NU Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 30 V, 9.0 A, 0.0195 Ohm@10V, UDFN6B, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM3K361R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 100 V, 3.5 A, 0.069 Ohm@10V, SOT-23F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM3K341R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 60 V, 6.0 A, 0.036 Ohm@10V, SOT-23F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation

    MASTER ATM CONTROLLER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CN8236EBGB

    Abstract: FIFO buffer "variable threshold" VCCS protocol VCCS Communication Protocol CN8223 CN8236
    Text: OC-3 ATM SAR Controller with UTOPIA Level 2 CN8236 ATM OC-3 Service SAR Plus with xBR Traffic Management Mindspeed’s CN8236 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave controllers,


    Original     		PDF CN8236 CN8236 CN8236EBGB FIFO buffer "variable threshold" VCCS protocol VCCS Communication Protocol CN8223

    VCCS protocol

    Abstract: CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code
    Text: OC-12 ATM SAR with UTOPIA Level 2 CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management Mindspeed’s CN8237 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave > K E Y F E AT U R E S


    Original     		PDF OC-12 CN8237 CN8237 GR-1248 VCCS protocol CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code

    I960CA

    Abstract: CRC10 RS8234 RS8250 on-demand multicast messages
    Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8234 RS8234 28234-DSH-001-B I960CA CRC10 RS8250 on-demand multicast messages

    Untitled

    Abstract: No abstract text available
    Text: RS8235 Endstation ATM ServiceSAR with xBR Traffic Management The RS8235 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8235 RS8235 RS8234 RS8235; 28235-DSH-001-B

    Untitled

    Abstract: No abstract text available
    Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8234 RS8234 00413A

    Untitled

    Abstract: No abstract text available
    Text: RS8235 Endstation ATM ServiceSAR with xBR Traffic Management The RS8235 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8235 RS8235 RS8234 RS8235; 00407A

    CN8234

    Abstract: BT82
    Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8234 RS8234 28234-DSH-001-A CN8234 BT82

    6233I

    Abstract: BSDE RS8234 RS8235 RS8250 2790L marking code VBRC
    Text: RS8235 Endstation ATM ServiceSAR with xBR Traffic Management The RS8235 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and


    Original     		PDF RS8235 RS8235 RS8234 RS8235; 28235-DSH-001-C 6233I BSDE RS8250 2790L marking code VBRC

    I960CA

    Abstract: CN8236 CX28250EVM Bt8223
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


    Original     		PDF CN8236 CN8236 28236-DSH-001-B I960CA CX28250EVM Bt8223

    Untitled

    Abstract: No abstract text available
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


    Original     		PDF CN8236 CN8236 28236-DSH-001-A

    Untitled

    Abstract: No abstract text available
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


    Original     		PDF CN8236 CN8236 00372A

    Untitled

    Abstract: No abstract text available
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


    Original     		PDF CN8236 CN8236 500372B

    I960CA

    Abstract: CN8236 CN8236EBG 28236-12 0x940
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


    Original     		PDF CN8236 CN8236 I960CA CN8236EBG 28236-12 0x940

    140288

    Abstract: CN8237EB
    Text: CN8237 ATM OC12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


    Original     		PDF CN8237 CN8237 140288 CN8237EB

    PCI x1 express PCB dimensions artwork

    Abstract: 140288 CN8237EBGB CN8236 RS8234 RS8235 RS8254
    Text: CN8237 ATM OC12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


    Original     		PDF CN8237 CN8237 PCI x1 express PCB dimensions artwork 140288 CN8237EBGB CN8236 RS8234 RS8235 RS8254

    CN8237EBGB

    Abstract: CX29704 RS8234 IR remote control transmitter circuit HAD48 SCHH CN8237EB TDA 2827
    Text: CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


    Original     		PDF CN8237 OC-12 CN8237 28237-DSH-001-C CN8237EBGB CX29704 RS8234 IR remote control transmitter circuit HAD48 SCHH CN8237EB TDA 2827

    CN8237EBGB

    Abstract: CX29704 RS8234 RS8235 PCI x1 express PCB dimensions artwork BC 5473
    Text: CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


    Original     		PDF CN8237 OC-12 CN8237 28237-DSH-001-B CN8237EBGB CX29704 RS8234 RS8235 PCI x1 express PCB dimensions artwork BC 5473

    mcs8144

    Abstract: MPC8360 MPC8560 MSC8101 MSC8144 0x03EF 0x00e00000 AN3355 MCP8560
    Text: Freescale Semiconductor Application Note AN3355 Rev. 0 1/2007 Using the UTOPIA Interface on the MSC8144 DSP by Miguel Liber The MSC8144 DSP device includes an ATM controller that supports a UTOPIA level 2 L2 interface through its QUICC Engine technology block. The ATM interface


    Original     		PDF AN3355 MSC8144 MPC8560 mcs8144 MPC8360 MSC8101 0x03EF 0x00e00000 AN3355 MCP8560

    VIA Apollo Master

    Abstract: APOLLO 2 Alsthom I90135 AC97 I80134 I90188 ATM coding ATM circuit diagram ADSL Modem circuit diagram
    Text: Apollo 2 Chipset Product Data Sheet Version 1.1 January 1999 Apollo 2 Chipset Full Rate Hardware-Based Controllerless ADSL Chipset for PCs Features General Description ♦ ANSI T1.413 Issue 2, ITU-T G.992.1 (G.dmt) compliant ♦ PCI controller based 3 chip solution


    Original     		PDF 32-bit 160-pin I90135 144-pin I80134 64-pin I90188 VIA Apollo Master APOLLO 2 Alsthom AC97 ATM coding ATM circuit diagram ADSL Modem circuit diagram

    Untitled

    Abstract: No abstract text available
    Text: Product Brief May 2003 TAAD08JU21BCLS2-DB SAR-2K AAL2/AAL5 SAR Engine, Versions 2.1 and 3.1 Features • ■ ■ ■ ■ ■ ■ System-on-a-chip integrated circuit supports ATM adaptation process for next-generation wireless base transmission station (BTS), node B, base station controller (BSC), radio network controller


    Original     		PDF TAAD08JU21BCLS2-DB PB02-055ATM-2 PB02-055ATM-1)

    TAAD08JU2

    Abstract: voice control vc 200 RF limited APC 2020 B TR008 AF-VTOA-0113
    Text: Product Brief May 2003 TAAD08JU21BCLSL3A-DB SAR-1K AAL2/AAL5 SAR Engine, Versions 2.1 and 3.1 Features • System-on-a-chip integrated circuit supports ATM adaptation process for next-generation wireless base transmission station (BTS), node B, base station controller (BSC), radio network controller


    Original     		PDF TAAD08JU21BCLSL3A-DB PB03-109ATM-1 PB03-109ATM) TAAD08JU2 voice control vc 200 RF limited APC 2020 B TR008 AF-VTOA-0113

    CRC-10

    Abstract: MB86695 SQFP208 via 6103 phy
    Text: Product Flyer FireStream 5 ATM 52 Mbps SAR Device MB86695 MB86695 April 2000 Version 1.0 FireStream™50 ATM 52 Mbps SAR Device The FireStream50 is a low cost ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 AAL5 . ATM cells are received through a


    Original     		PDF MB86695 FireStreamTM50 FireStream50 52Mbps. FML/NPD/FS50/FL/2359 SQFP208 FML/NPD/FS50/FL/2359 CRC-10 MB86695 SQFP208 via 6103 phy

    Untitled

    Abstract: No abstract text available
    Text: Preliminary P/N IBM30CMATPS00PA0AT ATM 25Mbps PCI Controller Module IBM International Business Machines Corporation, 1997 All Rights Reserved • The ATM 25Mbps PCI Controller is a 32-bit Bus Master, which means REQ64, ACK64, and PAR64 are not implemented, nor are the


    OCR Scan     		PDF IBM30CMATPS00PA0AT 25Mbps 32-bit REQ64, ACK64, PAR64

    Untitled

    Abstract: No abstract text available
    Text: Preliminary P/N IBM30CMATPS00PA0AT ATM 2 5 M b p s P CI C on t r ol l e r M o d ul e IBM International Business Machines Corporation, 1997 All Rights Reserved • The ATM 25Mbps PCI Controller is a 32-bit Bus Master, which means REQ64, ACK64, and PAR64 are not implemented, nor are the


    OCR Scan     		PDF IBM30CMATPS00PA0AT