BP1148
Abstract: MACH111-20JC MACH110 MACH210 MACH215 PAL22V10
Text: FINAL COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 MACH111 Family High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices
|
Original
|
PDF
|
MACH111
PAL26V16"
MACH110,
MACH210,
MACH211,
MACH215
MACH110
PAL22V10
BP1148
MACH111-20JC
MACH110
MACH210
MACH215
|
MACH111
Abstract: HP3070 PALCE22V10 mach111 plcc MACHpro
Text: 1 FINAL MACH 1 & 2 FAMILIES COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 44 Pins in PLCC and TQFP ◆ 32 Macrocells ◆ 5 ns tPD Commercial, 7.5 ns tPD Industrial ◆ 182 MHz fCNT ◆ 32 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs
|
Original
|
PDF
|
PALCE26V16"
MACH211
MACH111
PQT044
44-Pin
16-038-PQT-2
MACH111-5/7/10/12/15
HP3070
PALCE22V10
mach111 plcc
MACHpro
|
HP3070
Abstract: PALCE22V10
Text: 1 FINAL MACH 1 & 2 FAMILIES COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 44 Pins in PLCC and TQFP ◆ 32 Macrocells ◆ 5 ns tPD Commercial, 7.5 ns tPD Industrial ◆ 182 MHz fCNT ◆ 32 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs
|
Original
|
PDF
|
PALCE26V16"
MACH211
MACH111
PQT044
44-Pin
16-038-PQT-2
MACH111-5/7/10/12/15
HP3070
PALCE22V10
|
STR F 6168
Abstract: str 6168 teradyne flex tester Vantis macro library STR F 8033 MACH111 12JC 14JI str f 6168 data sheet HI-LO ALL-07 STR F 6168 31 v power teradyne lasar
Text: FINAL COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 MACH 111-5/7/10/12/15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 44 Pins in PLCC and TQFP ◆ 32 Macrocells ◆ 5 ns tPD Commercial, 7.5 ns tPD Industrial ◆ 182 MHz fCNT ◆ 32 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs
|
Original
|
PDF
|
PALCE26V16"
MACH211
MACH111
PQT044
44-Pin
16-038-PQT-2
MACH111-5/7/10/12/15
STR F 6168
str 6168
teradyne flex tester
Vantis macro library
STR F 8033
MACH111 12JC 14JI
str f 6168 data sheet
HI-LO ALL-07
STR F 6168 31 v power
teradyne lasar
|
MACH131SP-5YC-7YI
Abstract: 14051k MACH Programmer PAL 007 PAL 007 A Pal programming MACH111SP MACH211SP mach210 die Vantis macro gates
Text: MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
|
Original
|
PDF
|
5/10/12/15-ns
5/10/12/14/18-ns
MACH221
MACH221SP
MACH231
MACH231SP
MACH211
MACH211SP
MACH131SP-5YC-7YI
14051k
MACH Programmer
PAL 007
PAL 007 A
Pal programming
MACH111SP
MACH211SP
mach210 die
Vantis macro gates
|
mach210 die
Abstract: AP-Q mach schematic mach 1 family MACH Programmer PAL 007 PAL 007 A PAL 007 c Pal programming MACH111SP
Text: MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages SpeedLocking – guaranteed fixed timing up to 16 product terms
|
Original
|
PDF
|
5/10/12/15-ns
5/10/12/14/18-ns
interco14,
MACH221SP
MACH231
MACH231SP
MACH211
MACH211SP
mach210 die
AP-Q
mach schematic
mach 1 family
MACH Programmer
PAL 007
PAL 007 A
PAL 007 c
Pal programming
MACH111SP
|
MACH211SP
Abstract: mach schematic MACH111SP
Text: MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
|
Original
|
PDF
|
5/10/12/15-ns
5/10/12/14/18-ns
MACH221SP
MACH231
MACH231SP
MACH211
MACH211SP
MACH211SP
mach schematic
MACH111SP
|
ulc xc3030
Abstract: PQFP 176 Xilinx XC3090 altera EP300 EPM7128 Temic ulc xc3030 EPM7128 PLCC PLSI2032 Actel A1020 PLUS405
Text: ULC Reference Guide This reference guide lists most devices available for conversion. This list is not exhaustive, as new devices are added regularly. Additional devices not shown in this list may also be supported. Updated versions are available on the TEMIC web site. Check with factory if
|
Original
|
PDF
|
ULC/A1010
ULC/A1020
ulc xc3030
PQFP 176
Xilinx XC3090
altera EP300
EPM7128
Temic ulc xc3030
EPM7128 PLCC
PLSI2032
Actel A1020
PLUS405
|
MACH211-14
Abstract: HP3070 PALCE22V10 19601C-1
Text: MACH 1 & 2 FAMILIES 1 FINAL COM’L: -7/10/12/15 IND: -10/12/14/18 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 44 Pins in PLCC and TQFP ◆ 64 Macrocells ◆ 7.5 ns tPD Commercial, 10 ns tPD Industrial ◆ 133 MHz fCNT ◆ 32 I/Os; 2 dedicated inputs; 4 dedicated inputs/clocks
|
Original
|
PDF
|
PALCE26V16"
MACH111
MACH211
PQT044
44-Pin
16-038-PQT-2
MACH211-7/10/12/15/20
MACH211-14
HP3070
PALCE22V10
19601C-1
|
PAL22V16
Abstract: MACH110 MACH210 MACH215 PAL22V10
Text: FINAL COM’L: -12/15/20 IND: -14/18/24 MACH110-12/15/20 Lattice/Vantis High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial 14 ns tPD Industrial
|
Original
|
PDF
|
MACH110-12/15/20
PAL22V16"
MACH111,
MACH210,
MACH211,
MACH215
MACH110
PAL22V10
PAL22VQ2
PAL22V16
MACH210
MACH215
|
PAL22V16
Abstract: MACH110 MACH210 MACH215 PAL22V10 AIR33
Text: FINAL COM’L: -12/15/20 IND: -14/18/24 MACH110-12/15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial 14 ns tPD Industrial
|
Original
|
PDF
|
MACH110-12/15/20
PAL22V16"
MACH111,
MACH210,
MACH211,
MACH215
MACH110
PAL22V10
14127I-26
PAL22V16
MACH210
MACH215
AIR33
|
MACH111SP
Abstract: HP3070 MACH211SP PALCE22V10
Text: 1 FINAL MACH 1 & 2 FAMILIES COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 MACH 1 & 2 Families MACH111SP-5/7/10/12/15 High-Performance EE CMOS In-System Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ JTAG-Compatible, 5-V in-system programming ◆ 44 Pins in PLCC and TQFP
|
Original
|
PDF
|
MACH111SP-5/7/10/12/15
PALCE26V16"
MACH211SP
PQT044
44-Pin
16-038-PQT-2
MACH111SP
HP3070
MACH211SP
PALCE22V10
|
Untitled
Abstract: No abstract text available
Text: FINAL BEYO N D PERFO RM A N CE COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 M A C H 1 11 - 5 /7 /1 0 /1 2 /1 5 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 44 Pins in PLCC and TQFP
|
OCR Scan
|
PDF
|
fcm32
PALCE26V16â
MACH211
44-Pin
MACH111-5/7/10/12/15
PQT044
|
Untitled
Abstract: No abstract text available
Text: V AN A — / FINAL ▼ M A C H 1 1 1 -5 /7 /1 0 /1 2 /1 5 N A M D T I S C O M 'L :-5/7/10/12/15 IN D :-7/10/12/14/18 High-Performance EE CMOS Programmable Logic C O M P A N Y DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 44 Pins in PLCC and TQFP
|
OCR Scan
|
PDF
|
PALCE26V16"
16-038-PQ
MACH111-5/7/10/12/15
|
|
gg3b
Abstract: No abstract text available
Text: FINAL COM’L: -5/7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 11 -5 /7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tpD
|
OCR Scan
|
PDF
|
PAL26V16â
MACH110,
MACH210,
MACH211,
MACH215
MACH110
MACH111
16-038-SQ
PQT044
44-Pin
gg3b
|
Untitled
Abstract: No abstract text available
Text: FIN AL M A C H 1 1 1 COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 AM D£t F a m ily High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices
|
OCR Scan
|
PDF
|
PAL26V16â
MACH110,
MACH210,
MACH211,
MACH215
MACH110
MACH111
02S7Seb
PQT044
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY M ACH COM’L: -7/10/12/15/20 a 1 1 1 - 7 /1 0 /1 2 /1 5 /2 0 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 4 clock choices ■ 7.5 ns tpD
|
OCR Scan
|
PDF
|
PAL26V16â
MACH110,
MACH210,
MACH215
MACH110
MACH111
PAL22V10
44-Pin
28-Pin)
27-044-1221-028A
|
sp9648
Abstract: ci pal 014
Text: V A N B EY O N D P ER F O R M A N C E MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
|
OCR Scan
|
PDF
|
5/10/12/15-ns
5/10/12/14/18-ns
MACH211SP
MACH221
MACH221SP
MACH231
MACH231SP
MACH231SP
MACH131SP-5YC-
sp9648
ci pal 014
|
k019
Abstract: 14051 mach schematic MACH111SP MACH211SP mach131 DAPQ 11
Text: MACH 1 and 2 CPLD Families BEYOND PERFO R M A N CE High-Performance EE CMOS Programmable Logic FEATURES ♦ ♦ ♦ ♦ ♦ ♦ ♦ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
|
OCR Scan
|
PDF
|
5/10/12/15-ns
5/10/12/14/18-ns
programmin14
MACH111SP
MACH131
MACH131SP
MACH211
MACH211SP
MACH221
MACH221SP
k019
14051
mach schematic
DAPQ 11
|
Untitled
Abstract: No abstract text available
Text: MACH 1 and 2 CPLD Families BEYOND PERFORM ANCE H igh-Perform ance EE C M O S P rogram m able Logic FEATURES ♦ ♦ ♦ ♦ ♦ ♦ — Programmable polarity — Registered or com binatorial outputs — Internal and I/O feedback paths — D-type or T-type flip-flops
|
OCR Scan
|
PDF
|
5/10/12/14/18-ns
MACH111SP
MACH131
MACH131SP
MACH211
MACH211SP
MACH221
MACH221SP
MACH231
MACH231SP
|
Untitled
Abstract: No abstract text available
Text: MACH 1 and 2 CPLD Families BEY O N D PER FO RM AN C E High-Performance EE CMOS Programmable Logic FEATURES — — — — — — — Programmable polarity Registered or com binatorial outputs Internal and I/O feedback paths D-type or T-type flip-flops O utput Enables
|
OCR Scan
|
PDF
|
MACH231
MACH231SP
131SP
|
Untitled
Abstract: No abstract text available
Text: CO M ’L: -5/7.5/10/12/15/20 M A C H 1 11 -5 /7 /1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Program m able power-down mode ■ 32 M acrocells ■ ■ 5 ns tpD ■ 32 Flip-flops; 4 clock choices
|
OCR Scan
|
PDF
|
ACH110,
MACH210,
ACH211,
MACH215
MACH110
L26V16â
MACH111
0Q37M01
PQR208
208-Pin
|
Untitled
Abstract: No abstract text available
Text: FINAL COM’L: -12/15/20 IND: -14/18/24 Lattice/Vantis M A C H 1 1 0 -1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tpD Commercial
|
OCR Scan
|
PDF
|
PAL22V16â
MACH111,
MACH210,
MACH211,
MACH215
PAL22V10
MACH110
44-Pin
MACH110-12/15/20
16-038-SQ
|
Untitled
Abstract: No abstract text available
Text: FINAL C O M 'L : - 7 /1 0 /1 2 /1 5 IN D : -1 0 /1 2 /1 4 /1 8 M A C H 2 1 1 -7 /1 0 /1 2 /1 5 V A N A N A M D T I S High-Performance EE CMOS Programmable Logic C O M P A N Y DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 44 Pins in PLCC and TQFP
|
OCR Scan
|
PDF
|
PALCE26V16"
MACH11
1-20MAX
16-038-PQT-2
MACH211
|