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    MAC LEARNING Search Results

    MAC LEARNING Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TDA4VM88TGBALFRQ1 Texas Instruments Automotive system-on-a-chip for L2, L3 and near-field analytic systems using deep learning 827-FCBGA -40 to 125 Visit Texas Instruments
    AM5749ABZXEA Texas Instruments Sitara processor: dual arm Cortex-A15 & dual DSP, multimedia, ECC @ DDR, secure boot & deep learning 760-FCBGA -40 to 105 Visit Texas Instruments Buy
    AM5749ABZXA Texas Instruments Sitara processor: dual arm Cortex-A15 & dual DSP, multimedia, ECC @ DDR, secure boot & deep learning 760-FCBGA -40 to 105 Visit Texas Instruments
    AM5749ABZX Texas Instruments Sitara processor: dual arm Cortex-A15 & dual DSP, multimedia, ECC @ DDR, secure boot & deep learning 760-FCBGA 0 to 90 Visit Texas Instruments Buy
    TDA4VM88TGBALFR Texas Instruments Dual Arm® Cortex®-A72 SoC and C7x DSP with deep-learning, vision and multimedia accelerators 827-FCBGA -40 to 105 Visit Texas Instruments

    MAC LEARNING Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    ethernet chip switch

    Abstract: 1gbps serdes 10gbps serdes MB87Q3050 10-GBPS
    Text: 12-Port 10Gbps Ethernet Switch Chip – MB87Q3050 XAUI MAC Filter/Lookup XAUI MAC Filter/Lookup XAUI MAC Filter/Lookup On-Chip Shared Memory and Cross-bar VLAN Out Filter MAC XAUI VLAN Out Filter MAC XAUI VLAN Out Filter MAC XAUI Buffer Management MAC/VLAN Table


    Original     		12-Port 10Gbps MB87Q3050 240Gbps 1Gbps/100Mbps/10Mbps 10GEASSP-FS-20981-6/2003 ethernet chip switch 1gbps serdes 10gbps serdes MB87Q3050 10-GBPS PDF

    MB87Q3140

    Abstract: XAUI link ip 10gbps serdes CX4 cable ethernet chip switch
    Text: 12-Port 10Gbps Ethernet Switch Chip – MB87Q3140 XAUI/CX4 PHY MAC Filter/Lookup MAC PHY XAUI/CX4 MAC PHY XAUI/CX4 MAC PHY XAUI/CX4 On-Chip XAUI/CX4 PHY MAC Shared Filter/Lookup Memory XAUI/CX4 PHY MAC Filter/Lookup Buffer Management MAC/VLAN Table Table Maintenance


    Original     		12-Port 10Gbps MB87Q3140 240Gbps 450ns 1Gbps/100Mbps/10Mbps 10GEASSP-FS-21118-5/2005 MB87Q3140 XAUI link ip 10gbps serdes CX4 cable ethernet chip switch PDF

    240GB

    Abstract: 12-Port 10gbps serdes 1gbps serdes 10Gbps MB87Q3070 ethernet chip switch ethernet switch
    Text: 12-Port 10Gbps Ethernet Switch Chip – MB87Q3070 eXAUI MAC Filter/Lookup eXAUI MAC Filter/Lookup eXAUI MAC Filter/Lookup On-Chip Shared Memory and Cross-bar VLAN Out Filter MAC eXAUI VLAN Out Filter MAC eXAUI VLAN Out Filter MAC eXAUI Buffer Management MAC/VLAN Table


    Original     		12-Port 10Gbps MB87Q3070 240Gbps 1Gbps/100Mbps/10Mbps 10GEASSP-FS-21033-3/2004 240GB 10gbps serdes 1gbps serdes MB87Q3070 ethernet chip switch ethernet switch PDF

    RF antenna projects

    Abstract: rf transciever communication projects RF TRANSISTORS AND RECEIVE WIRELESS MC13192
    Text: RF Transceiver Student Learning Kit Featuring the MC13192 family Easily add RF capability to course or projects Can be used in simple MAC SMAC or ZigBee configurations Common Course Applications • Wireless sensing and control • Introduction to communication protocols


    Original     		MC13192 AP13192USLK UVP-14087 RF antenna projects rf transciever communication projects RF TRANSISTORS AND RECEIVE WIRELESS PDF

    Untitled

    Abstract: No abstract text available
    Text: Advance Information SEMICONDUCTORS _ ^ m MUAA Routing Coprocessor Fam ily APPLICATION BENEFITS > > > > > > High performance MAC Address filter for multiport switches and routers Filters 7.14 million packets per second; one search and one learn operation per packet


    OCR Scan     		80-bit 32-bit PDF

    En1522

    Abstract: RMII12 "filtering database" RMII PHY uplink DMA13 MTD516 REG14 RXD11 RMII Specification revision 1.2
    Text: MYSON TECHNOLOGY MTD516 Preliminary 16 Port 10M/100M Ethernet Switch FEATURES GENERAL DESCRIPTION • IEEE802.3 and IEEE802.3u compliant. • Provide 16 RMII (Reduced Media Independent Interface) ports. • Programmable 1K/8K MAC addresses filtering database.


    Original     		MTD516 10M/100M IEEE802 pressure/802 83MHz MTD516 En1522 RMII12 "filtering database" RMII PHY uplink DMA13 REG14 RXD11 RMII Specification revision 1.2 PDF

    ADVANCED COMMUNICATION DEVICES

    Abstract: ACD82124 ACD80800 ACD80900 ACD82012 PQFP128 CPU architecture block diagram
    Text: Advanced Communication Devices ACD80800 Address Resolution Logic ARL with 8K MAC Addresses SUMMARY FEATURES The ACD80800 serves as an Address Resolution Logic for ACD’s switch controller chips ACD82124, ACD82012 etc. through a glueless ARL interface. It


    Original     		ACD80800 ACD80800 ACD82124, ACD82012 ACD80900 ACD80800, ACD82xxx ADVANCED COMMUNICATION DEVICES ACD82124 ACD80900 PQFP128 CPU architecture block diagram PDF

    gvrp

    Abstract: PM3370 PM3380 PM3390
    Text: PMC-Sierra,Inc. Preliminary PM3380 Gigabit Switch Port-Controller with Advanced Features MANAGEMENT FEATURES • Monolithic intelligent Gigabit Ethernet Switch Port Controller. • Integrates an IEEE 802.3z-compatible Gigabit MAC. • May be used alone or in combination


    Original     		PM3380 PM3390 Store-555 PMC-980236 gvrp PM3370 PM3380 PDF

    CX82340

    Abstract: 802.11b TI ADSL Integrated Circuits ADSL wireless router ARM940T MAC learning RAKE Receiver with Decision Feedback Equalizer
    Text: Broadband Modems ADSL Modems ADSL – Wireless Access Point Router Solution CX82340 ADSL Router with Integrated 802.11b MAC/Baseband Conexant’s broadband communications portfolio includes a comprehensive suite of semiconductor solutions that enable the digital home and information


    Original     		CX82340 CX82340 02110A 802.11b TI ADSL Integrated Circuits ADSL wireless router ARM940T MAC learning RAKE Receiver with Decision Feedback Equalizer PDF

    samsung ltcc

    Abstract: No abstract text available
    Text: PRELIMINARY Rev: 060607 DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 Ethernet Over PDH Mapping Devices General Description The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by encapsulating MAC frames in GFP-F, HDLC, cHDLC,


    Original     		DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 200ms 256Mb, 125MHz DS33X162 deviX81/X42/X41/X11/W41/W11 144-Ball 56-G6008-003) DS33X162/X161/X82/X81/X42/X41/X11/W41/W11 samsung ltcc PDF

    XTEA-CBC-MAC-32

    Abstract: DS39776 add round key for aes algorithm MRF24J40 DS39776 wireless communication pdf microchip MRF49XA AES-128 AN1283 AN1284 MRF24J40
    Text: AN1283 Microchip Wireless MiWi Media Access Controller – MiMAC Author: Yifeng Yang Microchip Technology Inc. INTRODUCTION The primary function of wireless communication protocol is to transmit and/or receive information between two nodes. The Media Access Controller (MAC) layer


    Original     		AN1283 DS01283A-page XTEA-CBC-MAC-32 DS39776 add round key for aes algorithm MRF24J40 DS39776 wireless communication pdf microchip MRF49XA AES-128 AN1283 AN1284 MRF24J40 PDF

    AT79C1030

    Abstract: GMII switch 1000-Mbps 8-port GbE PHY atmel 802
    Text: NE T W O R K S T O R A G E AT79C1030 8-Port Gigabit Ethernet CoS Switch The AT79C1030 utilizes the Store and Forward switching architecture to manage packet switching between the eight independent Ethernet ports. The switch records learning , the relation between MAC addresses (including VLAN


    Original     		AT79C1030 AT79C1030 1/05/2M 10/100/1000Mbps GMII switch 1000-Mbps 8-port GbE PHY atmel 802 PDF

    Untitled

    Abstract: No abstract text available
    Text: Rev: 012108 DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 Ethernet Over PDH Mapping Devices General Description The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by encapsulating MAC frames in GFP-F, HDLC, cHDLC,


    Original     		DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 DS33X162 10/100/1000Mbps 52Mbps 35/Optical. DS33X162/X161/X82/X81/X42/X41/X11/W41/W11 PDF

    5121M

    Abstract: D13T1 ic 74373 datasheet DPL26 80C40 80C400 74373 latch pin config 80C32 DS2502-E48 DS80C390
    Text: High-Speed Microcontroller User’s Guide: DS80C400 Supplement COMMUNICATE WITH NEW AND LEGACY EQUIPMENT NETWORKED MICROCONTROLLER x3 SERIAL UARTs 8051 µC WITH TCP/IPv4/6 NETWORK STACK IN ROM REMOTE MONITORING AND CONTROL VIA THE NETWORK 10/100 ETHERNET MAC


    Original     		DS80C400 DS80C400 DS80C400. 5121M D13T1 ic 74373 datasheet DPL26 80C40 80C400 74373 latch pin config 80C32 DS2502-E48 DS80C390 PDF

    145178

    Abstract: 0S64
    Text: LS120 Data Sheet Quad-Port Ethernet Switch Interface Features Description The LS120 is a highly integrated quad port interface for 10 and 100 Mbit Ethernet switching. It integrates MAC Controllers, memory control and buffer management, and address translation logic. When


    Original     		LS120 145178 0S64 PDF

    BFAP20

    Abstract: samsung ltcc G.SHDSL Industry Single-Chip VTSA7 447h LQ13 tag 9018 LM 205h 276 741h EoPDH
    Text: Rev: 063008 DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 Ethernet Over PDH Mapping Devices General Description The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by encapsulating MAC frames in GFP-F, HDLC, cHDLC,


    Original     		DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 DS33X162 10/100/1000Mbps 52Mbps 35/Optical. DS33W11 DS33W41, DS33X41, DS33X42, BFAP20 samsung ltcc G.SHDSL Industry Single-Chip VTSA7 447h LQ13 tag 9018 LM 205h 276 741h EoPDH PDF

    NORTEL asn

    Abstract: "Spanning Tree" "Link state Protocol" "LINK STATE"
    Text: Network Design Essentials Self Assessment ANSWERS Network Standards 1. Which IEEE standard contains the Token-Ring MAC specification? a. 802.2 b. 802.3 c. 802.5 d. 802.9 2. Which standards committee is responsible for the OSPF specification? a. IEEE b. OSI


    Original     		PDF

    VT6528

    Abstract: 100BASE-X MDIO phy gvrp PHY 2078 ss smii MII switch "Spanning Tree"
    Text: BLOCK DIAGRAM： Jumpers 2-pin EEPROM Initialization Controller MDCx, MDIO LED outputs PHY Management Interface LED Controller 8K+256 MAC Table 4K VLAN Table 1K Multicast Table 256 L2+ Rule/Action 4Mb Packet Buffer 4096x128-Byte Packet Buffer Management Unit


    Original     		4096x128-Byte) 8/16-bit 32-bit VT6528, VT6528 100BASE-X MDIO phy gvrp PHY 2078 ss smii MII switch "Spanning Tree" PDF

    5121M

    Abstract: tH30 DS2502-E48 DS80C320 DS80C390 DS80C400 DS80C400-FNY DS87C520 80C32 80C40
    Text: High-Speed Microcontroller User’s Guide: DS80C400 Supplement COMMUNICATE WITH NEW AND LEGACY EQUIPMENT NETWORKED MICROCONTROLLER x3 SERIAL UARTs 8051 µC WITH TCP/IPv4/6 NETWORK STACK IN ROM REMOTE MONITORING AND CONTROL VIA THE NETWORK 10/100 ETHERNET MAC


    Original     		DS80C400 DS80C400 DS80C400. 5121M tH30 DS2502-E48 DS80C320 DS80C390 DS80C400-FNY DS87C520 80C32 80C40 PDF

    MIPS24KEc

    Abstract: 24KEc mips rt5350f MIPS24KE
    Text: RT5350 Preliminary Datasheet PreliminaryDatNovember 25, 2010 Introduction The RT5350 SoC combines Ralink’s IEEE 802.11n draft compliant 1T1R MAC/BBP/PA/RF, a high performance 360 MHz MIPS24KEc CPU core, a 5-port integrated 10/100 Ethernet switch/PHY and a USB


    Original     		RT5350 RT5350 MIPS24KEc RT5350, -219Ret. DSRT5350 QS-073-F02 24KEc mips rt5350f MIPS24KE PDF

    lem CTSR

    Abstract: A23 1101 01A cwI 1011 MLA-1 PGM-14 Pgm1b smt LDR BA 59 04A F P lf 041 bg-27
    Text: October 1994 DP83266 MACSI TM Device FDDI Media Access Controller and System Interface Y General Description Y The DP83266 Media Access Controller and System Interface (MACSI) implements the ANSI X3T9 5 Standard Media Access Control (MAC) protocol for operation in an FDDI


    Original     		DP83266 DP83261 DP83265 lem CTSR A23 1101 01A cwI 1011 MLA-1 PGM-14 Pgm1b smt LDR BA 59 04A F P lf 041 bg-27 PDF

    ksz8993i

    Abstract: "learning disable" 802.3 802.1d
    Text: KSZ8993M/ML/MI Integrated 3-Port 10/100 Managed Switch with PHYs Rev 1.06 The KSZ8993M contains two 10/100 transceivers with patented mixed-signal low-power technology, three media access control MAC units, a highspeed non-blocking switch fabric, a dedicated


    Original     		KSZ8993M/ML/MI KSZ8993M, KSZ8993M M9999-021307-1 ksz8993i "learning disable" 802.3 802.1d PDF

    KSZ8893MQL application note

    Abstract: "clock collision" KSZ8893MQL
    Text: KSZ8893MQL/MQLI Integrated 3-Port 10/100 Managed Switch with PHYs Rev. 1.3 with patented mixed-signal low-power technology, three media access control MAC units, a highspeed non-blocking switch fabric, a dedicated address lookup engine, and an on-chip frame buffer


    Original     		KSZ8893MQL/MQLI KSZ8893MQL, KSZ8893MQL M9999-061907-1 KSZ8893MQL application note "clock collision" PDF

    KSZ8893-MQL

    Abstract: KS8893M MAG-JACK KSZ8893MQL application note KSZ8893 KSZ8893 MII TLA-6T718 KSZ8893MBL 10LINK LSE B3 transformer
    Text: KSZ8893MQL/MBL Integrated 3-Port 10/100 Managed Switch with PHYs Rev. 1.5 with patented mixed-signal low-power technology, three media access control MAC units, a highspeed non-blocking switch fabric, a dedicated address lookup engine, and an on-chip frame buffer


    Original     		KSZ8893MQL/MBL 10BASE-T 100BASETX. 100BASE-FX. KSZ8893MQL/MBL KS8893MQLI/MBLI KSZ8893 KSZ8893MQL/MBL, M9999-121007-1 KSZ8893-MQL KS8893M MAG-JACK KSZ8893MQL application note KSZ8893 MII TLA-6T718 KSZ8893MBL 10LINK LSE B3 transformer PDF