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    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ASTTLs M74AS21P i DUAL 4 -INPUT POSITIVE AND GATE DESCRIPTION T he PIN CONFIGURATION TOP VIEW M 74A S 21P is a sem iconductor integrated circuit consisting of two 4-inp ut positive-logic A N D gates, us­ ab le as n egative-log ic OR gates. FEATURES


    OCR Scan     		PDF M74AS21P -----t-75

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI -CDGTL LOGIC! 11 Ô e | ¡=,24^057 0012104 S J M IT S U B IS H I c. V' -' 1 a STTLs M 74A S 21P .„. ^ ecÀ, , i\-j <r^ ' DUAL 4 -INPUT POSITIVE AND GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS21P is a semiconductor integrated circuit


    OCR Scan     		PDF M74AS21P DD1S171 20-PIN 24P4D 24-PIN