Untitled
Abstract: No abstract text available
Text: LY62W1024 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.3 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Description Initial Issue Revised ISB1 LL/LLI-LLE max = 50/100 A => 20/50 μA IDR LL/LLI-LLE(max)= 20/40 μA => 12/30 μA Added SL Spec.
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LY62W1024
LY62W1024
576-bit
32-pin
36-ball
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Untitled
Abstract: No abstract text available
Text: LY62W1024 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 FEATURES GENERAL DESCRIPTION Fast access time : 35/55/70ns Low power consumption: Operating current : 12/10/7mA TYP. Standby current : 1µA (TYP.) Single 2.7V ~ 5.5V power supply All inputs and outputs TTL compatible
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LY62W1024
LY62W1024
576-bit
35/55/70ns
12/10/7mA
32-pin
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LY62W10248
Abstract: No abstract text available
Text: LY62W10248 1024K X 8 BIT LOW POWER CMOS SRAM Rev. 1.3 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Description Initial Issue Added ISB Spec. Revised ICC1/ISB1/VDR/IDR Spec. Revised VTERM to VT1 and VT2 Revised Test Condition of ISB1/IDR
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LY62W10248
1024K
44-pin
48-ball
LY62W10248
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LY62W1024
Abstract: ly62w1024-55
Text: LY62W1024 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.5 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Rev. 1.5 Description Initial Issue Revised ISB1 LL/LLI-LLE max = 50/100 A => 20/50 A IDR LL/LLI-LLE(max)= 20/40 A => 12/30 A
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LY62W1024
32-pin
36-ball
LY62W1024
ly62w1024-55
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Untitled
Abstract: No abstract text available
Text: LY62W10248 1024K X 8 BIT LOW POWER CMOS SRAM Rev. 1.7 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Rev. 1.5 Rev. 1.6 Rev. 1.7 Description Initial Issue Added ISB Spec. Revised ICC1/ISB1/VDR/IDR Spec. Revised VTERM to VT1 and VT2
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LY62W10248
1024K
44-pin
48-ball
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Untitled
Abstract: No abstract text available
Text: LY62W1024 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.8 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Rev. 1.5 Rev. 1.6 Rev. 1.7 Rev. 1.8 Description Initial Issue Revised ISB1 LL/LLI-LLE max = 50/100 A => 20/50 μA IDR LL/LLI-LLE(max)= 20/40 μA => 12/30 μA
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LY62W1024
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Untitled
Abstract: No abstract text available
Text: LY62W1024 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.2 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Description Initial Issue Revised ISB1 LL/LLI-LLE max = 50/100 A => 20/50 μA IDR LL/LLI-LLE(max)= 20/40 μA => 12/30 μA Added SL Spec. Lyontek Inc. reserves the rights to change the specifications and products without notice.
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LY62W1024
LY62W1024
576-bit
32-pin
36-ball
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LY62256
Abstract: LY6264 LY62W51216 ly62w6416m ly62l1024 LY62W LY62 32KX8 8X13 LY621024
Text: Density Configuration Chip select Power 64K 8KX8 Dual CE Control CE#,CE2 2.7V~5.5V 256K 32KX8 Single CE Control (CE#) 2.7V~5.5V 2.7V~3.6V 2.7V~5.5V 1M 128KX8 Dual CE Control (CE#, CE2) 4.5V~5.5V 2.7V~3.6V 2.7V~5.5V Item no. LY6264 LY62256 LY62L256 LY62W256
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LY62W1024
LY62L1024
LY621024
128KX8
LY62W256
1MX16/
LY62L102516
LY62102516
1MX16
LY62256
LY6264
LY62W51216
ly62w6416m
ly62l1024
LY62W
LY62
32KX8
8X13
LY621024
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LY62W128
Abstract: No abstract text available
Text: 第 1 頁，共 3 頁 Page:1/3 Update: May 22,2015 Low Power SRAM Density 64K 256K Configuration 8K x 8 32K × 8 Chip Select Dual CE Control CE#,CE2 Single CE Control (CE#) Power Supply 2.7V~5.5V 2.7V~5.5V 4.5V~5.5V 2.7V~3.6V 128K × 8 Dual CE Control (CE#, CE2)
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LY62W2568
LY62L2568
LY62L102516
LY62W102516
LY62102616
LY62L102616
LY62L102616A
LY62L204916A
LY62L205016A
LY62W128
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