6060v5
Abstract: 100BASE-FX LXT9762 LXT9782 LXT9782BC lxt9782hc TOP-SIDE MARKING x1 TEST40
Text: LXT9762/9782 Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Datasheet General Description The LXT9782 is an eight-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical layer applications at both 10 and 100 Mbps. The LXT9762 offers the same features and
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LXT9762/9782
LXT9782
LXT9762
LXT97x2"
LXT97x2
10BASE-T
100BASE-TX
10/100BASE-TX
100BASE-FX
6060v5
LXT9782BC
lxt9782hc
TOP-SIDE MARKING x1
TEST40
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PDF
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LXD9781
Abstract: LXT9763 249356
Text: LXT9761/62/63/81/82 PHY Transceivers Specification Update March 2001 Notice: The LXT9761/81, LXT9762/82, and LXT9763 Multi-Port 10/100 PHY Transceivers may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification
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LXT9761/62/63/81/82
LXT9761/81,
LXT9762/82,
LXT9763
10BASE-T
LXD9781
249356
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PDF
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LXD9781
Abstract: LXT9763 S E001
Text: LXT9761/62/63/81/82 PHY Transceivers Specification Update November 2001 Notice: The LXT9761/81, LXT9762/82, and LXT9763 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update.
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LXT9761/62/63/81/82
LXT9761/81,
LXT9762/82,
LXT9763
10BASE-T
LXD9781
S E001
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PDF
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RMII Specification revision 1.2
Abstract: LXT9781HC LXT9761 100BASE-FX LXT9781
Text: LXT9761/9781 Fast Ethernet 10/100 Multi-Port Transceiver with RMII Datasheet The LXT9781 is an eight-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical layer applications at both 10 Mbps and 100 Mbps. It provides a Reduced Media Independent
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LXT9761/9781
LXT9781
LXT9761
LXT97x1"
10/100BASE-TX
100BASE-FX
LXT97x1
LXT9781BC
5M-1994
RMII Specification revision 1.2
LXT9781HC
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PDF
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HBLxT9761Hc
Abstract: S E001
Text: LXT9763 Fast Ethernet 10/100 Hex Transceiver with Full MII Datasheet The LXT9763 is a six-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical layer applications at both 10 and 100 Mbps. The mixed-signal adaptive equalization and clock recovery with proprietary Optimal Signal Processing OSP architecture improves SNR 3 dB
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LXT9763
LXT9763
10/100BASE-TX
100BASE-FX
10BASE-T
LXT9761/62/63/81/82
HBLxT9761Hc
S E001
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PDF
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RETURN LOSS IN FAST ETHERNET
Abstract: intel date code format LXT975 LXD974A LXT974 LXT974A LXT974B LXT975A LXT975B intel DOC
Text: LXT974/975 Fast Ethernet 10/100 Quad Transceivers Specification Update March 2001 Notice: The LXT974 and LXT975 Four-Port Fast Ethernet PHY Transceivers may contain design defects or errors known as errata which may cause the product to deviate from published
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LXT974/975
LXT974
LXT975
LXT974B
LXT975B.
RETURN LOSS IN FAST ETHERNET
intel date code format
LXD974A
LXT974A
LXT975A
LXT975B
intel DOC
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PDF
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100T2
Abstract: 16*2 led 16T MARKING bob smith termination LXT9763 mdc 171 100BASE-FX JTAG1149
Text: LXT9763 Fast Ethernet 10/100 Hex Transceiver with Full MII Datasheet The LXT9763 is a six-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical layer applications at both 10 and 100 Mbps. The mixed-signal adaptive equalization and clock recovery with proprietary Optimal Signal Processing OSP architecture improves SNR 3 dB
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LXT9763
LXT9763
10/100BASE-TX
100BASE-FX
208-Pin
LXT9763HC
100T2
16*2 led
16T MARKING
bob smith termination
mdc 171
JTAG1149
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PDF
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uc1-2blc
Abstract: TDK and bob smith termination YCL PH406064 bob smith termination LF8708 Bel Fuse and bob smith termination 2BLC level one and bob smith termination MXO45 SG-636
Text: LXT9761/62/63/81/82 Design and Layout Guide Application Note January 2001 Order Number: 249014-001 As of January 15, 2001, this document replaces the Level One document known as AN101. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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LXT9761/62/63/81/82
AN101.
LXT97xx
uc1-2blc
TDK and bob smith termination
YCL PH406064
bob smith termination
LF8708
Bel Fuse and bob smith termination
2BLC
level one and bob smith termination
MXO45
SG-636
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PDF
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269147-2
Abstract: HFBR-5103 AN102 HFBR-5105 HFBR-5903 LXT970A LXT974A LXT975A 100BASE-FX
Text: Fiber Optic Transceivers Connecting a PECL Interface Application Note January 2001 Order Number: 249015-001 As of January 15, 2001, this document replaces the Level One document known as AN102. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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AN102.
LXT970A
269147-2
HFBR-5103
AN102
HFBR-5105
HFBR-5903
LXT970A
LXT974A
LXT975A
100BASE-FX
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PDF
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LXD9781
Abstract: HBLXT9781HC LXT9763 intel date code format
Text: LXT9761/62/63/81/82 PHY Transceivers Specification Update July 2001 Notice: The LXT9761/81, LXT9762/82, and LXT9763 Multi-Port 10/100 PHY Transceivers may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification
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Original
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LXT9761/62/63/81/82
LXT9761/81,
LXT9762/82,
LXT9763
10BASE-T
LXD9781
HBLXT9781HC
intel date code format
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PDF
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