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    LSI LOGIC ASIC Search Results

    LSI LOGIC ASIC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation
    DCL542H01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=2:2) / Default Output Logic: High / Output enable Visit Toshiba Electronic Devices & Storage Corporation
    DCL541B01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: High / Input disable Visit Toshiba Electronic Devices & Storage Corporation

    LSI LOGIC ASIC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CW001007 ARM7TDMI Microprocessor Core Datasheet The LSI Logic CW001007 core is an implementation of the Advanced RISC Machines ARM7TDMI 32-bit RISC microprocessor developed by Advanced RISC Machines. The CW1007 meets the requirements of the LSI Logic CoreWare methodology and is implemented using LSI Logic


    Original     		PDF CW001007 32-bit CW1007 25-micron G11-p G11-v

    AMBA APB bus protocol

    Abstract: spi bus arbiter IHI-0001
    Text: Green AMBA Peripherals Technical Manual Order Number C14058 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.


    Original     		PDF C14058 DB14-000047-00, AMBA APB bus protocol spi bus arbiter IHI-0001

    ARMv5TEJ

    Abstract: jazelle ARM1026EJ-S ARM720T ARM920T ARM922T ARM926EJ-S
    Text: 333 MHz ARM1026EJ-S Processor Core OVERVIEW FEATURES LSI Logic offers the ARM1026EJ-S™ processor core synthesized onto our Gflx™ 0.11 micron drawn high performance process technology, supporting clock frequencies of up to 333 MHz. • 333 MHz performance on LSI Logic


    Original     		PDF ARM1026EJ-STM ARM1026EJ-STM ARM1026EJ-S 32bit 64-bit ARMv5TEJ jazelle ARM720T ARM920T ARM922T ARM926EJ-S

    A/ICE2QS03 Equivalence

    Abstract: No abstract text available
    Text: Using Formality in LSI Logic’s FlexStream Design Flow Anwar Ali Yoon Kim Chrystian Roy Eric Zann LSI Logic Milpitas, CA anwara@lsil.com ykim@lsil.com croy@lsil.com Abstract For large or complex System-on-a-Chip designs, which often consist of over one million gates,


    Original     		PDF

    RX64

    Abstract: MDP36 lr33300 BDLR4500 BDMR4011 LR4500 R4000 sca24 MDP21 MDP18
    Text: MiniRISC LR4500 Superscalar Microprocessor Technical Manual ® Order Number C14043 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.


    Original     		PDF LR4500 C14043 DB14-000066-00, LR4500 Eu3580 RX64 MDP36 lr33300 BDLR4500 BDMR4011 R4000 sca24 MDP21 MDP18

    Untitled

    Abstract: No abstract text available
    Text: 80C03 80C03 AutoDUPLEXTM CMOS Ethernet Data Link Controller 96253 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access


    Original     		PDF 80C03 80C03 MD400121/C

    ZSP400

    Abstract: ge 142 LSI402Z LSI402ZX
    Text: TECHNICAL MANUAL ZSP400 Digital Signal Processor Architecture December 2001 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.


    Original     		PDF ZSP400 DB14-000121-03, ZSP400 ge 142 LSI402Z LSI402ZX

    SIGMA TEMPERATURE CONTROL sfn 48

    Abstract: HP 7710 L64005 L64005 A/V Decoder L-band Down Converter for Satellite Tuner TPS 2540 MPEG-TS stream datasheet for OFDM microprocessor 5000 DVB-T Demodulator DVB-T modulator
    Text: L64780 DVB-T COFDM Demodulator Technical Manual February 2000 Order No. I14027 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.


    Original     		PDF L64780 I14027 DB14-000113-00, L64780 SIGMA TEMPERATURE CONTROL sfn 48 HP 7710 L64005 L64005 A/V Decoder L-band Down Converter for Satellite Tuner TPS 2540 MPEG-TS stream datasheet for OFDM microprocessor 5000 DVB-T Demodulator DVB-T modulator

    8 bit wallace tree multiplier verilog code

    Abstract: 16 bit wallace tree multiplier verilog code 24 bit wallace tree multiplier verilog code vhdl code for Wallace tree multiplier 8 bit multiplication vhdl code using wallace tree 4 bit multiplication vhdl code using wallace tree vhdl code Wallace tree multiplier 32 bit wallace tree multiplier verilog code LSI Logic EPBGA 4 bit wallace tree multiplier verilog code
    Text: LSI LOGIC Process Overview 0.6-Micron, 5-Volt LCB605K ASIC Products Datasheet LSI Logic’s LCB605K cell-based ASICs provide a very dense, cost-effective solution that is ideal for 5-volt system integration. Based on LSI Logic’s 0.45-micron effective channel length


    OCR Scan     		PDF LCB605K 45-micron 8 bit wallace tree multiplier verilog code 16 bit wallace tree multiplier verilog code 24 bit wallace tree multiplier verilog code vhdl code for Wallace tree multiplier 8 bit multiplication vhdl code using wallace tree 4 bit multiplication vhdl code using wallace tree vhdl code Wallace tree multiplier 32 bit wallace tree multiplier verilog code LSI Logic EPBGA 4 bit wallace tree multiplier verilog code

    coreware graphics

    Abstract: verilog code for superscalar mips
    Text: LSI LOGIC Description MiniRISC CW4010 Superscalar Microprocessor Core Preliminary D atash eet LSI Logic Corporation has developed the MiniRISC CW4010 Superscalar Microprocessor Core, the world’s first MIPS-ll-compatible superscalar core, using LSI Logic’s CoreWare


    OCR Scan     		PDF CW4010 80-MHz coreware graphics verilog code for superscalar mips

    mil-std-1750a

    Abstract: MILSTD1750A 1750a AKO3 TST02 L6450
    Text: i si LSI LOGIC L64550 MILSTD1750A MBU Peripheral Device LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 4 0 8 .4 3 3 .8 0 0 0 Telex 172153 Preliminary j a i U n ‘ 005790 5 m Features Logic Symbol and Chip Layout LSI Logic Corporation's L64550 is a monolithic


    OCR Scan     		PDF L64550 MILSTD1750A L64500 MIL-STD-1750A 1750a AKO3 TST02 L6450

    mil-std-1750a

    Abstract: AKO3 abo cpu ako speed control abb eiw mps 0815 td1513 MIL-STD-1750 mps 0812 L64500
    Text: i si LSI LOGIC L64550 MILSTD1750A MBU Peripheral Device LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 4 0 8 .4 3 3 .8 0 0 0 Telex 172153 Preliminary j a i U n ‘ 005790 5 m Features Logic Symbol and Chip Layout LSI Logic Corporation's L64550 is a monolithic


    OCR Scan     		PDF L64550 MILSTD1750A L64550 L64500 MIL-STD-1750A AKO3 abo cpu ako speed control abb eiw mps 0815 td1513 MIL-STD-1750 mps 0812

    Untitled

    Abstract: No abstract text available
    Text: 80C03 LSI LOGIC AutoDUPLEX CMOS Ethernet Data Link Controller 96253 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access


    OCR Scan     		PDF 80C03 10Base-5) 10Base-2) 10Base-T) MD400121/C 44-Pin

    MBC 100-60

    Abstract: CT 4A05 tic 1260 scr texas mil-std-1750a pin diagram for IC cd 1619 cp efd pmr cd 1619 CP pin diagram for IC cd 1619 cp in fm nim ttl MIL-STD-1750* BX
    Text: LSI LOGIC c L64500 LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 4 0 8 .4 3 3 . 8 0 0 0 Telex 172153 MIL-STD-1750A Microprocessor O 00245 0 Preliminary 3-YTO . Description The LSI Logic L64500 is a monolithic 1.5-micron drawn (0.9-effective HCMOS chip which implements


    OCR Scan     		PDF L64500 MIL-STD-1750A L64500 MIL-STD-1750A 16-bit L64550 DS008 MBC 100-60 CT 4A05 tic 1260 scr texas pin diagram for IC cd 1619 cp efd pmr cd 1619 CP pin diagram for IC cd 1619 cp in fm nim ttl MIL-STD-1750* BX

    jk 13001 TRANSISTOR

    Abstract: jk 13001 13001 S 6D TRANSISTOR jk 13001 h signo 723 operation manual jk 13001 E bd4 lsi logic 0 281 020 099 SIS transistors 13001 s bd 13001 S 6D TRANSISTOR circuit
    Text: LSI LOGIC LCA500K Prelim inary D esig n M anual June 1995 S304 A0 4 O O n s t M h3? This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.


    OCR Scan     		PDF LCA500K 043/G LCA500K jk 13001 TRANSISTOR jk 13001 13001 S 6D TRANSISTOR jk 13001 h signo 723 operation manual jk 13001 E bd4 lsi logic 0 281 020 099 SIS transistors 13001 s bd 13001 S 6D TRANSISTOR circuit

    300-PIN CERAMIC PIN GRID ARRAY CPGA

    Abstract: LSI CMOS GATE ARRAY SIGNAL PATH designer
    Text: LSI LOGIC LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 LCA100K Compacted Array Plus Series 0.7-Micron HCMOS ^ 408.433.8000 Telex 172153 Advance Information Description The LCA100K Compacted Array Plus series is an HCMOS array-based ASIC product offering extremely


    OCR Scan     		PDF LCA100K 300-PIN CERAMIC PIN GRID ARRAY CPGA LSI CMOS GATE ARRAY SIGNAL PATH designer

    dm024

    Abstract: A992 transistor and its equivalent LB 11917
    Text: LOGIC LEA300K Embedded Array 5 Volt ASIC Products Databook O c to b e r 1994 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.


    OCR Scan     		PDF LEA300K DB04-000048-00, D-102 FALU32 32-bit FMPY32 FALU32P dm024 A992 transistor and its equivalent LB 11917

    pin diagram for IC cd 1619 cp in fm

    Abstract: ako 450 169 ct 4a05 MBC 100-60 LSI 1750A processor architecture cd 1619 CP ic pin details MIL-STD-1750* BX KASUGA ako speed control l64550 microprocessor
    Text: LSI LOGIC { L64500 M IL S T D 17 5 0 A Microprocessor LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 9 5 0 3 5 408.433.8000 Telex 172153 ip I O 002450 Preliminary s> o /S^ L 3 l 3-Y T P . Description The LSI Logic L64500 is a monolithic 1.5-micron drawn (0.9-effective HCMOS chip which implements


    OCR Scan     		PDF L64500 MIL-STD-1750A 16-bit L64550 minimi14 DS008 pin diagram for IC cd 1619 cp in fm ako 450 169 ct 4a05 MBC 100-60 LSI 1750A processor architecture cd 1619 CP ic pin details MIL-STD-1750* BX KASUGA ako speed control l64550 microprocessor

    LCA100K

    Abstract: 748 transistor on LSI CMOS GATE ARRAY LCA100139 LCA100188 LCA100237 for the construction of cmos logic gates SIGNAL PATH designer
    Text: LSI LOGIC LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 LCA100K Compacted Array Plus Series 0.7-Micron HCMOS 408.433.8000 Telex 172153 Advance Information Description The LCA100K Compacted Array Plus series is an HCM O S array-based ASIC product offering extremely


    OCR Scan     		PDF LCA100K 748 transistor on LSI CMOS GATE ARRAY LCA100139 LCA100188 LCA100237 for the construction of cmos logic gates SIGNAL PATH designer

    Untitled

    Abstract: No abstract text available
    Text: CW001004 ARM7TDMI Microprocessor Core LSI LOGIC P relim inary Datasheet The LSI Logic CW001004 core is an implementation of the Advanced RISC Machines ARM7TDMI 32-bit RISC microprocessor developed by Advanced RISC Machines. It was developed to meet the requirements of


    OCR Scan     		PDF CW001004 32-bit 16-bit WO01004

    DM024

    Abstract: oti 2168 CM17B transistor bf 175
    Text: 5304804 LSI LOGIC □□mb7A LCA300K G ate Array 5 V olt Series P roducts D atabook Oct ober 1993 f 55b 5304604 0014b7T 4^2 * L L C Preface The LCA300K Gate Array Product Series Databook is written for logic and system designers who wish to use LSI Logic’s 0.6-micron gate


    OCR Scan     		PDF LCA300K 0014b7T 120x32 FALU32 32-bit FMPY32 FALU32P DM024 oti 2168 CM17B transistor bf 175

    ali m56

    Abstract: ScansU9X28 DB14-000002-01
    Text: LSI LOGIC L64381 4-Port Ethernet Controller Device Technical Manual This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using pro­


    OCR Scan     		PDF L64381 DB14-000002-01, ali m56 ScansU9X28 DB14-000002-01

    Untitled

    Abstract: No abstract text available
    Text: LSI LOGIC CW900006 Triple 10-bit Video Cell LCB/LEA500K Advance Datasheet Introduction The CW900006 is a complete triple 10-bit video digital-to-analog converter VDAC that is implemented as a standard cell in LSI Logic’s 0.5 jam 500K process technology. It is designed


    OCR Scan     		PDF CW900006 10-bit LCB/LEA500K LCB500K LEA500K 75-ohm

    lsi logic arrays

    Abstract: No abstract text available
    Text: L S I L OGI C CORP Û1 dF I 5304Ö0M □ □□□ ÖS 3 7 LSI LSI Logic Corporation 1551 McCarthy Blvd Milpitas, CA 95035 408.433.8000 Telex 172153 The LDS Design System 5304804 General Description ir L S I LOGIC CORP •5T The LDS Design System is a front-end ASIC design


    OCR Scan     		PDF