LS245 ONE DIRECTION Search Results

LS245 ONE DIRECTION Result Highlights (5)

Part	Manufacturer	Description
TLX9188	Toshiba Electronic Devices & Storage Corporation	Photocoupler (phototransistor output), DC input, 3750 Vrms, SO6, Automotive
7UL2T125FK	Toshiba Electronic Devices & Storage Corporation	One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC
7UL2T126FK	Toshiba Electronic Devices & Storage Corporation	One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC
7UL1G07FU	Toshiba Electronic Devices & Storage Corporation	One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC
TPD4207F	Toshiba Electronic Devices & Storage Corporation	Intelligent power device 600V (High voltage PWM DC brushless motor driver)

LS245 ONE DIRECTION Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
LS245 Abstract: ttl multiplexer AC119 LS241 LS374 LS74 Text: Application Note AC119 Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Three-state logic is used in conventional MSI logic devices to allow buses where multiple drivers are directly connected to one or more loads. Figure 1 shows a typical bus configuration	Original	AC119 LS245 LS374 LS245 ttl multiplexer AC119 LS241 LS374 LS74	PDF
LS245 Abstract: LS241 LS374 LS74 Text: Appl i cat i o n N ot e Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Three-state logic is used in conventional MSI logic devices to allow buses where multiple drivers are directly connected to one or more loads. Figure 1 shows a typical bus configuration	Original	LS245 LS374 LS245 LS241 LS374 LS74	PDF
LS245 Abstract: texas instruments LS245 Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245 SN74LS245 SN54LS245 LS245 texas instruments LS245	PDF
Untitled Abstract: No abstract text available Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245	PDF
74ls521 Abstract: DB25 Parallel connector PAL Decoder 16L8 PC87310EB NEL NE-18A 74LS125 tri-state buffer p20l8 LS521 working of IC 74ls244 as buffer 74LS245 Text: National Semiconductor Application Note 676 Welson Lin Steve Horeff December 1990 BACKGROUND The PC87310 integrates two UARTs a floppy disk controller with analog data separator one parallel port game port decode hard disk controller decode and standard PC-XT	Original	PC87310 74LS125 74LS245 20-3A 74ls521 DB25 Parallel connector PAL Decoder 16L8 PC87310EB NEL NE-18A 74LS125 tri-state buffer p20l8 LS521 working of IC 74ls244 as buffer	PDF
HC 4066A Abstract: CMOS 4001, 4011, 4070 and 4081 HC 4053A HC165A HC 4052A HC589A HC00A HC74A 4852A HC 125A Text: BUFFERS/INVERTERS ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ	Original	HC4046A HC4538A HC 4066A CMOS 4001, 4011, 4070 and 4081 HC 4053A HC165A HC 4052A HC589A HC00A HC74A 4852A HC 125A	PDF
74LS245 Abstract: ls245 SN74LS245 SN74LS245N SN74LS245NSR SNJ54LS245J SN54LS245 SN54LS245J SN74LS245DBR SN74LS245DW Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245 SN54LS2reproduction 74LS245 ls245 SN74LS245 SN74LS245N SN74LS245NSR SNJ54LS245J SN54LS245 SN54LS245J SN74LS245DBR SN74LS245DW	PDF
SN54LS245 Abstract: SN54LS245J SN74LS245 SN74LS245DBR SN74LS245DW SN74LS245DWR SN74LS245N SN74LS245NSR SNJ54LS245J 80021012A Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245 SN54LS2plifiers SN54LS245 SN54LS245J SN74LS245 SN74LS245DBR SN74LS245DW SN74LS245DWR SN74LS245N SN74LS245NSR SNJ54LS245J 80021012A	PDF
LS245 Abstract: SN74LS245 SN74LS245DW SN74LS245N LS245 one direction Text: SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input	Original	SN74LS245 SN74LS245 r14525 SN74LS245/D LS245 SN74LS245DW SN74LS245N LS245 one direction	PDF
SN74LS245d Abstract: SN74ls245 SN74LS245N Text: SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input	Original	SN74LS245 SN74LS245N PDIP-20 SN74LS245/D SN74LS245d	PDF
SN74LS245N Abstract: 74LS245 LS245 SN74LS245 SN74LS245DW SN74LS245DWR2 SN74LS245M SN74LS245MEL Text: SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input	Original	SN74LS245 SN74LS245 r14525 SN74LS245/D SN74LS245N 74LS245 LS245 SN74LS245DW SN74LS245DWR2 SN74LS245M SN74LS245MEL	PDF
SN74LS245 Abstract: LS245 80021012A 8002101SA Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245 SN74LS245 SN54LS245 LS245 80021012A 8002101SA	PDF
SN74LS245 Abstract: SN74LS245N 80021 SN54LS245 SN54LS245J SN74LS245DBR SN74LS245DW SN74LS245DWR SN74LS245NSR SNJ54LS245J Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245 SN54LS2plifiers SN74LS245 SN74LS245N 80021 SN54LS245 SN54LS245J SN74LS245DBR SN74LS245DW SN74LS245DWR SN74LS245NSR SNJ54LS245J	PDF
SN74LS245N PRICE Abstract: 80021012A 8002101SA Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245 SN74LS245 SN54LS245 SN74LS245N PRICE 80021012A 8002101SA	PDF

Untitled Abstract: No abstract text available Text: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins	Original	SN54LS245, SN74LS245 SDLS146A SN54LS245	PDF
74LS245 buffer Abstract: LS245 IEEE LS245 1N3064 1N916 54LS SN54LS245 SN74LS245 Text: 8 -B it B u ffer Transceiver MORE DETAIL SEE SECTION _ S N 5 4 /7 4 L S 2 4 5 i3 Features/B enefits Ordering Information • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction	OCR Scan	SN54/74LS245 20-pin SN54/74LS645 SN54LS245 SN74LS245 1N3064. 74LS245 buffer LS245 IEEE LS245 1N3064 1N916 54LS	PDF
LS245 Abstract: DM54LS245 Text: LS245 National Semiconductor 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description PNP inputs reduce DC loading on bus lines Hysteresis at bus inputs improve noise margins Typical propagation delay times, port-to-port 8 ns Typical enable/disable times 17 ns	OCR Scan	LS245 54LS245/DM54LS245/DM74LS245 DM54/74 LS245 DM54LS245	PDF
Untitled Abstract: No abstract text available Text: 8-B it Buffer Transceiver S N 54LS245 Features/Benefits Ordering Information • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction PART NUMBER TYPE TEMP POLARITY POWER	OCR Scan	54LS245 SN54LS245 SN54LS645	PDF
DM74LS245N Abstract: LS245 74LS24 ab-10 national DM54LS245 Text: LS245 £ 3 National Semiconductor 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchro nous two-way communication between data buses. The control function implementation minimizes external timing	OCR Scan	54LS245/DM54LS245/DM74LS245 20-pin DM54/74 LS245 DM74LS245N LS245 74LS24 ab-10 national DM54LS245	PDF
ls245 Abstract: LS245 one direction 1N3064 1N916 54LS SN54LS245 Text: 8 -B it B uffer Transceiver SN54LS245 F e a tu re s /B e n e fits O rdering Inform ation • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction PART NUMBER TYPE TEMP POLARITY	OCR Scan	SN54LS245 sn54ls645 SN54LS245 ls245 LS245 one direction 1N3064 1N916 54LS	PDF
LS245 Abstract: LS374S 3C534 ls567 Text: Snudi But Mighty; New Components Give You More Logic in Less Chips* Chuck Hastings and Suneel Rajpal Interface circuits are generally thought of as unglamorous bread-and-butter items. They have the humble role of being the “glue" which holds digital systems together. Contempo	OCR Scan	54/74LS, 50nand: 54/74S, 54/74LSand LS245 LS374S 3C534 ls567	PDF
82c450 Abstract: ALS02A IBM POS schematics Text: CHÏrai Functional Description Functional Description The 82C450 is part of the CHIPS 45x product family. This product is fully compatible to IBM's VGA standard at the gate, register, and BIOS level. It offers enhanced backward compatibility to EGA, CGA, Hercules, and MDA standards without using	OCR Scan	82C450 82C450 ALS02A IBM POS schematics	PDF
intel 8250 UART Abstract: block diagram of ct scanner P82C605 82C605 82C606 8250 intel uart CHIPS TECHNOLOGIES delay line ms-31 ricoh marking LS245 Text: CÜHjlF^aÜ P R E L IM IN A R Y 8 2 C 6 0 5 /8 2 C 6 06 CH lPSpak/CH IPSport MULTIFUNCTION CO N TRO LLERS 100% Compatible to IBM" PC, XT and AT Fully compatible to the NS16450 Asynch ronous Communications Element, and the Motorola 146818A Real Time Clock	OCR Scan	82C605/82C606 NS16450 46818A 82C606 46818A. intel 8250 UART block diagram of ct scanner P82C605 82C605 8250 intel uart CHIPS TECHNOLOGIES delay line ms-31 ricoh marking LS245	PDF
P82C606 Abstract: 82C605 82C606 NE558 intel 8250 UART LS245 NS16450 NE558 applications LS245 MOTOROLA SACX07 Text: P R E L IM IN A R Y 8 2 C 6 0 5 /8 2 C 6 06 CH lPSpak/CH IPSport MULTIFUNCTION CO N TRO LLERS 100% Compatible to IBM" PC, XT and AT Fully compatible to the NS16450 Asynch ronous Communications Element, and the Motorola 146818A Real Time Clock 82C606 only	OCR Scan	82C605/82C606 NS16450 46818A 82C606 46818A. P82C606 82C605 NE558 intel 8250 UART LS245 NE558 applications LS245 MOTOROLA SACX07	PDF

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LS245 ONE DIRECTION Search Results

LS245 ONE DIRECTION Result Highlights (5)

LS245 ONE DIRECTION Datasheets Context Search

LS245

LS245

LS245

Untitled

74ls521

HC 4066A

74LS245

SN54LS245

LS245

SN74LS245d

SN74LS245N

SN74LS245

SN74LS245

SN74LS245N PRICE

Untitled

74LS245 buffer

LS245

Untitled

DM74LS245N

ls245

LS245

82c450

intel 8250 UART

P82C606