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    LQFP-120 SOCKET Search Results

    LQFP-120 SOCKET Result Highlights (5)

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    CN-DSUB25SKT0-000 Amphenol Cables on Demand Amphenol CN-DSUB25SKT0-000 D-Subminiature (DB25 Female D-Sub) Connector, 25-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD26SK-000 Amphenol Cables on Demand Amphenol CN-DSUBHD26SK-000 High-Density D-Subminiature (HD26 Female D-Sub) Connector, 26-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUB15SKT0-000 Amphenol Cables on Demand Amphenol CN-DSUB15SKT0-000 D-Subminiature (DB15 Female D-Sub) Connector, 15-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD15SK-000 Amphenol Cables on Demand Amphenol CN-DSUBHD15SK-000 High-Density D-Subminiature (HD15 Female D-Sub) Connector, 15-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUB50SKT0-000 Amphenol Cables on Demand Amphenol CN-DSUB50SKT0-000 D-Subminiature (DB50 Female D-Sub) Connector, 50-Position Socket Contacts, Solder-Cup Terminals Datasheet

    LQFP-120 SOCKET Datasheets Context Search

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    mb2132-469

    Abstract: F2MC-16LX LQFP-120
    Text: PREFACE Thank you for purchasing the LQFP-120 *1 Probe Cable <NQPACK version> (MB2132-469). The LQFP-120 Probe Cable is used to connect an emulator for F2MC(*2)-16LX to a user system. This manual explains the handling and operation of the LQFP-120 Probe Cable <NQPACK version>


    Original     		LQFP-120 MB2132-469) LQFP-120 -16LX MB2132-469. HQPACK120SD NQPACK120SD mb2132-469 F2MC-16LX PDF

    header pcb mounted 120 position

    Abstract: No abstract text available
    Text: PREFACE Thank you for purchasing the MB91V107/V108/V121 adapter unit MB2197-103 for the DSU-FR(*1)20/30 emulator. This adapter unit is used to connect a user system using the MB91107 (LQFP-120), MB91108 (LQFP-120), and MB91121 (LQFP-120) with the DSU-FR20/30-series emulator (MB2197-01)


    Original     		MB91V107/V108/V121 MB2197-103) MB91107 LQFP-120) MB91108 MB91121 DSU-FR20/30-series MB2197-01) header pcb mounted 120 position PDF

    Untitled

    Abstract: No abstract text available
    Text: 8-,7686HPLFRQGXFWRU'HYLFHV S U P P O R T S Y S T E M MB2132-498 2 F MC-16L/16LX/16F Family LQFP-120 Probe Cable NQPACK Version) Operation Manual KM16P-0105-0110 Edition 02 All Right Reserved. 1. Circuit diagrams utilizing Fujitsu products are included as a mean of illustrating typical semiconductor


    Original     		7686HPLFRQGXFWRU MB2132-498 MC-16L/16LX/16F LQFP-120 KM16P-0105-0110 HQPACK120SE NQPACK120SE YQPACK120SE PDF

    MSC8100

    Abstract: ELECTRONIC dimming BALLAST DEMO56F8013 MC56F8013VFAE MC56F8014VFAE 32PIN TQFP FREESCALE DSP56303AG100 XC56309AG100 DSPA56371AF150 56F8345-56F8367
    Text: Digital Signal Processors and Controllers Quarter 4, 2005 SG1004Q42005 Rev 0 About This Revision–Q4/2005 When new products are introduced, a summary of new products will be provided in this section. However, the New Product section will only appear on this page when new products


    Original     		SG1004Q42005 Q4/2005 SG1004Q42005 MSC8100 ELECTRONIC dimming BALLAST DEMO56F8013 MC56F8013VFAE MC56F8014VFAE 32PIN TQFP FREESCALE DSP56303AG100 XC56309AG100 DSPA56371AF150 56F8345-56F8367 PDF

    DSP56303AG100

    Abstract: SPAKXCL307VL160 DSPA56371AF150 ELECTRONIC dimming BALLAST DEMO56F8013 MC56F8013VFAE MC56F8014VFAE 32PIN TQFP FREESCALE MSC8100 56f8014 sine wave
    Text: Digital Signal Processors Quarter 3, 2005 SG1004Q32005 Rev 0 About This Revision–Q3/2005 When new products are introduced, a summary of new products will be provided in this section. However, the New Product section will only appear on this page when new products


    Original     		SG1004Q32005 Q3/2005 SG1004Q32005 DSP56303AG100 SPAKXCL307VL160 DSPA56371AF150 ELECTRONIC dimming BALLAST DEMO56F8013 MC56F8013VFAE MC56F8014VFAE 32PIN TQFP FREESCALE MSC8100 56f8014 sine wave PDF

    DSP56309VF100A

    Abstract: DSP56309AG100A 56800E 56F800 56F805 56F807 56F8300 MC56F8322MFA60 sensorless BLDC foc MC56F8322VFA60
    Text: DSP Quarter 4, 2007 SG1004Q42007 Rev 0 56800 FAMILY 56F800 Series General Purpose 16-Bit Fixed Point Note Applications Development Tools Benefits Motion Control • Smart appliances • Environmental controls • Instrumentation Refer to Development Tools beginning on page 15.


    Original     		SG1004Q42007 56F800 16-Bit DSP56309VF100A DSP56309AG100A 56800E 56F805 56F807 56F8300 MC56F8322MFA60 sensorless BLDC foc MC56F8322VFA60 PDF

    MSC7120

    Abstract: DSP DTS-hd dspb56364af100 DSP56857BUE MSC8100 AGC DTX VAD celestica F8145 F832 GSm Based Automation
    Text: DSP Quarter 2, 2009 SG1004Q22009 Rev 0 56800 FAMILY 56F800 Series General Purpose 16-Bit Fixed Point Note Applications Development Tools Benefits Motion Control • Smart appliances • Environmental controls • Instrumentation Refer to Development Tools beginning on page 15.


    Original     		SG1004Q22009 56F800 16-Bit MSC7120 DSP DTS-hd dspb56364af100 DSP56857BUE MSC8100 AGC DTX VAD celestica F8145 F832 GSm Based Automation PDF

    MSC7120

    Abstract: DSP56300 acoustic echo cancellation DSP56321VF200 DSP56321VF275 DSP56321VL200 DSP56321VL275 DSPAUDIOEVMMB1 56F8013 DSP56321VL240 DSPB56374AFC
    Text: Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: , DSP56321VL200,DSP56321VL220,


    Original     		DSP56311VF150 DSP56311VL150 DSP56321VF200 DSP56321VF220 DSP56321VF240 DSP56321VF275, DSP56321VL200 DSP56321VL220, DSP56321VL240 DSP56321VL275 MSC7120 DSP56300 acoustic echo cancellation DSP56321VF275 DSPAUDIOEVMMB1 56F8013 DSPB56374AFC PDF

    E131

    Abstract: MC100EP131 MC10EP131 QFN32
    Text: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 E131 MC100EP131 MC10EP131 QFN32 PDF

    Untitled

    Abstract: No abstract text available
    Text: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 MC10EP131/D PDF

    780824b

    Abstract: 780851 78p064 78F0233 NEC 78F0078 780021AS 78074B NEC Electronics uPD Series 78F0058 78F0828
    Text: HOME SOLUTIONS PRODUCTS TECHNOLOGY HIGHLIGHTS SUPPORT COMPANY PROFILE NEWS AND EVENTS MICROCOMPUTER Microcomputer HOME Product Overview 8bit 78K0 Series : Development Environment NEC Electronics Tools Hardware Tools Product Lineup Development Environment Common Hardware Tools


    Original     		080SBP H80GCTQ 9200GC 78F0852 100GC H100GCTQ H64CW 780824b 780851 78p064 78F0233 NEC 78F0078 780021AS 78074B NEC Electronics uPD Series 78F0058 78F0828 PDF

    AC C0A

    Abstract: No abstract text available
    Text: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 MC10EP131/D AC C0A PDF

    E131

    Abstract: MC100EP131 MC10EP131 QFN32 QFN32* socket
    Text: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 MC10EP131/D E131 MC100EP131 MC10EP131 QFN32 QFN32* socket PDF

    TSB12LV23

    Abstract: "USB Hub Controllers" PCI CardBus Controllers Physical Layer Controllers 21152AB PCI4520 TSB43CB43A LQFP 128 pin Socket TSB12LV01B TSB12LV21B
    Text: R E A L W O R L D S I G N A L P R O C E S S I N G Connectivity Solutions: 1394 and USB 4Q 2003 1394 Integrated Devices Family/ Name iOHCI-Lynx iOHCI-Lynx iOHCI-Lynx iOHCI-Lynx Voltage V 3.3 3.3 3.3 3.3 TSB43CA42 iceLynx-Micro 3.3 up to 400 16.5 TSB43CA43A


    Original     		TSB43CA42 TSB43CA43A TSB43CB43A TSB43AA22 TSB43AB21A TSB43AB22A TSB43AB23 1394a-2000 TSB12LV23 "USB Hub Controllers" PCI CardBus Controllers Physical Layer Controllers 21152AB PCI4520 TSB43CB43A LQFP 128 pin Socket TSB12LV01B TSB12LV21B PDF

    socket 775 pinout

    Abstract: MC100 MC100EPT622 MC100EPT622FA MC100EPT622FAG
    Text: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs


    Original     		MC100EPT622 MC100EPT622 10-Bit MC100 EPT622 LQFP-32 MC100EPT622/D socket 775 pinout MC100 MC100EPT622FA MC100EPT622FAG PDF

    100EP131

    Abstract: 87-3A E131 MC100EP131 MC100EP131FA MC100EP131FAR2 MC10EP131 MC10EP131FA MC10EP131FAR2
    Text: MC10EP131, MC100EP131 3.3V / 5VĄECL Quad D Flip-Flop with Set, Reset, and Differential Clock The MC10/100EP131 is a Quad Master–slaved D flip–flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 r14525 MC10EP131/D 100EP131 87-3A E131 MC100EP131 MC100EP131FA MC100EP131FAR2 MC10EP131 MC10EP131FA MC10EP131FAR2 PDF

    Untitled

    Abstract: No abstract text available
    Text: MC10EP131, MC100EP131 3.3V / 5VĄECL Quad D Flip-Flop with Set, Reset, and Differential Clock The MC10/100EP131 is a Quad Master–slaved D flip–flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 r14525 MC10EP131/D PDF

    JEDEC qfn tray 5x5

    Abstract: tray QFN 5x5 QFN tray 5x5
    Text: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator Description The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which


    Original     		MC100EPT622 10-Bit MC100EPT622/D JEDEC qfn tray 5x5 tray QFN 5x5 QFN tray 5x5 PDF

    LVEP111

    Abstract: MC100LVEP111 MC100LVEP111FAR2G MC100 MC100EP111 MC100LVEP111FAR2 MC100LVEP111FAG
    Text: MC100LVEP111 2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or


    Original     		MC100LVEP111 MC100LVEP111 1-to-10 LVEP111 MC100LVEP111/D MC100LVEP111FAR2G MC100 MC100EP111 MC100LVEP111FAR2 MC100LVEP111FAG PDF

    MC100LVEP111

    Abstract: LVEP111 MC100 MC100EP111 QFN32 LQFP32 footprint lqfp-32 footprint layout MC100LVEP111FARG M100LVEP111FATW M100LVEP111FATWG
    Text: MC100LVEP111 2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver Description The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or


    Original     		MC100LVEP111 MC100LVEP111 1-to-10 LVEP111 MC100LVEP111/D MC100 MC100EP111 QFN32 LQFP32 footprint lqfp-32 footprint layout MC100LVEP111FARG M100LVEP111FATW M100LVEP111FATWG PDF

    Untitled

    Abstract: No abstract text available
    Text: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator Description The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which


    Original     		MC100EPT622 MC100EPT622 MC100 EPT622 MC100EPT622/D PDF

    socket 775 pinout

    Abstract: MC100 MC100EPT622 MC100EPT622FA MC100EPT622FAG
    Text: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs


    Original     		MC100EPT622 MC100EPT622 10-Bit MC100 EPT622 LQFP-32 MC100EPT622/D socket 775 pinout MC100 MC100EPT622FA MC100EPT622FAG PDF

    E131

    Abstract: MC100EP131 MC100EP131FA MC100EP131FAR2 MC10EP131 MC10EP131FA MC10EP131FAR2 MC10EP131-D EP131
    Text: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.


    Original     		MC10EP131, MC100EP131 MC10/100EP131 EP131 MC10EP131/D E131 MC100EP131 MC100EP131FA MC100EP131FAR2 MC10EP131 MC10EP131FA MC10EP131FAR2 MC10EP131-D PDF

    LQFP-32 footprint

    Abstract: MC100LVEP111 LVEP111 MC100 MC100EP111 QFN32 QFN-32 footprint WG85 lqfp-32 footprint layout MC100LVEP111FARG
    Text: MC100LVEP111 2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver Description The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or


    Original     		MC100LVEP111 MC100LVEP111 1-to-10 LVEP111 MC100LVEP111/D LQFP-32 footprint MC100 MC100EP111 QFN32 QFN-32 footprint WG85 lqfp-32 footprint layout MC100LVEP111FARG PDF