Untitled
Abstract: No abstract text available
Text: AsTriX Device CellBus Expansion Switch TXC-05840 DATA SHEET PRODUCT PREVIEW The AsTriX™ TXC-05840 CellBus expansion switch is a single chip switching solution for ATM systems. In order to meet the accelerating need for bandwidth in access systems, the AsTriX is designed to allow higher CellBus
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TXC-05840
TXC-05804)
CUBIT-622
TXC-05805)
TXC-05860)
TXC-05810)
16-bit
MPC850/860
OC-48
TXC-05840-MB
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VOLT U3 503 10 01000
Abstract: No abstract text available
Text: AsTriX Device CellBus Expansion Switch TXC-05840 DATA SHEET PRODUCT PREVIEW The AsTriX™ TXC-05840 CellBus expansion switch is a single chip switching solution for ATM systems. In order to meet the accelerating need for bandwidth in access systems, the AsTriX is designed to allow higher CellBus
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TXC-05840
TXC-05804)
CUBIT-622
TXC-05805)
TXC-05860)
TXC-05810)
16-bit
MPC850/860
power-453.
TXC-05840-MB
VOLT U3 503 10 01000
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PDF
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RX1d
Abstract: 3A184
Text: AsTriX Device CellBus Expansion Switch TXC-05840 DATA SHEET The AsTriX™ TXC-05840 CellBus Expansion Switch is a single chip switching solution for ATM systems. In order to meet the accelerating need for bandwidth in access systems, the AsTriX is designed to allow higher
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Original
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TXC-05840
TXC-05804)
CUBIT-622
TXC-05805)
TXC-05860)
TXC-05810)
OC-12
16-bit
MPC850/860
TXC-05840-MB
RX1d
3A184
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PDF
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Untitled
Abstract: No abstract text available
Text: Model 5303 Vishay Revere Double Ended Beam Load Cell FEATURES • Capacities: 25 to 125Klbs • Environmental protection: IP67 DIN 40.050 • Material: Nickel plated steel • Certified to NTEP class IIIL, 10000 divisions OPTIONAL FEATURE • FM approved for use in potentially explosive atmosphere
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125Klbs
125Klbs.
08-Apr-05
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PDF
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Digital Weighing Scale schematic
Abstract: tedea 1042 Tedea-Huntleigh model 1022 schematic diagram to convert 230VAC to 5VDC POWER tedea huntleigh load cell 3410 tedea load cell 1004 Weighing scale sensor gozinta Tedea-Huntleigh 9010 manual weight indicator vt200 tedea huntleigh load cell 3411
Text: VISHAY INTERTECHN O L O G Y , INC . INTERACTIVE data book load cells and indicators vishay transDucers vse-db0086-0802 Notes: 1. To navigate: a Click on the Vishay logo on any datasheet to go to the Contents page for that section. Click on the Vishay logo on any Contents
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vse-db0086-0802
Digital Weighing Scale schematic
tedea 1042
Tedea-Huntleigh model 1022
schematic diagram to convert 230VAC to 5VDC POWER
tedea huntleigh load cell 3410
tedea load cell 1004
Weighing scale sensor gozinta
Tedea-Huntleigh 9010
manual weight indicator vt200
tedea huntleigh load cell 3411
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PDF
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schematic diagram dc-ac inverter
Abstract: ba2p1t ic top 246 yn msi ms 1731 mod 8 ring counter using JK flip flop semiconductor SIM 8309 S1L EPSON SIM 8309 marking CODE GA rx 434 ask
Text: MF1246-04 GATE ARRAY S1L60000 Series DESIGN GUIDE NOTICE No part of this material may be reproduced or duplicated in any from or by any means without the written permission of EPSON. EPSON reserves the right to make changes to this material without notice. EPSON does not assume any liability of any kind arising out of any inaccuracies contained
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MF1246-04
S1L60000
schematic diagram dc-ac inverter
ba2p1t
ic top 246 yn
msi ms 1731
mod 8 ring counter using JK flip flop
semiconductor SIM 8309
S1L EPSON
SIM 8309
marking CODE GA
rx 434 ask
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PDF
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5303
Abstract: No abstract text available
Text: Model 5303 Revere Double-Ended Beam Load Cell FEATURES • Capacities: 25k to 125k lbs • Environmental protection: IP67 DIN 40.050 • Material: Nickel-plated steel • Certified to NTEP class IIIL, 10000 divisions • Optional ❍❍ FM approved for use in potentially explosive
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27-Apr-2011
5303
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PDF
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marking code R56 SMD Transistor
Abstract: smd transistor p5s marking code R52 SMD Transistor
Text: User's Guide SLUU335A – December 2008 – Revised January 2010 bq78PL114 8S EVM The PowerLAN 8S Evaluation Module EVM is a complete evaluation system for the bq78PL114 Battery Management Controller and bq76PL102 Dual-Cell Li-Ion Battery Monitor integrated circuits
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SLUU335A
bq78PL114
bq76PL102
marking code R56 SMD Transistor
smd transistor p5s
marking code R52 SMD Transistor
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PDF
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tablet schematic
Abstract: power adapter for tablet schematic power adapter for netbook schematic BN35-3H103 bq29200 tablet ic list Tablet PC schematic SBS c11 battery WSL2512R0100F bqEVSW
Text: User's Guide SLUU494 – February 2011 bq28400EVM-001 SBS 1.1 Compliant Tablet PC and Netbook 2-Series Cell Li-Ion Battery Gas Gauge and Protection The bq28400EVM-001 is a complete evaluation system for the bq28400/bq29200 battery management system. The evaluation module EVM includes one bq28400/bq29200 circuit module. Windows -based
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SLUU494
bq28400EVM-001
bq28400/bq29200
bq28400EVM
bq28400
bq29200
tablet schematic
power adapter for tablet schematic
power adapter for netbook schematic
BN35-3H103
tablet ic list
Tablet PC schematic
SBS c11 battery
WSL2512R0100F
bqEVSW
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PDF
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BQ77910
Abstract: No abstract text available
Text: User's Guide SLUU491 – April 2011 bq77908EVM Evaluation Module The bq77908EVM-001 evaluation module EVM is a complete evaluation system for the bq77908, a fourto eight-cell Li-ion battery protection integrated circuit. The EVM consists of a bq77908 circuit module and
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SLUU491
bq77908EVM
bq77908EVM-001
bq77908
BQ77910
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PDF
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asynchronous 4bit up down counter using jk flip flop
Abstract: counter 74168 Multiplexer 74152 3-8 decoder 74138 synchronous counter using 4 flip flip 74183 alu 7444 series Excess-3-gray code to Decimal decoder MH 74151 counter 74169 74169 SYNCHRONOUS 4-BIT BINARY COUNTER
Text: • GENERAL DESCRIPTION T h e M S M 7 0 V 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm an ce silicon gate 1.5 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T his series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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MSM70V000
MSM70V000,
asynchronous 4bit up down counter using jk flip flop
counter 74168
Multiplexer 74152
3-8 decoder 74138
synchronous counter using 4 flip flip
74183 alu
7444 series Excess-3-gray code to Decimal decoder
MH 74151
counter 74169
74169 SYNCHRONOUS 4-BIT BINARY COUNTER
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PDF
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G4060
Abstract: No abstract text available
Text: PRODUCT FEATURES PRODUCT DESCR IPTIO N • Standard Metal-Gate CMOS Technology M etal-G a te C M O S technology Is used in fabrication of the G 4 0 0 0 M aster slice family of gate arrays. This provides both high noise imm unity and low power consum ption plus operation over a power supply
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Untitled
Abstract: No abstract text available
Text: UTOPIAFIFO PRELIMINARY INFORMATION 1 TO 4 IDT77301 128 X 9 X 4 DEMULTIPLEXER-FIFO Integrated Device Technology, Inc. FEATURES: GENERAL DESCRIPTION • • • • • • • • • • • • • • The IDT77301 UtopiaFlFO is a high-speed, low power
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IDT77301
wi/97:
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Untitled
Abstract: No abstract text available
Text: UTOPIAFIFO PRELIMINARY INFORMATION 1 TO 4 IDT77301 128 X 9 X 4 DEMULTIPLEXER-FIFO FEATURES: GENERAL DESCRIPTION • • • • • • • • • • • • • • The IDT77301 U to p ia F lF O is a high-speed, low pow er single input port supplying fo u r d e m ultiplexing FIFO output
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IDT77301
IDT77301
18-bit
MO-136,
492-M
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A10q
Abstract: HM5116400Z-6 ice power 200 asc HM5116400Z HM5116400TT-7 CSR BLE HM5116400Z8
Text: blE D • HMTbSGB DD23 351 E7M ■ H I T 2 H M 511 6 4 0 0 S e r i e s - HITACHI/ LOGIC/ARRAYS/MEM 4,194,304-w ord x 4-bit D ynam ic R andom A c c e s s Memory The H itachi H M 5116400 is a CMOS dynamic RAM organized 4,194,304 w ords x 4 bits. It employs the most advanced CMOS technology for
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DD23351
HM5116400
304-word
mW/385
mW/358
16-bit
mo400
M4Tb203
A10q
HM5116400Z-6
ice power 200 asc
HM5116400Z
HM5116400TT-7
CSR BLE
HM5116400Z8
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PDF
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Untitled
Abstract: No abstract text available
Text: ADE-367 Z HM5116400B/BL Series 4,194,304-word x 4-bit Dynamic Random Access Memory Preliminary L I IT A O H I <11 I M O m T h e H ita c h i H M 5 1 1 6 4 0 0 B /B L is a C M O S dynamic RAM organized 4,194,304-word x 4-bit. It employs the most advanced CMOS technology
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ADE-367
HM5116400B/BL
304-word
5116400B/BL
5116400BS-6
5116400BS-7
5116400BS-8
5116400BLS-6
5116400BLS-7
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m51164
Abstract: ALRS8 a1a511 A255K HM5116400ATS A8819
Text: HM5116400A/AL Series 4,194,304-w ord x 4-bit Dynam ic Random Access Memory The H itachi H M 5 116400A /A L is a C M O S dynamic R A M organized 4,194,304 words x 4 bits. It employs the most advanced CMOS technology for high perform ance and low power. The
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HM5116400A/AL
304-word
ns/70
ns/80
mW/385
mW/358
16-bit
m51164
ALRS8
a1a511
A255K
HM5116400ATS
A8819
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PDF
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counter 74168
Abstract: 3-8 decoder 74138 counter 74169 Multiplexer 74152 74183 adder 74381 alu 74169 binary counter 74151 8 by 1 Multiplexer flip flop 74379 74175 flip flops
Text: • GENERAL DESCRIPTION T h e M S M 7 0 V 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm an ce silicon gate 1.5 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T h is series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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OCR Scan
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MSM70V000
MSM70V000,
counter 74168
3-8 decoder 74138
counter 74169
Multiplexer 74152
74183 adder
74381 alu
74169 binary counter
74151 8 by 1 Multiplexer
flip flop 74379
74175 flip flops
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PDF
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Untitled
Abstract: No abstract text available
Text: ADE-203-369 Z HM5117400B/BL Series 4,194,304-word x 4-bit Dynamic Random Access Memory Preliminary HITACHI T h e H ita c h i H M 5 1 1 7 4 0 0 B /B L is a C M O S dynam ic R A M organized 4 ,194,304-word x 4-bit. It em ploys the m ost advanced C M O S technology
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ADE-203-369
HM5117400B/BL
304-word
117400B
5117400BS-6
5117400BS-7
5117400BS-8
5117400BLS-6
5117400BLS-7
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Untitled
Abstract: No abstract text available
Text: LF43891 9 x 9-bit Digital Filter D E V IC E S IN C O R P O R A T E D □ □ □ □ 40 MHz Maximum Sampling Rate 320 MHz Multiply-Accumulate Rate 8 Filter Cells 8-bit Unsigned or 9-bit Two's Complement Data/Coefficients □ 26-bit Data Outputs □ Shift-and-Add Output Stage for
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LF43891
26-bit
MIL-STD-883,
HSP43891
HSP43891/883
84-pin
100-pin
LF43891
SUM24
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PDF
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74138n
Abstract: buffer 74374 74373 cmos dual s-r latch of IC 74191 G701
Text: • GENERAL DESCRIPTION T h e M S M 7 0 H 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm a n c e silicon gate 2 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T h is series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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Untitled
Abstract: No abstract text available
Text: LF43fifi1 3 LF43881 8 x 8-bit Digital Filter DEVICES INCORPORATED DESCRIPTION FEATURES □ □ □ □ 40 MHz Maximum Sampling Rate 320 MHz Multiply-AccumulateRate 8 Filter Cells 8-bit Unsigned or Two's Complement Data □ 8-bit Unsigned or Two's Complement
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LF43fifi1
LF43881
26-bit
MIL-STD-883,
HSP43881
HSP43881/883
84-pin
100-pin
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PDF
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lf43891gm
Abstract: No abstract text available
Text: LF43891 N l-V IC tià 9 x 9 -b it D ig ital Filter NCCDH P H HA f f- [ FEATURES □ 30 MHz Maximum Sampling Rate □ 240 MHz Multiply-Accumulate Rate □ 8 Filter Cells □ 8-bit Unsigned or 9-bit Two's Complement Data □ 8-bit Unsigned or 9-bit Two's Complement Coefficients
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LF43891
LF43891
26-bit
LF43891s
SUM20
SUM17
SUM16
SUM24
lf43891gm
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PDF
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Untitled
Abstract: No abstract text available
Text: f f ì H A R R HSP43881 IS S E M I C O N D U C T O R Digital Filter January 1994 Features Description • Eight Filter Cells The HSP43881 is a video speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded internally
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HSP43881
HSP43881
26-bit
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