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    LM 344 H Price and Stock

    Texas Instruments LMH34400IDRLR

    Transimpedance Amplifiers 240-MHz, single-ended, transimpedance amplifier with integrated clamp and ambient light cancellation 6-SOT-5X3 -40 to 125
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    Mouser Electronics LMH34400IDRLR 2,731
    • 1 $3.99
    • 10 $3.59
    • 100 $2.94
    • 1000 $2.11
    • 10000 $1.92
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    Texas Instruments LMH0344SQ/NOPB

    Equalizers 3 GBPS HD/SD SDI ADAPTIVE CABLE EQLZR
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    Mouser Electronics LMH0344SQ/NOPB 997
    • 1 $19.78
    • 10 $18.26
    • 100 $15.66
    • 1000 $13.67
    • 10000 $13.67
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    Texas Instruments LMH0344SQE/NOPB

    Equalizers 3 Gbps Hd/Sd Sdi Cable Equalizer
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    Mouser Electronics LMH0344SQE/NOPB 688
    • 1 $19.88
    • 10 $18.34
    • 100 $15.66
    • 1000 $14.5
    • 10000 $14.5
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    Texas Instruments LMH34400DRLEVM

    Amplifier IC Development Tools LMH34400 evaluation module 275-MHz, single-ended output, transimpedance amplifier
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    Mouser Electronics LMH34400DRLEVM 8
    • 1 $65.17
    • 10 $65.16
    • 100 $65.16
    • 1000 $65.16
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    Texas Instruments LMH0344SQX/NOPB

    Equalizers 3G HD/SD SDI adaptive cable equalizer 16-WQFN -40 to 85
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    Mouser Electronics LMH0344SQX/NOPB
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    LM 344 H Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Type PDF
    LM344H Unknown IC Datasheets - Shortform Scan PDF
    LM344H Unknown Shortform IC and Component Datasheets (Plus Cross Reference Data) Short Form PDF
    LM344H Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF

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    ic 4050

    Abstract: marking CODE D2B MC100E101 MC100E101FN MC100E101FNR2 MC10E101 MC10E101FN MC10E101FNR2
    Text: MC10E101, MC100E101 5VĄECL Quad 4ĆInput OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V • http://onsemi.com


    Original     		PDF MC10E101, MC100E101 MC10E/100E101 EIA/JESD78 AND8003/D MC10E101FN r14525 MC10E101/D ic 4050 marking CODE D2B MC100E101 MC100E101FN MC100E101FNR2 MC10E101 MC10E101FN MC10E101FNR2

    MC10189FN

    Abstract: MC10189L MC10189P MC10189
    Text: MC10189 Hex Inverter With Enable The MC10189 provides a high-speed Hex Inverter with a common Enable input. The hex inverting function is provided when Enable is in the low state. When Enable is in the high state all outputs are low. • PD = 200 mW typ/pkg No Load


    Original     		PDF MC10189 MC10189 MC10189L MC10189P r14525 MC10189/D MC10189FN MC10189L MC10189P

    4A32A1

    Abstract: No abstract text available
    Text: MC10197 Hex AND Gate The MC10197 provides a high speed hex AND function with strobe capability. • PD = 200 mW typ/pkg No Load • tpd = 2.8 ns typ (B–Q) • tpd = 3.8 ns typ (A–Q) • tr, tf = 2.5 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS


    Original     		PDF MC10197 MC10197 MC10197L MC10197P r14525 MC10197/D 4A32A1

    MC10197

    Abstract: MC10197FN MC10197L MC10197P
    Text: MC10197 Hex AND Gate The MC10197 provides a high speed hex AND function with strobe capability. • PD = 200 mW typ/pkg No Load • tpd = 2.8 ns typ (B–Q) • tpd = 3.8 ns typ (A–Q) • tr, tf = 2.5 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS


    Original     		PDF MC10197 MC10197 MC10197L MC10197P r14525 MC10197/D MC10197FN MC10197L MC10197P

    MC10188

    Abstract: MC10188FN MC10188L MC10188P
    Text: MC10188 Hex Buffer With Enable The MC10188 is a high–speed hex buffer with a common Enable input. When Enable is in the high state, all outputs are in the low state. When Enable is in the low state, the outputs take the same state as the inputs. • Power Dissipation = 180 mW typ/pkg No Load


    Original     		PDF MC10188 MC10188 MC10188P MC10188L r14525 MC10188/D MC10188FN MC10188L MC10188P

    H600

    Abstract: MC100H643 MC10H643 MC10H643FN 100H643
    Text: MC10H643, MC100H643 Dual Supply ECL to TTL 1:8 Clock Driver The MC10H/100H643 is a dual supply, low skew translating 1:8 clock driver. Devices in the Motorola H600 translator series utilize the 28–lead PLCC for optimal power pinning, signal flow through and


    Original     		PDF MC10H643, MC100H643 MC10H/100H643 10HTM r14525 MC10H643/D H600 MC100H643 MC10H643 MC10H643FN 100H643

    MC10106

    Abstract: MC10106FN MC10106L MC10106P
    Text: MC10106 Triple 4-3-3-Input NOR Gate • • • The MC10106 is a triple 4–3–3 input NOR gate. PD = 30 mW typ/gate No Load tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS LOGIC DIAGRAM 4 5 16 CDIP–16 L SUFFIX CASE 620


    Original     		PDF MC10106 MC10106 MC10106L MC10106P r14525 MC10106/D MC10106FN MC10106L MC10106P

    MC10105

    Abstract: MC10105L MC10105P MC10105FN t4 1080
    Text: MC10105 Triple 2-3-2-Input OR/NOR Gate • • • The MC10105 is a triple 2–3–2 input OR/NOR gate. PD = 30 mW typ/gate No Load tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS LOGIC DIAGRAM 4 3 5 2 9 10 11 16 CDIP–16


    Original     		PDF MC10105 MC10105 MC10105L MC10105P r14525 MC10105/D MC10105L MC10105P MC10105FN t4 1080

    MC10159

    Abstract: MC10159FN MC10159L MC10159P
    Text: MC10159 Quad 2-Input Multiplexer Inverting The MC10159 is a quad two channel multiplexer with enable. It incorporates common enable and common data select inputs. The select input determines which data inputs are enabled. A high (H) level enables data inputs D00, D10, D20, and D30. A low (L) level enables


    Original     		PDF MC10159 MC10159 MC10159L r14525 MC10159/D MC10159FN MC10159L MC10159P

    MC10158

    Abstract: MC10158FN MC10158L MC10158P
    Text: MC10158 Quad 2-Input Multiplexer Non–Inverting The MC10158 is a quad two channel multiplexer. A common select input determines which data inputs are enabled. A high (H) level enables data inputs D00, D10, D20, and D30 and a low (L) level enables data inputs D01, D11, D21, and D31.


    Original     		PDF MC10158 MC10158 MC10158L MC10158P r14525 MC10158/D MC10158FN MC10158L MC10158P

    max5870

    Abstract: MC100E131 MC100E131FN MC100E131FNR2 MC10E131 MC10E131FN MC10E131FNR2
    Text: MC10E131, MC100E131 5VĄECL 4ĆBit D FlipĆFlop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE


    Original     		PDF MC10E131, MC100E131 MC10E/100E131 r14525 MC10E131/D max5870 MC100E131 MC100E131FN MC100E131FNR2 MC10E131 MC10E131FN MC10E131FNR2

    D1111

    Abstract: D1310 D1212 equal of D1111 MC10174P t1315 MC10174 MC10174FN MC10174L d1013
    Text: MC10174 Dual 4 to 1 Multiplexer The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state.


    Original     		PDF MC10174 MC10174 MC10174L MC10174P D1013 r14525 MC10174/D D1111 D1310 D1212 equal of D1111 MC10174P t1315 MC10174FN MC10174L d1013

    MC10123

    Abstract: MC10123FN MC10123L MC10123P
    Text: MC10123 Triple 4-3-3-Input Bus Driver The MC10123 consists of three NOR gates designed for bus driving applications on card or between cards. Output low logic levels are specified with VOL = –2.1 Vdc so that the bus may be terminated to –2.0 Vdc. The gate output, when low, appears as a high impedance to


    Original     		PDF MC10123 MC10123 MC10123, r14525 MC10123/D MC10123FN MC10123L MC10123P

    MC10195

    Abstract: MC10195FN MC10195L MC10195P CDIP16 t9142
    Text: MC10195 Hex Inverter/Buffer The MC10195 is a Hex Buffer Inverter which is built using six EXCLUSIVE NOR gates. There is a common input to these gates which when placed low or left open allows them to act as inverters. With the common input connected to a high logic level the MC10195


    Original     		PDF MC10195 MC10195 MC10195L MC10195P r14525 MC10195/D MC10195FN MC10195L MC10195P CDIP16 t9142

    mc10109

    Abstract: MC10109FN MC10109L MC10109P
    Text: MC10109 Dual 4-5-Input OR/NOR Gate • • • The MC10109 is a dual 4–5 input OR/NOR gate. PD = 30 mW typ/gate No Load tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS LOGIC DIAGRAM ă4 ă5 16 3 ă6 ă7 ă9 10 11 12


    Original     		PDF MC10109 MC10109 MC10109L MC10109P r14525 MC10109/D MC10109FN MC10109L MC10109P

    T4 1060

    Abstract: MC10101P T45 marking MC10101L mc10101 MC10101FN
    Text: MC10101 Quad OR/NOR Gate The MC10101 is a quad 2–input OR/NOR gate with one input from each gate common to pin 12. • PD = 25 mW typ/gate No Load • tpd = 2.0 ns typ • tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com LOGIC DIAGRAM 4 MARKING DIAGRAMS


    Original     		PDF MC10101 MC10101 MC10101L MC10101P r14525 MC10101/D T4 1060 MC10101P T45 marking MC10101L MC10101FN

    MC10102

    Abstract: MC10102P MC10102-D equivalent MC10102FN MC10102L mc10102l for application S/BIP/SCB345100/B/1587/MC10102L
    Text: MC10102 Quad 2-Input NOR Gate The MC10102 is a quad 2–input NOR gate. The MC10102 provides one gate with OR/NOR outputs. • PD = 25 mW typ/gate No Load • tpd = 2.0 ns typ • tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com LOGIC DIAGRAM MARKING DIAGRAMS


    Original     		PDF MC10102 MC10102 MC10102L MC10102P r14525 MC10102/D MC10102P MC10102-D equivalent MC10102FN MC10102L mc10102l for application S/BIP/SCB345100/B/1587/MC10102L

    A1615

    Abstract: mc10102l
    Text: MC10102 Quad 2-Input NOR Gate The MC10102 is a quad 2–input NOR gate. The MC10102 provides one gate with OR/NOR outputs. • PD = 25 mW typ/gate No Load • tpd = 2.0 ns typ • tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com LOGIC DIAGRAM MARKING DIAGRAMS


    Original     		PDF MC10102 MC10102 MC10102L MC10102P r14525 MC10102/D A1615 mc10102l

    k 790

    Abstract: No abstract text available
    Text: MC10H352 Quad CMOS to PECL* Translator Description The MC10H352 is a quad translator for interfacing data between a CMOS logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H352 has CMOS compatible inputs and PECL complementary open−emitter


    Original     		PDF MC10H352 MC10H350 MC10H352/D k 790

    MC10161

    Abstract: MC10162 MC10162FN MC10162L MC10162P
    Text: MC10162 Binary to 1-8 Decoder High The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low.


    Original     		PDF MC10162 MC10162 MC10161 r14525 MC10162/D MC10162FN MC10162L MC10162P

    MC10171

    Abstract: MC10171FN MC10171L MC10171P
    Text: MC10171 Dual Binary to 1-4 Decoder Low The MC10171 is a binary coded 2 line to dual 4 line decoder with selected outputs low. With either E0 or E1 high, the corresponding selected 4 outputs are high. The common enable E, when high, forces all outputs high.


    Original     		PDF MC10171 MC10171 MC10171L MC10171P r14525 MC10171/D MC10171FN MC10171L MC10171P

    MC10176

    Abstract: 2T922 MC10176FN MC10176L MC10176P T92 marking
    Text: MC10176 Hex D Master/Slave Flip-Flop The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going Clock transition. Thus, outputs may


    Original     		PDF MC10176 MC10176 r14525 MC10176/D 2T922 MC10176FN MC10176L MC10176P T92 marking

    transistor WL 431

    Abstract: MC10192 MC10192FN MC10192L MC10192P marking Z1 6-pin marking Z3 6-pin
    Text: MC10192 Quad Bus Driver The MC10192 contains four line drivers with complementary outputs. Each driver has a Data D input and shares an Enable (E) input with another driver. The two driver outputs are the uncommitted collectors of a pair of NPN transistors operating as a current switch.


    Original     		PDF MC10192 MC10192 r14525 MC10192/D transistor WL 431 MC10192FN MC10192L MC10192P marking Z1 6-pin marking Z3 6-pin

    MC10104FN

    Abstract: MC10104P MC10104 MC10104L
    Text: MC10104 Quad 2-Input AND Gate The MC10104 is a quad 2–input AND gate. One of the gates has both AND/NAND outputs available. • PD = 35 mW typ/gate No Load • tpd = 2.7 ns typ • tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com LOGIC DIAGRAM 4 MARKING


    Original     		PDF MC10104 MC10104 MC10104L MC10104P r14525 MC10104/D MC10104FN MC10104P MC10104L