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    74F74

    Abstract: inmos transputer T225 transputer Inmos t805 FP 8022 74F04 800E 801C T222 T225
    Text: IMS T225 16-bit transputer FEATURES H 16 bit architecture H 33 ns internal cycle time H 30 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 60 Mbytes/sec sustained data rate to internal memory H 64 Kbytes directly addressable external memory


    Original     		PDF 16-bit 74F74 inmos transputer T225 transputer Inmos t805 FP 8022 74F04 800E 801C T222 T225

    T425

    Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
    Text: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal


    Original     		PDF 32-bit T425 T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425

    74F04

    Abstract: 74F74 800E 801C T222 T225 T225E Inmos T222
    Text: IMS T225 16-bit transputer FEATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory


    Original     		PDF 16-bit 74F04 74F74 800E 801C T222 T225 T225E Inmos T222

    T222 transputer

    Abstract: 74F74 800E 801C T222 T225 IMST222 T225E
    Text: IMS T225E 16-bit transputer – Extended temperature FEATURES 16 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 40 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory


    Original     		PDF T225E 16-bit T222 transputer 74F74 800E 801C T222 T225 IMST222 T225E

    Inmos t805

    Abstract: IMS T805-F20E T425 T800 IMST800 21-F5 REAL32
    Text: IMS T805E 32-bit floating-point transputer – Extended temperature FEATURES APPLICATIONS Scientific and mathematical applications High speed multi processor systems High performance graphics processing – HUD/HDD displays Supercomputers Workstations and workstation clusters


    Original     		PDF T805E 32-bit Inmos t805 IMS T805-F20E T425 T800 IMST800 21-F5 REAL32

    ic t805

    Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
    Text: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support


    OCR Scan     		PDF T805E 32-bit ic t805 IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11

    inmos T414

    Abstract: Transputer T414 inmos transputer reference manual T414 inmos transputer link adapter Inmos t4142 Inmos transputer imst414 IMS T414
    Text: mos Reference manual transputer i mos INMOS Limited PO Box 424 Bristol BS99 7DD England Telephone 0272 290861 Telex 444723 INMOS Corporation PO Box 16000 Colorado Springs CO 80935 USA Telephone (303) 630 4000 TWX 910 920 4904 INMOS GmbH Danziger Strasse 2


    OCR Scan     		PDF TRN006 inmos T414 Transputer T414 inmos transputer reference manual T414 inmos transputer link adapter Inmos t4142 Inmos transputer imst414 IMS T414

    imst400

    Abstract: 25f0 T222 transputer FP 1117 aj T400 clock FP 801 transputer T222 T225 inmos transputer T225
    Text: SGS-THOMSON IMS T225 L K g lT IM M ! 16 -bit transputer EATURES 16 bit architecture 33 ns internal cycle tim e 30 M IPS pea k instruction rate D ebugging support 4 Kbytes on-chip static RAM 60 M bytes/sec sustained data rate to internal m em ory 64 Kbytes directly addressable external m em ory


    OCR Scan     		PDF 16-bit IMST400 25f0 T222 transputer FP 1117 aj T400 clock FP 801 transputer T222 T225 inmos transputer T225

    inmos T414

    Abstract: IMS T414 Transputer T414 IMST414 T414 inmos transputer reference manual transputer 7FFFFF84 22FC
    Text: INMOS CORP 10E D | 4aG2b0fl 00G33S0 3 1 Ö nm oS C h a p te r 4 T - ^ ? -/7 -5 7 9 IMS T414 engineering data 107 Powered by ICminer.com Electronic-Library Service CopyRight 2003 IN M O S CORP "T-Vf-/7 * £ 7 40 02 1, 68 0 0 0 3 3 5 1 I I s I


    OCR Scan     		PDF T-47-/7-5 00D33S1 Link123Special inmos T414 IMS T414 Transputer T414 IMST414 T414 inmos transputer reference manual transputer 7FFFFF84 22FC

    T225E

    Abstract: ST225
    Text: w # S G S -m O M S O N IMS T225E 16-bit transputer - Extended temperature FEATURES • 16 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 40 Mbytes/sec sustained data rate to internal memory


    OCR Scan     		PDF T225E 16-bit IMST400 T225E ST225

    IMS T414

    Abstract: inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800
    Text: / / ,' ï ! I NMOS CORP IDE D I 4 ö 0 2 töfl OOOaSTl 3 I IM S T 425 transputer nnm os Advance Data FEATURES 30 MIPS peak 15 MIPS sustained performance 32 bit architecture IMS T800 & IMS T414-20 hardware/pin compatible 4 Kbytes on chip RAM for 120 Mbytes/sec data rate


    OCR Scan     		PDF T414-20 T425-G17S T425-G20S T425-G25S T425-G30S T425-J17S T425-J20S T425-G17M T425-G20M IMS T414 inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800

    Untitled

    Abstract: No abstract text available
    Text: S G S -T H O M S O N S IMS T225E s L lP T M lM i 16-bit transputer - Extended temperature FEATURES H 16 bit architecture H 50 ns internal cycle time H 20 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 40 Mbytes/sec sustained data rate to internal


    OCR Scan     		PDF T225E 16-bit 7T21237

    TDR-90

    Abstract: itr 8012
    Text: FEATURES Full MIL temperature range -55°C to +125°C MIL-STD-883C processing 16 bit architecture with 8.75 MIPS performance 2 Kbytes 57 ns RAM on chip Four 5/10/20 Mbits/sec INMOS serial links 16 bit external memory interface Directly addresses 64 Kbytes at 17,5 Mbytes/sec


    OCR Scan     		PDF MIL-STD-883C APPL25Â A1-A11 T212M T212A-G17M TDR-90 itr 8012

    inmos t212 transputer

    Abstract: T222 transputer transputer T222 series T212 data inmos transputer reference manual 25F3 T212 Inmos T212
    Text: 297 IM S T 212 transputer Uranos The IMS 1222 is recommended for new designs Engineering Data FEATURES 16 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate Pin compatible with IMS T222 2 Kbytes on-chip static RAM 80 Mbytes/sec sustained data rate to internal memory


    OCR Scan     		PDF

    t425

    Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
    Text: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414


    OCR Scan     		PDF 32-bit MST400 PGA/84pin PLCC/100 t425 SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425

    sbl 20100

    Abstract: T425-X25S MEMAD11 inmos transputer T425
    Text: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414


    OCR Scan     		PDF 32-bit sbl 20100 T425-X25S MEMAD11 inmos transputer T425

    CQ 2AF1

    Abstract: IMST425 IMS T400 Inmos T222
    Text: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal


    OCR Scan     		PDF 32-bit CQ 2AF1 IMST425 IMS T400 Inmos T222

    Untitled

    Abstract: No abstract text available
    Text: SGS-THOMSON IMS T225 • H I 16-bit transputer EATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory


    OCR Scan     		PDF 16-bit IMST400

    inmos transputer T225

    Abstract: IMST222
    Text: 1 Introduction 1 Introduction The IMS T225 transputer is a 16 bit CMOS microcomputer with 4 Kbytes on-chip RAM for high speed pro­ cessing, an external memory interface and four standard INMOS communication links. The instruction set achieves efficient implementation of high level languages such as ANSI C and provides direct support for


    OCR Scan     		PDF IMST225 inmos transputer T225 IMST222

    Untitled

    Abstract: No abstract text available
    Text: IMS T225 7 Links Four identical INMOS bi-directional serial links provide synchronised communication between processors and with the outside world. Each link comprises an input channel and output channel. A link between two transputers is implemented by connecting a link interface on one transputer to a link interface on the other


    OCR Scan     		PDF

    IMST800

    Abstract: IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent
    Text: INMOS CORP IDE D | MfiOBbaa QDQ32fia 5 I DffimoS Chapter 3 T - 4 1 - 1 7 -5 7 • IMS T800 engineering data 45 iNnos T - * ¿ 4 - /? - & corp / ioE d | M a o 2 t,aa □ o o 3 5 a ci m | 46 1 Introduction vcc GND C a p P lu s C a p M in u s R eset A n a ly s e


    OCR Scan     		PDF 02baa -Link123Special EventAc70 000000001A IMST800 IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent

    Untitled

    Abstract: No abstract text available
    Text: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support


    OCR Scan     		PDF IMST414 T805-G20S IMST805-G25S T805-G30S T805-J20S T805-J25S T805-F20S T805-F25S T805-F30S MIL-STD-883

    inmos transputer T225

    Abstract: inmos transputer T425 inmos T225 T400 clock transputer IMST222 2U06 T225 801C IMST225
    Text: /^ T A S G S -T H O M S O N T Ë , « fô tm IMS T225 ilg ïïlîM Ig S 16-bit transputer FEATURES • 16 bit architecture ■ 33 ns internal cycle time ■ 30 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 60 Mbytes/sec sustained data rate to internal memory


    OCR Scan     		PDF 16-bit 71E1E37 inmos transputer T225 inmos transputer T425 inmos T225 T400 clock transputer IMST222 2U06 T225 801C IMST225

    IMST222

    Abstract: IMST225 lwm 2464 a T805-G20E
    Text: SGS-THOMSON IMS T805E L K g lT IM M ! 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle tim e 20 M IPS peak instruction rate 2.8 M flops (peak) instruction rate Pin co m patible w ith IMS T800 Floating Point Unit


    OCR Scan     		PDF T805E 32-bit IMST222 IMST225 lwm 2464 a T805-G20E