CCA MTBF
Abstract: 8T245
Text: SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A – JUNE 2005 – REVISED AUGUST 2005 FEATURES • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22
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SN74LVC8T245
SCES584A
000-V
A114-A)
A115-A)
CCA MTBF
8T245
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PDF
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A115-A
Abstract: C101 SN74ALVCH16831 SN74ALVCH16831DBBR
Text: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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000-V
A114-A)
A115-A)
SN74ALVCH16831
A115-A
C101
SN74ALVCH16831DBBR
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PDF
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Untitled
Abstract: No abstract text available
Text: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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SN74ALVCH16831
SCES083F
000-V
A114-A)
A115-A)
SN74ALVCH1ved.
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74ALVCH16269 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES019J – JULY 1995 – REVISED NOVEMBER 2000 D D D D Member of Texas Instruments’ Widebus Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22
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SN74ALVCH16269
12-BIT
24-BIT
SCES019J
000-V
A114-A)
A115-A)
SN74ALVCH16269
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PDF
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SN74ALVC16834
Abstract: SN74ALVC16834DL SN74ALVC16834DLR A115-A
Text: SN74ALVC16834 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES140E – JULY 1998 – REVISED MAY 2002 D D D Member of the Texas Instruments Widebus Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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SN74ALVC16834
18-BIT
SCES140E
000-V
A114-A)
A115-A)
SN74ALVC16834
SN74ALVC16834DL
SN74ALVC16834DLR
A115-A
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PDF
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SN74ALVC16834
Abstract: No abstract text available
Text: SN74ALVC16834 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES140C – JULY 1998 – REVISED OCTOBER 2000 D D D Member of Texas Instruments’ Widebus Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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SN74ALVC16834
18-BIT
SCES140C
000-V
A114-A)
A115-A)
SN74ALVC16834
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PDF
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A115-A
Abstract: SN74ALVC16834 SN74ALVC16834DL SN74ALVC16834DLR
Text: SN74ALVC16834 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES140E – JULY 1998 – REVISED MAY 2002 D D D Member of the Texas Instruments Widebus Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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SN74ALVC16834
18-BIT
SCES140E
000-V
A114-A)
A115-A)
A115-A
SN74ALVC16834
SN74ALVC16834DL
SN74ALVC16834DLR
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PDF
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A115-A
Abstract: C101 SN74ALVCH16831 SN74ALVCH16831DBBR
Text: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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000-V
A114-A)
A115-A)
SN74ALVCH16831
A115-A
C101
SN74ALVCH16831DBBR
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PDF
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A115-A
Abstract: C101 SN74ALVCH16831 SN74ALVCH16831DBBR
Text: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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000-V
A114-A)
A115-A)
SN74ALVCH16831
A115-A
C101
SN74ALVCH16831DBBR
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74ALVCH16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES053F – SEPTEMBER 1995 – REVISED OCTOBER 2000 D D D D Member of Texas Instruments’ Widebus Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
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Original
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SN74ALVCH16835
18-BIT
SCES053F
000-V
A114-A)
A115-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229J – OCTOBER 1995 – REVISED SEPTEMBER 2002 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,
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Original
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SN54AHCT00,
SN74AHCT00
SCLS229J
000-V
A114-A)
A115-A)
SN54AHCT00
AHCT00
SN74AHCT00PW
SN74AHCT00PWLE
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHCT14, SN74AHCT14 HEX SCHMITT-TRIGGER INVERTERS SCLS246P – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT14 . . . J OR W PACKAGE SN74AHCT14 . . . D, DB, DGV, N, NS, OR PW PACKAGE
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Original
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SN54AHCT14,
SN74AHCT14
SCLS246P
000-V
A114-A)
A115-A)
SN54AHCT14
AHCT14
scyb017a
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT08 . . . J OR W PACKAGE SN74AHCT08 . . . D, DB, DGV, N, NS,
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Original
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SN54AHCT08,
SN74AHCT08
SCLS237L
000-V
A114-A)
A115-A)
SN54AHCT08
AHCT08
ORDERINc003d
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PDF
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Untitled
Abstract: No abstract text available
Text: TCA8424 www.ti.com SCDS341 – MARCH 2013 Low-Voltage 8x16 Keyboard Scanner with HID over I2C Compliant Interface Check for Samples: TCA8424 FEATURES 1 • • • • ESD Protection Exceeds JESD 22 – 1000-V Human-Body Model A114-A RHB 5mmx5mm RSM 4mmx4mm
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Original
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TCA8424
SCDS341
000-V
A114-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B PIPELINE 11-BIT ADC HIGH SPEED SERIALIZERS CLOCK GENERATION
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Original
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JESD204B
48-Lead
AD6673-250
05-10-2012-C
CP-48-13
CP-48-13
AD6673
AD6673
D10632-0-10/12
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PDF
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74ACT16254
Abstract: No abstract text available
Text: 74ACT16254 16ĆBIT ADDRESS/DATA MULTIPLEXER WITH 3ĆSTATE OUTPUTS SCAS527A − AUGUST 1995 − NOVEMBER 1995 D Member of the Texas Instruments D D D D D DGG PACKAGE TOP VIEW Widebus Family Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
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74ACT16254
SCAS527A
JESD-17
74ACT16254
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PDF
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Untitled
Abstract: No abstract text available
Text: 80 MHz Bandwidth, Dual IF Receiver AD6673 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B PIPELINE 11-BIT ADC HIGH SPEED SERIALIZERS
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Original
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JESD204B
48-Lead
AD6673-250
05-10-2012-C
CP-48-13
CP-48-13
AD6673
AD6673
PR10632-0-10/12
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PDF
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JESD-71A
Abstract: stapl EPM1270 EPM2210 EPM240 EPM570 EPM7064AE EPM7128AE JESD-71 jam player
Text: 14. Using Jam STAPL for ISP via an Embedded Processor MII51015-1.8 Introduction Advances in programmable logic devices PLDs have enabled the innovative insystem programmability (ISP) feature. The Jam Standard Test and Programming Language (STAPL), JEDEC standard JESD-71, is compatible with all current PLDs that
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MII51015-1
JESD-71,
JESD-71A
stapl
EPM1270
EPM2210
EPM240
EPM570
EPM7064AE
EPM7128AE
JESD-71
jam player
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093K – JANUARY 1991 – REVISED OCTOBER 1998 D D D D D State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
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SN54ABT541,
SN74ABT541B
SCBS093K
JESD-17
32-mA
64-mA
SN54ABT541
SN74ABT541B
SN74ABT541BPWLE
SN74ABT541BPWR
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PDF
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E19 CORE TRANSFORMER
Abstract: CP-48-1 AD9524
Text: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B SYSREF± SYNCINB± CLK± RFCLK PIPELINE 11-BIT ADC HIGH
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Original
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JESD204B
48-Lead
AD6673-250
05-10-2012-C
CP-48-13
CP-48-13
AD6673
AD6673
D10632-0-10/12
E19 CORE TRANSFORMER
CP-48-1
AD9524
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PDF
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AD9250
Abstract: E19 CORE TRANSFORMER AD9524 upstream docsis cmts JESD204B
Text: 14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter AD9250 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM DVDD AGND DGND DRGND AD9250 VIN+A VIN–A PIPELINE 14-BIT ADC VCM VIN+B VIN–B PIPELINE 14-BIT ADC JESD-204B INTERFACE SERDOUT0± CML, TX
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Original
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14-Bit,
MSPS/250
JESD204B,
JESD204B
AD9250-170
48-Lead
AD9250-250
05-10-2012-C
CP-48-13
AD9250
E19 CORE TRANSFORMER
AD9524
upstream docsis cmts
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHC08, SN74AHC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS236H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC08 . . . J OR W PACKAGE SN74AHC08 . . . D, DB, DGV, N, NS, OR PW PACKAGE
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Original
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SN54AHC08,
SN74AHC08
SCLS236H
000-V
A114-A)
A115-A)
SN54AHC08
AHC08
sgyc003d
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PDF
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74ACT16254
Abstract: 74ACT244 74ACT245
Text: 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 D D D D D D Member of the Texas Instruments Widebus Family Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Bus-Hold Inputs Eliminate the Need for
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Original
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74ACT16254
16-BIT
SCAS527A
JESD-17
74ACT16254
16-bit,
74ACT244
74ACT245
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74CBT16212A 24-BIT FET BUS-EXCHANGE SWITCH SCDS0Q7K - NOVEMBER 1992 - REVISED MARCH 1998 5-Q Switch Connection Between Two Ports TTL-Compatible Input Levels Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V
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OCR Scan
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SN74CBT16212A
24-BIT
MIL-STD-833,
300-mil
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PDF
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