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Omega Engineering INC-14-48OPEN STANDARD PROTECTION TUBE, MINIAT
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DigiKey	INC-14-48OPEN	Bulk			1	1 $158.23 10 $158.23 100 $158.23 1000 $158.23 10000 $158.23	Buy Now
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Omega Engineering INC-14-6CLOSED STANDARD PROTECTION TUBE, MINIAT
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DigiKey	INC-14-6CLOSED	Bulk			1	1 $47.72 10 $47.72 100 $47.72 1000 $47.72 10000 $47.72	Buy Now
RS	INC-14-6CLOSED	Bulk		5 Weeks	1	1 $38.14 10 $38.14 100 $38.14 1000 $38.14 10000 $38.14	Get Quote
Omega Engineering INC-14-12CLOSED STANDARD PROTECTION TUBE, MINIAT
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DigiKey	INC-14-12CLOSED	Bulk			1	1 $67.39 10 $67.39 100 $67.39 1000 $67.39 10000 $67.39	Buy Now
RS	INC-14-12CLOSED	Bulk		5 Weeks	1	1 $55.6 10 $55.6 100 $55.6 1000 $55.6 10000 $55.6	Get Quote
Omega Engineering INC-14-24CLOSED STANDARD PROTECTION TUBE, MINIAT
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DigiKey	INC-14-24CLOSED	Bulk			1	1 $89.74 10 $89.74 100 $89.74 1000 $89.74 10000 $89.74	Buy Now
RS	INC-14-24CLOSED	Bulk		5 Weeks	1	1 $76 10 $76 100 $76 1000 $76 10000 $76	Get Quote
Omega Engineering INC-14-48CLOSED STANDARD PROTECTION TUBE, MINIAT
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DigiKey	INC-14-48CLOSED	Bulk			1	1 $154.08 10 $154.08 100 $154.08 1000 $154.08 10000 $154.08	Buy Now
RS	INC-14-48CLOSED	Bulk		5 Weeks	1	1 $136.74 10 $136.74 100 $136.74 1000 $136.74 10000 $136.74	Get Quote

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INC14 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches	Original	PA7572 13ns/20ns	PDF
Untitled Abstract: No abstract text available Text: Commercial/Industrial PA7540 PEEL Array Programmable Electrically Erasable Logic Array Most Powerful 24-pin PLD Available - 20 I/Os, 2 inputs/clocks, 40 registers/latches - 40 logic cell output functions - PLA structure with true product-term sharing - Logic functions and registers can be I/O-buried	Original	PA7540 24-pin 10ns/15ns -40to	PDF
THX 201 Abstract: 26V12 PA7536 I326 Text: PA7536 PEEL Array Programmable Electrically Erasable Logic Array Versatile Logic Array Architecture - 12 I/Os, 14 inputs, 36 registers/latches - Up to 36 logic cell output functions - PLA structure with true product-term sharing - Logic functions and registers can be I/O-buried	Original	PA7536 28-pin 4-02-052A THX 201 26V12 I326	PDF
MAX4380 Abstract: MAX4380EUT-T MAX4380EXT-T MAX4381EUB MAX4382EEE MAX4382ESD MAX4382EUD MAX4384 Text: 19-2012; Rev 1; 6/01 Ultra-Small, Low-Cost, 210MHz, Single-Supply Op Amps with Rail-to-Rail Outputs and Disable Features ♦ Low Cost and High Speed: 210MHz -3dB Bandwidth 55MHz 0.1dB Gain Flatness 485V/µs Slew Rate ♦ Disable Mode Places Outputs in High-Impedance	Original	210MHz, 210MHz 55MHz -65dBc -63dB 10-Pin 14-Pin 20-Pin MAX4380 MAX4384 MAX4380EUT-T MAX4380EXT-T MAX4381EUB MAX4382EEE MAX4382ESD MAX4382EUD MAX4384	PDF
"Programmable Electrically Erasable Logic Array" Abstract: PA7128P-15 PA7128J1 ict pa7128 TLC 555 26V12 LCC14 PA7128J-15 PA7128P-20 PA7128S-15 Text: Commercial/ Industrial PA7128 PA7128 PEELTM Array Programmable Electrically Erasable Logic Array Features − As fast as 9ns/15ns tpdi/tpdx , 83.3MHz (fMAX) − Industrial grade available for 4.5 to 5.5V Vcc and -40 to +85 °C temperatures • CMOS Electrically Erasable Technology	Original	PA7128 PA7128 9ns/15ns 28-pin 25MHz, 9/15ns PA7128P-15 PA7128J-15 PA7128S-15 "Programmable Electrically Erasable Logic Array" PA7128P-15 PA7128J1 ict pa7128 TLC 555 26V12 LCC14 PA7128J-15 PA7128P-20 PA7128S-15	PDF
ICT Peel Abstract: PA7540S-15 GAL6002 PA7540 Text: Commercial/Industrial PA7540 PEEL Array Programmable Electrically Erasable Logic Array Most Powerful 24-pin PLD Available - 20 I/Os, 2 inputs/clocks, 40 registers/latches - 40 logic cell output functions - PLA structure with true product-term sharing - Logic functions and registers can be I/O-buried	Original	PA7540 24-pin 10ns/15ns 04-02-051B ICT Peel PA7540S-15 GAL6002	PDF
PA7140J-20 Abstract: PA7140P-25 LCC14 PA7140 PA7140F-20 PA7140JN-20 PA7140P-20 "Programmable Electrically Erasable Logic Array" Text: Commercial/ Industrial PA7140 PEELTM Array Features • ■ Programmable Electrically Erasable Logic Array Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches - Up to 72 logic cell output functions - PLA structure with true product-term sharing	Original	PA7140 13ns/20ns 40-pin 44-pin PA7140P-20 PA7140F-20 13/20ns PA7140J-20 PA7140JN-20 PA7140P-25 PA7140J-20 PA7140P-25 LCC14 PA7140F-20 PA7140JN-20 PA7140P-20 "Programmable Electrically Erasable Logic Array"	PDF
THX 201 Abstract: PA7572 PEEL programming Anachip USA Text: PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features	Original	PA7572 40-pin 44-pin 4-02-050A THX 201 PEEL programming Anachip USA	PDF
TLO 81 Abstract: 16009A ICT Peel 26V12 PA7536 ma706 Text: Commercial/Industrial PA7536 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC and PLCC packages Versatile Logic Array Architecture - 12 I/Os, 14 inputs, 36 registers/latches	Original	PA7536 28-pin 04-02-052D TLO 81 16009A ICT Peel 26V12 ma706	PDF
MAX4380 Abstract: MAX4380EUT-T MAX4380EXT-T MAX4381EUB MAX4382EEE MAX4382ESD MAX4382EUD MAX4384 Text: 19-2012; Rev 2; 4/03 Ultra-Small, Low-Cost, 210MHz, Single-Supply Op Amps with Rail-to-Rail Outputs and Disable Features ♦ Low Cost and High Speed: 210MHz -3dB Bandwidth 55MHz 0.1dB Gain Flatness 485V/µs Slew Rate ♦ Disable Mode Places Outputs in High-Impedance	Original	210MHz, 210MHz 55MHz -65dBc -63dB 10-Pin 14-Pin 20-Pin MAX4380 MAX4384 MAX4380EUT-T MAX4380EXT-T MAX4381EUB MAX4382EEE MAX4382ESD MAX4382EUD MAX4384	PDF
Untitled Abstract: No abstract text available Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches	Original	PA7572 13ns/20ns 4-02-050A	PDF
THX 201 Abstract: PA7540P-15 GAL6002 PA7540 a7540j A7540 Text: PA7540 PEEL Array Programmable Electrically Erasable Logic Array Most Powerful 24-pin PLD Available - 20 I/Os, 2 inputs/clocks, 40 registers/latches - 40 logic cell output functions - PLA structure with true product-term sharing - Logic functions and registers can be I/O-buried	Original	PA7540 24-pin 10ns/15ns 04-02-051B THX 201 PA7540P-15 GAL6002 a7540j A7540	PDF
AD6654 Abstract: AD6636 THC 472 Text: 150 MSPS, Wideband, Digital Downconverter DDC AD6636 Synchronous serial I/O operation (SPI -, SPORT-compatible) Supports 8-bit or 16-bit microport modes 3.3 V I/O, 1.8 V CMOS core User-configurable, built-in, self-test (BIST) capability JTAG boundary scan	Original	AD6636 16-bit CDMA2000) MO-192-AAF-1 256-Lead BC-256-2) AD6636BBCZ AD6636CBCZ1 AD6636BC/PCB AD6654 AD6636 THC 472	PDF
ICT Peel Abstract: PA7572 Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features	Original	PA7572 40-pin 44-pin 4-02-050A ICT Peel	PDF

isl 6251 schematic Abstract: smd transistor A4S Siemens OFW 361 smd marking b4h 6Bs smd transistor NPN TRANSISTORS LIST ACCORDING TO CURRENT, VOLTAG Transistors Diodes smd A7H a4s smd transistor npn transistor ss100 smd transistor 6Bs Text: SIEMENS Halbleiter-Datenblätter Im Produktbereich „Halbleiter“ konnten uns leider von SIEMENS nicht alle Daten rechtzeitig zur Verfügung gestellt werden. Wir werden uns bemühen, die Auswahl an Datenblättern dieses Bereichs für die nächste Ausgabe dieser CD zu vervollständigen.	Original	Q62702-A772 Q62702-A731 Q62702-A773 OT-23 isl 6251 schematic smd transistor A4S Siemens OFW 361 smd marking b4h 6Bs smd transistor NPN TRANSISTORS LIST ACCORDING TO CURRENT, VOLTAG Transistors Diodes smd A7H a4s smd transistor npn transistor ss100 smd transistor 6Bs	PDF
tda 2572 Abstract: tda 2050 equivalent TDA 1432 Text: SIEM ENS Clock Sync Generator SDA 9257 Preliminary Data MOS 1C Features • • • • • • • • • • All settings made by I2C Bus PLL lock-in behavior can be set to TV- or VCR mode Automatic clamping of CVBS input Provides all horizontal and vertical sync signals and	OCR Scan	24-MHz 27-MHz 50/60-Hz fl235 P-LCC-44-1 fl23Sfc A235b05 fl235b05 tda 2572 tda 2050 equivalent TDA 1432	PDF
AL6002 Abstract: TLC 555 L6002 Text: PA7024 INC. PA7024 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology High-Speed Commercial and Industrial Versions - Reprogrammable in 24-pin DIP, S O IC and 28-pin PLC C packages - Optional JN package for 2 2V 1 0 power/ground	OCR Scan	PA7024 PA7024 24-pin 28-pin 10ns/15ns Integra024 10/15ns PA7024P-15 PA7024J-15 AL6002 TLC 555 L6002	PDF
Untitled Abstract: No abstract text available Text: PA7140 INC. PA7140 PEEL Array Programmable Electrically Erasable Logic Array Features • Versatile Logic Array Architecture - ■ ■ 24 l/Os, 14 inputs, 60 registers/latches Up to 72 logic cell output functions PLA structure w ith true product-term sharing	OCR Scan	PA7140 PA7140 40-pin 44-pin As7/25ns 17/25ns PA7140JI-25 PA7140JN-25	PDF
22CV10AP Abstract: 22cv10 nte quick cross ict peel 18CV8J palce programmer schematic blackjack vhdl code PA7140J-20 INTEL PLD910 PALCE610 Text: Data Book General Information PEEL Arrays PEEL Devices Special Products and Services Development Tools Application Notes and Reports Package Information PLACE Users Manual_ Introduction to PLACE PLACE Installation Getting Started with PLACE Operation Reference Guide	OCR Scan		PDF
Untitled Abstract: No abstract text available Text: Commercial/ Industrial INC. TM PA7140 PEEL Array Programmable Electrically Erasable Logic Array Features I CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP and 44-pin PLCC packages I Versatile Logic Array Architecture - 24 l/Os, 14 inputs, 60 registers/latches	OCR Scan	PA7140 40-pin 44-pin 13ns/2Plastic 28-Pin 004-J 0G01bfi3 0001bfl4	PDF
TDA 1432 Abstract: tda 2050 equivalent siemens sda 9257 h20f4 INC01 TDA 2050 Circuit KSS 27Mhz crystal oscillator H10N4 H20F1 Text: SIEMENS Clock Sync Generator SDA 9257 Preliminary Data MOS 1C Features • All settings made by I2C Bus • PLL lock-in behavior can be set to TV- or VCR mode • Automatic clamping of CVBS input • Provides all horizontal and vertical sync signals and clocks tor operating PAMUX, analog color decoders,	OCR Scan	P-DIP-28-1 24-MHz 27-MHz 50/60-Hz UES02217 TDA 1432 tda 2050 equivalent siemens sda 9257 h20f4 INC01 TDA 2050 Circuit KSS 27Mhz crystal oscillator H10N4 H20F1	PDF
PA7140J-20 Abstract: No abstract text available Text: PA7140 INC. PA7140 PEEL Array Programmable Electrically Erasable Logic Array Features • Versatile Logic Array Architecture ■ - 2 4 l/O s, 1 4 inputs, 6 0 registers/latches CMOS Electrically Erasable Technology - R ep ro g ram m ab le in 40-p in DIP,	OCR Scan	PA7140 PA7140 04-02-019F PA7140P-20 PA7140F-20 13/20ns PA7140J-20 PA7140JN-20 PA7140P-25	PDF
Untitled Abstract: No abstract text available Text: PA7024 INC. PA7024 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology High-Speed Commercial and Industrial Versions - As fast as 10ns/15ns tpdi/tpdx , 7 1 ,4M Hz (fMAX) - Industrial grade available for 4.5 to 5.5V Vcc	OCR Scan	PA7024 PA7024 10ns/15ns 24-pin 28-pin 22V10 idPA7024JN-15 PA7024S-15 PA7024P-20	PDF
Untitled Abstract: No abstract text available Text: Commercial/ Industrial INC. TM PA7128 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC, and PLCC packages I Versatile Logic Array Architecture - 12 l/Os, 14 inputs, 36 registers/latches	OCR Scan	PA7128 28-pin 9ns/19. 25MHz, 9/15ns 12/20ns	PDF

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Omega Engineering INC-14-48OPEN

Omega Engineering INC-14-6CLOSED

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INC14 Datasheets Context Search

Untitled

Untitled

THX 201

MAX4380

"Programmable Electrically Erasable Logic Array"

ICT Peel

PA7140J-20

THX 201

TLO 81

MAX4380

Untitled

THX 201

AD6654

ICT Peel

isl 6251 schematic

tda 2572

AL6002

Untitled

22CV10AP

Untitled

TDA 1432

PA7140J-20

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Untitled