Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    IN74HC10 Search Results

    IN74HC10 Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Type PDF
    IN74HC109D Integral Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS Original PDF
    IN74HC109N Integral Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS Original PDF
    IN74HC10AD IK Semicon Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS Original PDF
    IN74HC10AN IK Semicon Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS Original PDF
    IN74HC10D Integral Triple 3-input NAND gate, high-performance silicon-gate CMOS Original PDF
    IN74HC10N Integral Triple 3-input NAND gate, high-performance silicon-gate CMOS Original PDF

    IN74HC10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    IN74HC109AD

    Abstract: No abstract text available
    Text: TECHNICAL DATA IN74HC109A Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC109A is identical in pinout to the LS/ALS109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALSTTL outputs.


    Original     		PDF IN74HC109A IN74HC109A LS/ALS109. IN74s 012AC) IN74HC109AD

    IN74HC109D

    Abstract: IN74HC109N
    Text: TECHNICAL DATA IN74HC109 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC109 is identical in pinout to the LS/ALS109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALSTTL outputs.


    Original     		PDF IN74HC109 IN74HC109 LS/ALS109. IN74HCure IN74HC109D IN74HC109N

    IN74HC10D

    Abstract: IN74HC10N
    Text: TECHNICAL DATA IN74HC10 Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10 is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.


    Original     		PDF IN74HC10 IN74HC10 LS/ALS10. IN74HC10N IN74HC10D

    IN74HC10D

    Abstract: IN74HC10N
    Text: IN74HC10 TRIPLE 3-INPUT NAND GATE High-Performance Silicon-Gate CMOS • • • • The IN74HC10 is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.


    Original     		PDF IN74HC10 IN74HC10 LS/ALS10. IN74HC10N IN74HC10D

    IN74HC10AD

    Abstract: IN74HC10AN
    Text: TECHNICAL DATA IN74HC10A Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10A is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.


    Original     		PDF IN74HC10A IN74HC10A LS/ALS10. IN74HC10AN IN74HC10AD 012AB)

    IN74HC109D

    Abstract: IN74HC109N
    Text: TECHNICAL DATA IN74HC109 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC109 is identical in pinout to the LS/ALS109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALSTTL outputs.


    Original     		PDF IN74HC109 IN74HC109 LS/ALS109. IN74HC1 IN74HC109D IN74HC109N

    IN74HC10D

    Abstract: IN74HC10N
    Text: TECHNICAL DATA IN74HC10 Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10 is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.


    Original     		PDF IN74HC10 IN74HC10 LS/ALS10. IN74HC10N IN74HC10D

    IL311ANM

    Abstract: tda8362b ILa1519B1Q iff4n60 IN1307N tda8890 IL311AN IL91214AN MC74HC123AN IL258D
    Text: SEMICONDUCTOR PRODUCTS SHORT FORM CATALOG INTEGRAL 2010-2011 INTEGRAL JSC reserves the right to make changes in device design, specifications and other information identified in this publication without notice and assumes no responsibility for the use of any device described herein.


    Original     		PDF