Untitled
Abstract: No abstract text available
Text: 1 128K x 8 SRAM WITH LATCHED/ BUFFERED ADDRESS LINES AND LATCHED/BUFFERED DATA LINES IDT7M820 Integrated Device Technology Inc D A T A in Is c o n tro lle d b y its o w n ena b le, LEDIN. W ith th is line in th e h ig h state, th e latch is in th e tra n sp are n t o r buffe r m ode. All
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IDT7M820
-200mV
IDT7M820
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Untitled
Abstract: No abstract text available
Text: INTEGRATE» DEVICE T7 dËJ 4ÖSS771 DDD a7û 5 1 |~~ 97D 027 85 482577 1 INTEGRATED DEVICE D T -4 6 -2 3 -1 4 128K x 8 SRAM WITH LATCHED/ BUFFERED ADDRESS LINES AND LATCHED/BUFFERED DATA LINES IDT7M820 Integrated Devicelechnotogy. Inc DATAin Is controlled by Its own enable, LEDIN. With this line In
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SS771
IDT7M820
20MHz
IDT7M820
-200mV
E5771
T-46-23-14
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Untitled
Abstract: No abstract text available
Text: 1 MEGABIT 128K x 8 REGISTERED/BUFFERED/ LATCHED CMOS STATIC RAM SUBSYSTEMS IDT7M824 FAMILY FEATURES: DESCRIPTION: • High-density 1024K-bit (128K x 8-bit) CMOS static RAM modules with registered/buffered/latched addresses and l/Os The IDT7M824 fam ily is a set of 1024K-bit (128K x 8-bit) high
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1024K-bit
-15mA
64-pin,
IDT49C802
IDT49C802
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IDT7M824
Abstract: No abstract text available
Text: INT EGR AT E» DEVICE T7 4 8 25 77 1 I N T E G R A T E D DEVI CE " Î ËJ 4055771 Q0027Ö1 4 J “ 97D 0 2 7 8 Ï 1 M EGABIT 128K x 8) R EG ISTE R ED /B U FFER ED / LATCHED C M O S STATIC RAM SUB SYSTEM S D/ T-46-23-14 IDT7M824 FAMILY FEATURES: DESCRIPTION:
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Q0027
T-46-23-14
1024K-blt
64-pfn,
IDT49C802
IDT7M824
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