LVC162501A
Abstract: SO56-2
Text: IDT74LVC162501A 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER W/ 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: IDT74LVC162501A ADVANCE INFORMATION DESCRIPTION:
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IDT74LVC162501A
18-BIT
18-BIT
250ps
MIL-STD-883,
200pF,
635mm
SO56-1)
SO56-2)
LVC162501A
SO56-2
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O D E S C R IP TIO N : FEATURES: - Typical - ESD > 2000V per MIL-STD-883, Method 3015; tsK o (Output Skew) < 250ps > 200V using machine model (C = 200pF, R = 0) - IDT74LVC162501A
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PDF
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18-BIT
IDT74LVC162501A
62501A
48-Pin
56-Pin
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - power 18-bit registered bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is
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OCR Scan
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PDF
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18-BIT
250ps
MIL-STD-883,
200pF,
635mm
IDT74LVC162501A
LVC162501
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 5 VOLT TOLERANT I/O IDT74LVCH16501A IDT74LVCH162501A IDT74LVC16501A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: These 18-bit registered transceivers are built using ad vanced dual metal CMOS technology. These high-speed, low
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18-BIT
IDT74LVCH16501A
IDT74LVCH162501A
IDT74LVC16501A
18-bit
atVCH16501
IDT74LVCH162501
IDT74LVC162501A
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - power 18-bit registered bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is
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OCR Scan
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PDF
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18-BIT
250ps
MIL-STD-883,
200pF,
635mm
IDT74LVC162501A
LVC162501
48-Pin
56-Pin
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