idt p28-2
Abstract: IDT71B74 P28-2
Text: PowerPC Secondary Burst Cache Design using IDT71B74 Cache-Tag SRAMs and IDT71419 CacheRAMs Application Brief AB-02 Integrated Device Technology, Inc. INTRODUCTION The objective of this application brief is to highlight the IDT71B74 8K x 8 Cache-Tag SRAM as the Cache-Tag SRAM in
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IDT71B74
IDT71419
AB-02
IDT71B74
256Kbyte
IDT71419
idt p28-2
P28-2
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Untitled
Abstract: No abstract text available
Text: Integrated Device Technology, Inc. 32K x 18 CacheRAM BURST COUNTER & SELF-TIMED WRITE — FOR THE PowerPC™ PROCESSOR PRELIMINARY IDT71419 FEATURES: DESCRIPTION: • • • • • • • • • The IDT71419 is a very high-speed 32K x 18-bit static RAM
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IDT71419
52-pin
IDT71419
18-bit
52-pin
J52-1)
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Untitled
Abstract: No abstract text available
Text: Integrated Device Technology, Inc. 32K x 18 CacheRAM BURST COUNTER & SELF-TIMED WRITE — FOR THE PowerPC™ PROCESSOR PRELIMINARY IDT71419 DESCRIPTION: FEATURES: T h e ID T 7 1 4 1 9 is a v ery h ig h -s p e e d 3 2 K x 1 8 -b it static R A M • 3 2 K x 1 8 architectu re
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OCR Scan
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PDF
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IDT71419
52-pin
J52-1)
4A25771
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