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    IC ACT10 Search Results

    IC ACT10 Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    TB67H451AFNG Toshiba Electronic Devices & Storage Corporation Brushed Motor Driver/1ch/Vout(V)=50/Iout(A)=3.5 Visit Toshiba Electronic Devices & Storage Corporation

    IC ACT10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    GR-1244-CORE

    Abstract: 5MHz OCXO Stratum 3 Synchronizer SDH 209 12.800MHZ IC1 723 N13T1 T4 560 B 5 to 32 decoder using 4 t0 16 decoders CHIP DIODE m7
    Text: DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 DS3100 GR1244, GR-253, GR-1244-CORE 5MHz OCXO Stratum 3 Synchronizer SDH 209 12.800MHZ IC1 723 N13T1 T4 560 B 5 to 32 decoder using 4 t0 16 decoders CHIP DIODE m7

    Untitled

    Abstract: No abstract text available
    Text: DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 DS3100 GR1244, GR-253,

    IC 7106

    Abstract: No abstract text available
    Text: DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 GR1244, GR-253, freq64) IC 7106

    IC 7108

    Abstract: IC 7106 TCXO 24.576 0.1uF, 63V 2-pin ir receiver 5MHz OCXO GR-1244-CORE Datasheet, Circuit Cross Refer ACS8520 ACS8530 DS3100
    Text: DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com FEATURES GENERAL DESCRIPTION When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 DS3100 GR1244, GR-253, var224 IC 7108 IC 7106 TCXO 24.576 0.1uF, 63V 2-pin ir receiver 5MHz OCXO GR-1244-CORE Datasheet, Circuit Cross Refer ACS8520 ACS8530

    IC 7106

    Abstract: IC 714 ssmf ACS8520 ACS8530 DS3100 DS3100GN GR-1244 GR-253 18Hz
    Text: DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 DS3100 GR1244, GR-253, IC 7106 IC 714 ssmf ACS8520 ACS8530 DS3100GN GR-1244 GR-253 18Hz

    ACS8520

    Abstract: ACS8530 DS3100 DS3101 DS3101GN GR-1244 GR-253 ocxo 25MHz GR378
    Text: DS3101 Stratum 3/3E Timing Card IC www.maxim-ic.com FEATURES GENERAL DESCRIPTION When paired with an external TCXO or OCXO, the DS3101 is a highly integrated central timing and synchronization solution for SONET/SDH network elements. With 14 input clocks, the device directly


    Original     		PDF DS3101 DS3101 GR-1244, GR-253, ACS8520 ACS8530 DS3100 DS3101GN GR-1244 GR-253 ocxo 25MHz GR378

    ic1232

    Abstract: No abstract text available
    Text: PRELIMINARY DATASHEET + DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multi-protocol BITS/SSU


    Original     		PDF DS3100 DS3100 GR1244, GR-253, ic1232

    SA8F

    Abstract: No abstract text available
    Text: Data Sheet April 2012 DS3100 Stratum 2/3E/3 Timing Card IC General Description When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 GR1244, GR-253, SA8F

    DS3101GN

    Abstract: ACS8520 ACS8530 DS3100 DS3101 GR-1244 GR-253 OCXO D14 TCXO 24.576MHz GR378
    Text: 19-4596; Rev 4; 5/09 DEMO KIT AVAILABLE DS3101 Stratum 2/3E/3 Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3101 is a highly integrated central timing and synchronization solution for SONET/SDH network


    Original     		PDF DS3101 DS3101 GR-1244, GR-253, 166ns DS3101GN ACS8520 ACS8530 DS3100 GR-1244 GR-253 OCXO D14 TCXO 24.576MHz GR378

    amp 4546

    Abstract: ssmf 34.368Mhz e2 e3 8448 RESREF amp 4546 jc ACS8520 ACS8530 DS3100 DS3100GN GR-1244
    Text: 19-4546; Rev 9; 5/09 DEMO KIT AVAILABLE DS3100 Stratum 2/3E/3 Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network


    Original     		PDF DS3100 DS3100 GR1244, GR-253, 166ns amp 4546 ssmf 34.368Mhz e2 e3 8448 RESREF amp 4546 jc ACS8520 ACS8530 DS3100GN GR-1244

    IC 7106

    Abstract: IC1 723 N13T1 I431 telcordia
    Text: DEMO KIT AVAILABLE DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 GR1244, GR-253, IC 7106 IC1 723 N13T1 I431 telcordia

    Untitled

    Abstract: No abstract text available
    Text: DEMO KIT AVAILABLE DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers


    Original     		PDF DS3100 DS3100 GR1244, GR-253,

    Untitled

    Abstract: No abstract text available
    Text: DEMO KIT AVAILABLE DS3101 Stratum 3/3E Timing Card IC www.maxim-ic.com FEATURES GENERAL DESCRIPTION When paired with an external TCXO or OCXO, the DS3101 is a highly integrated central timing and synchronization solution for SONET/SDH network elements. With 14 input clocks, the device directly


    Original     		PDF DS3101 DS3101 GR-1244, GR-253,

    ULC EPM5128

    Abstract: 85C090 EP1200 epm5130 XC3020 PAL18P8 PLS163 XC2018 PLHS153 PLS100
    Text: Tem ic S e m i c o n d u c t o r s Universal Logic Circuits * Technology TEM IC Field Programmable Devices Supported Semiconductors uses advanced sub- (*) micron CM OS technology in its ULC devices. The n-transistor channel lengths are sized at 0.8 microns


    OCR Scan     		PDF GAL16V8 PAL16P8 PAL18P8 PAAAL16L8 PAL10L8 PAL14L4 PAL16L2 PAL16RP8 PAL16RP4 PAL16R8 ULC EPM5128 85C090 EP1200 epm5130 XC3020 PLS163 XC2018 PLHS153 PLS100

    Untitled

    Abstract: No abstract text available
    Text: s e m ic o n d u c t o r Revised November 1999 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT109 consists of two_ high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock


    OCR Scan     		PDF 74AC109 74ACT109 AC/ACT109 AC/ACT74 ACT109

    rca 1967

    Abstract: 74AC112
    Text: Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 v Texas In s t r u m e n t s D ata sheet acquired from Harris Sem iconductor SC H S282 u- Dual “J-K” Flip-Flop with Set and Reset F /F 1 IC P - 2S — 3C P 13 ia CD54/74AC/ACT109 - Positive-Edge-Triggered J, K


    OCR Scan     		PDF CD54/74AC109, CD54/74AC1à CD54/74ACT109, CD54/74ACT112 SCHS282 92cs-3sà CD54/74AC/ACT109 CD54/74AC/ACT112 CD54/74AC109 rca 1967 74AC112

    Untitled

    Abstract: No abstract text available
    Text: Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Tf x a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SC H S282 IS- » 2 1JÎK IC f*ÎR • 3 4 1 1 • IO Dual “J-K” Flip-Flop with Set and Reset F /F 1 CD54/74AC/ACT109 - Positive-Edge-Triggered J, K


    OCR Scan     		PDF CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 CD54/74AC/ACT109 CD54/74AC/ACT112 CS-36532 CD54/74AC109

    JRC 45600

    Abstract: YD 803 SGS 45600 JRC TDA 7277 TDA 5072 krp power source sps 6360 2904 JRC Sony SHA T90 SA philips HFE 4541
    Text: I SEMICON INDEXES Contents and Introduction Manufacturers' Information V O LU M E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 15th EDITION 1997 Numerical Listing of Integrated Circuits Substitution Guide U D C 621.382.3 Diagram s THE S E M IC O N INTERNATIONAL INDEXES


    OCR Scan     		PDF ZOP033 ZOP035 ZOP036 ZOP037 ZOP038 ZOP039 ZOP045 ZOP042 ZOP041 ZOP043 JRC 45600 YD 803 SGS 45600 JRC TDA 7277 TDA 5072 krp power source sps 6360 2904 JRC Sony SHA T90 SA philips HFE 4541

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE M IC R O N MT41 LC256K32D4 S 256K x 32 SGRAM 1 SYNCHRONOUS GRAPHICS RAM 256K x 32 SGRAM PULSED RAS, DUAL BANK, PIPELINED, 3.3V OPERATION FEATURES • Fully synchronous; all signals registered on positive edge of system dock • Internal pipelined operation; column address can be


    OCR Scan     		PDF LC256K32D4 024-cyde

    Untitled

    Abstract: No abstract text available
    Text: i t ic i i c u n o .i v i u i i u a y , r v u ^ u o i i v , 1 9 0 c Revision: Monday, December 14,1992 m< PRELIMINARY WJs CYPRESS SEMICONDUCTOR • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies


    OCR Scan     		PDF 84-pin 16-bit

    CD54AC109

    Abstract: CD54AC112 CD54ACT109 CD54ACT112
    Text: Hlgh-Rellablllly Advanced CMOS Logic IC s - E Z 5 - ^ _1 4 3 0 5 5 7 1 Recent Additions CD54AC109/3A CD54ACT109/3A QQgblbq T HHAS HARRIS SEI1IC0NI SECT0R —i— ' ¿ i t c f i " P ^ -0 -7 -0 7 Dual “J-K” Flip-Flop with Set and Reset Positive-Edge-Triggered J, K)


    OCR Scan     		PDF CD54AC109/3A CD54ACT109/3A CD54AC109 CD54ACT109 CD54AC/ACT109 16-lead CD54AC112/3A CD54ACT112/3 CD54AC112 CD54ACT112

    Untitled

    Abstract: No abstract text available
    Text: 17E High-Reliability Advanced CMOS Logic IC s_ Recent Additions CD54AC109/3A CD54ACT109/3A D • 3075001 0024=177 0 G E S0LI1 STATE —i— i n 1 T 4b-ö7 •O / Dual “J-K” Flip-Flop with Set and Reset Positlve-Edge-Triggered J, K) The RCA CD54AC109 and CD54ACT109 are dual “J-K” flipflops with set and reset that utilize the new RCA ADVANCED


    OCR Scan     		PDF CD54AC109/3A CD54ACT109/3A CD54AC109 CD54ACT109 CD54AC/ACT109 16-lead

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA M C 74A C 10 M C 74A C T 10 T rip le 3 -In p u t N A N D G ate TRIPLE 3 -IN P U T N A N D G ATE • Outputs Source/Sink 24 mA • 'ACT10 Has TTL Compatible Inputs N SUFFIX CASE 646-06 PLASTIC 1 D SUFFIX CASE 751A-02 PLASTIC M A X IM U M R A T IN G S *


    OCR Scan     		PDF ACT10 51A-02 MC74AC10 MC74ACT10 74ACT