LSM330DLC application note
Abstract: LSM303
Text: iCE40 Low Power Sensor Hub Solution for Mobile Devices June 2014 Reference Design RD1189 General Description The iCE40 Sensor Hub Solution is a low power sensor hub solution for mobile devices using iCE40LM and iCE40 Ultra FPGAs. It is designed to monitor sensors and periodically send the sensor data to the application processor. The Sensor Hub reference design acts as a buffer between the sensors and the application processor. When
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iCE40
RD1189
iCE40LM
iCE40
BMP085
LSM303DLHC
LSM330DLC
LSM330DLC application note
LSM303
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pw164
Abstract: No abstract text available
Text: SSM1105V Scaler System Memory SSM for Image Processor ICs PRELIMINARY DATA FEATURES SUMMARY • System solution for use with image processing scaler ICs decoders, chip-selects, inverters; and to prioritize interrupts from DDC, I2C, PWM – For LCD monitors, projectors, and TVs
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SSM1105V
PW11x/PWx64
TQFP100
pw164
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marvel phy 88e1111 reference design
Abstract: 88E6182 RGMII switch Marvell PHY 88E1111 alaska register map 88E1111 PHY registers map 88E1111 register map MSC8156ADS 88E1111 PHY registers map Triple-Speed Ethernet M 88E1111 RGMII 88E1111 config
Text: MSC8156ADS Reference Manual MSC8156 Application Development System Supports MSC8156 DSP Family and MSC8256 DSP Family rev Pilot MSC8156ADSRM Rev 2.1, April 2010 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed:
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MSC8156ADS
MSC8156
MSC8256
MSC8156ADSRM
EL516
marvel phy 88e1111 reference design
88E6182
RGMII switch
Marvell PHY 88E1111 alaska register map
88E1111 PHY registers map
88E1111 register map
88E1111 PHY registers map Triple-Speed Ethernet M
88E1111 RGMII
88E1111 config
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TSMC 0.18Um
Abstract: TSMC 0.13um process specification 80C552 TSMC 90nm
Text: Uses two wires to transfer information between devices o Serial Clock Line SCL SCL I2CS Slave Bus Controller Core The I2CS Bus Controller logic provides a serial interface that meets the Philips I2C bus specification and supports all slave transfer modes to and from the I2C bus. The I2CS
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VHDL code for ADC and DAC SPI with FPGA
Abstract: 12v to 36 v dc dc converter circuit diagram Digital IC CMOS 16x1 mux 1-800-LATTICE adc 0831 interfacing microcontroller LPTM10-12107-3FTG208C Ci 4431 mosfet K1572 E3-1230 240 Ohms Resistors
Text: Platform Manager In-System Programmable Power and Digital Board Management February 2012 Data Sheet DS1036 Features Block Diagram Precision Voltage Monitoring Increases Reliability 12 Analog Voltage Monitor Inputs • 12 independent analog monitor inputs
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DS1036
10-bit
TN1223,
1-800-LATTICE
VHDL code for ADC and DAC SPI with FPGA
12v to 36 v dc dc converter circuit diagram
Digital IC CMOS 16x1 mux
1-800-LATTICE
adc 0831 interfacing microcontroller
LPTM10-12107-3FTG208C
Ci 4431 mosfet
K1572
E3-1230
240 Ohms Resistors
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Verilog code for ADC and DAC SPI with FPGA
Abstract: Ci 4431 mosfet 8 bit carry select adder verilog codes LPTM10-12107-3FTG208C E3-1230
Text: Platform Manager In-System Programmable Power and Digital Board Management December 2010 Data Sheet DS1036 Features Block Diagram Precision Voltage Monitoring Increases Reliability 12 Analog Voltage Monitor Inputs • 12 independent analog monitor inputs
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DS1036
10-bit
TN1090,
TN1091,
TN1223,
1-800-LATTICE
Verilog code for ADC and DAC SPI with FPGA
Ci 4431 mosfet
8 bit carry select adder verilog codes
LPTM10-12107-3FTG208C
E3-1230
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LCMXO2280
Abstract: VHDL code for ADC and DAC SPI with FPGA LPTM10-12107-3FTG208C E3-1230
Text: Platform Manager In-System Programmable Power and Digital Board Management October 2010 Preliminary Data Sheet DS1036 Features Block Diagram Precision Voltage Monitoring Increases Reliability 12 Analog Voltage Monitor Inputs • 12 independent analog monitor inputs
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DS1036
10-bit
TN1086,
TN1090,
TN1091,
1-800-LATTICE
LCMXO2280
VHDL code for ADC and DAC SPI with FPGA
LPTM10-12107-3FTG208C
E3-1230
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vhdl source code for i2c memory read and write
Abstract: VHDL code of lcd display I2C CODE OF READ IN VHDL vhdl code for lcd display verilog code for shift register verilog code for i2c communication fpga DI2CM vhdl code for i2c Slave verilog code lcd verilog code for i2c
Text: DI2CSB I2C Bus Interface Slave - Base version ver 1.15 OVERVIEW I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data transmission over a short distance between many devices. The DI2CSB provides an interface between a passive target device
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ISO3309 hdlc
Abstract: MV6001
Text: MV6001 ADVANCE INFORMATION DS3138-2.1 MV6001 HDLC/DMA CONTROLLER The MV6001 is a combined HDLC transceiver and DMA controller capable of providing serial communications at rates up to 128K bits/second, and handling direct memory access clock rates up to 8MHz.
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MV6001
DS3138-2
MV6001
ECMA40
ISO3309,
FIPS71de
ISO3309 hdlc
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ISO3309
Abstract: MV6001
Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV6001 ADVANCE INFORMATION DS3138-2.1 MV6001 HDLC/DMA CONTROLLER The MV6001 is a combined HDLC transceiver and DMA controller capable of providing serial communications at rates
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MV6001
DS3138-2
MV6001
ISO3309
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8 way dip switch
Abstract: AN-489 verilog code for i2c VHDL code for lcd interfacing to cpld 8-Way DIP Switch vhdl source code for i2c memory read and write vhdl code for i2c vhdl code for i2c Slave verilog code for parallel flash memory I2C CODE OF READ IN VHDL
Text: Using the UFM in MAX II Devices Application Note 489 December 2007, version 1.0 Introduction This application note discusses storing non-volatile information. Most CPLDs use serial EEPROMs to achieve non-volatile information storage, but MAX II CPLDs are the only CPLDs that offer User Flash Memory
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Untitled
Abstract: No abstract text available
Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV6001 ADVANCE INFORMATION DS3138-2.1 MV6001 HDLC/DMA CONTROLLER The MV6001 is a combined HDLC transceiver and DMA controller capable of providing serial communications at rates
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MV6001
DS3138-2
MV6001
A10/D2
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vhdl source code for i2c memory (read and write)
Abstract: vhdl code for i2c Slave VHDL code of lcd display verilog code for transmission line vhdl code for lcd display vhdl code for i2c verilog code lcd digital radio verilog code I2C CODE OF READ IN VHDL vhdl source code for i2c memory read and write
Text: I2C Bus Interface Slave - Base version ver 1.12 OVERVIEW I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data transmission over a short distance between many devices. The DI2CSB provides an interface between a passive target device
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Untitled
Abstract: No abstract text available
Text: MCP19111 Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver Synchronous Buck Features: Microcontroller Features: • • • • • • Precision 8 MHz Internal Oscillator Block: - Factory Calibrated • Interrupt Capable - Firmware
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MCP19111
DS22331A-page
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Untitled
Abstract: No abstract text available
Text: MCP19110/11 Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver Synchronous Buck Features: Microcontroller Features: • Input Voltage: 4.5V to 32V • Output Voltage: 0.5V to 3.6V - Greater than 3.6V requires external divider • Switching Frequency: 100 kHz to 1.6 MHz
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MCP19110/11
DS20002331B-page
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80C552
Abstract: No abstract text available
Text: Uses two wires to transfer information between devices o Serial Clock Line SCL SCL I2CS Slave Bus Controller Megafunction The I2CS Bus Controller logic provides a serial interface that meets the Philips I2C bus specification and supports all slave transfer modes to and from the I2C bus. The I2CS
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EP1S10-5
80C552
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INTEL FLASH MEMORY parallel
Abstract: EPM2210F256C3 I2C CODE OF READ IN VHDL vhdl source code for i2c memory (read and write) 68HC11 EPM1270 EPM2210 EPM240 EPM570 circuit diagram of Key finder
Text: altufm Megafunction 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com Quartus II Software Version: 6.0 Document Version: 2.0 Document Date: August 2006 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
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ispPAC
Abstract: EFB 45
Text: LatticeMico EFB The LatticeMico EFB is a hard architectural block that is known as the Embedded Function Block EFB . The EFB includes a Serial Peripheral Interface (SPI), two I2Cs, and a timer/counter peripheral. All of these hard IP peripherals are contained in the EFB block, will connect to the WISHBONE
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Untitled
Abstract: No abstract text available
Text: LatticeMico EFB for MachXO2 The LatticeMico EFB for MachXO2 is a hard architectural block that is known as the Embedded Function Block EFB . The EFB includes a Serial Peripheral Interface (SPI), two I2Cs, and a timer/counter peripheral. All of these hard IP
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121230-3
Abstract: realtek 8139 121230 gt64260 REALTEK 8129 AN2236 galileo GT64260 16 Pin Mini-VGA pc87308 via apollo
Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. DINK_UM/D 4/2003 Rev.13.1 DINK32 PowerPC Debugger User’s Manual For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED:
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DINK32
DINK32
121230-3
realtek 8139
121230
gt64260
REALTEK 8129
AN2236
galileo GT64260
16 Pin Mini-VGA
pc87308
via apollo
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88E6152
Abstract: cooper ck1 88E1145 marvell 88e1145 marvell 88E6152 TMS 8560 pc28f128p30b85 ALTERA EPM1270F256 DS26251 MCS8144
Text: MSC8144ADS Processor Board Reference Manual MSC8144ADSRM Rev 0, February 2007 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516
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MSC8144ADS
MSC8144ADSRM
EL516
MSC8144
88E6152
cooper ck1
88E1145
marvell 88e1145
marvell 88E6152
TMS 8560
pc28f128p30b85
ALTERA EPM1270F256
DS26251
MCS8144
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MAX9611PMB1
Abstract: No abstract text available
Text: 19-6328; Rev 0; 5/12 MAX9611PMB1 Peripheral Module General Description The MAX9611PMB1 peripheral module provides the necessary hardware to interface the MAX9611 currentsense amplifier with 12-bit ADC and op amp, along with the MAX5380 8-bit DAC, to any system that utilizes
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MAX9611PMB1
MAX9611
12-bit
MAX5380
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HPsLED
Abstract: No abstract text available
Text: DE1-SoC User Manual 1 www.terasic.com March 14, 2014 CONTENTS Chapter 1 DE1-SoC Development Kit . 4 1.1 Package Contents. 4
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Untitled
Abstract: No abstract text available
Text: MachXO2 Family Handbook HB1010 Version 03.8, May 2013 MachXO2 Family Handbook Table of Contents May 2013 Section I. MachXO2 Family Data Sheet Introduction Features . 1-1
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HB1010
TN1204
TN1208
TN1205
TN1246
TN1198
TN1206
TN1202
TN1203
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