Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    HDB3 CAN USE WHERE Search Results

    HDB3 CAN USE WHERE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DG181BA Rochester Electronics LLC SPST, 2 Func, 1 Channel, MBCY10, METAL CAN-10 Visit Rochester Electronics LLC Buy
    LM310H Rochester Electronics LLC Buffer Amplifier, 1 Func, BIPolar, MBCY8, METAL CAN, TO-5, 8 PIN Visit Rochester Electronics LLC Buy
    LM106H Rochester Electronics LLC Comparator, 1 Func, 2000uV Offset-Max, 28ns Response Time, BIPolar, MBCY8, METAL CAN-8 Visit Rochester Electronics LLC Buy
    LM710CH Rochester Electronics LLC Comparator, 1 Func, 5000uV Offset-Max, 40ns Response Time, BIPolar, MBCY8, METAL CAN-8 Visit Rochester Electronics LLC Buy
    LM1578AH/883 Rochester Electronics LLC Switching Regulator, Current-mode, 0.75A, 100kHz Switching Freq-Max, MBCY8, METAL CAN-8 Visit Rochester Electronics LLC Buy

    HDB3 CAN USE WHERE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HDB3 AMI ENCODER DECODER

    Abstract: multiplexing e1 frame to e3 frame Frame structure for Multiplexing of four E2 streams into E3 stream LXT6234QE HDB3 to nrz multiplexer 30 pin circuit diagram of 64-1 multiplexer HDB3 intel 4e2 E1 HDB3
    Text: LXT6234 E-Rate Multiplexer Datasheet The LXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data stream back to four tributary channels. All of the necessary circuitry is integrated into the LXT6234 ERate Multiplexer; there is no need for an external framing device.


    Original     		PDF LXT6234 LXT6234 HDB3 AMI ENCODER DECODER multiplexing e1 frame to e3 frame Frame structure for Multiplexing of four E2 streams into E3 stream LXT6234QE HDB3 to nrz multiplexer 30 pin circuit diagram of 64-1 multiplexer HDB3 intel 4e2 E1 HDB3

    LDB6234

    Abstract: HDB3 multiplexing e1 frame to e3 frame HDB3 decoder E1 HDB3 E2 liu multiplexing e2 frame e3 HDB3 E2 nrz to hdb3 NOTES ON MULTIPLEXER
    Text: LXT6234 E-Rate Multiplexer Application Note January 2001 For 16 E1/E3 Multipexer/Demultiplexer Order Number: 249313-001 As of January 15, 2001, this document replaces the Level One document AN9501. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original     		PDF LXT6234 AN9501. LDB6234 HDB3 multiplexing e1 frame to e3 frame HDB3 decoder E1 HDB3 E2 liu multiplexing e2 frame e3 HDB3 E2 nrz to hdb3 NOTES ON MULTIPLEXER

    circuit diagram of 64-1 multiplexer

    Abstract: E1 AMI HDB3 decoder HDB3 Frame structure for Multiplexing of four E2 streams into E3 stream Frame structure for Multiplexing of four E1 streams into E2 stream 16 line to 4 line coder multiplexer SXT6234 multiplexing demultiplexing e2 E1 HDB3 multiplexer/14052B
    Text: DATA SHEET JUNE 1997 SXT6234 REVISION 1.1 E-Rate Multiplexer General Description The SXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data


    Original     		PDF SXT6234 SXT6234 circuit diagram of 64-1 multiplexer E1 AMI HDB3 decoder HDB3 Frame structure for Multiplexing of four E2 streams into E3 stream Frame structure for Multiplexing of four E1 streams into E2 stream 16 line to 4 line coder multiplexer multiplexing demultiplexing e2 E1 HDB3 multiplexer/14052B

    pin diagram 14 demultiplexer

    Abstract: E1 HDB3 multiplexing e1 frame to e3 frame HDB3 to nrz 16 line to 4 line coder multiplexer HDB3 E2 HDB3 1 into 12 demultiplexer circuit diagram multiplexer 30 pin how to interface microcontroller with encoder
    Text: an9501_8.fm4 Page 61 Thursday, June 13, 1996 6:53 PM APPLICATION NOTE 9501 APRIL, 1996 SXT6234 E-Rate Multiplexer For 16-E1/E3 Multiplexer/Demultiplexer Introduction 1 E1 Standard The SXT6234 E-Rate Multiplexer offers a simple and economic approach to building E1/E2, E2/E3 and E1/E3 multiplexers and demultiplexers. This application note


    Original     		PDF an9501 SXT6234 16-E1/E3 16E1/E3 SDB6234 pin diagram 14 demultiplexer E1 HDB3 multiplexing e1 frame to e3 frame HDB3 to nrz 16 line to 4 line coder multiplexer HDB3 E2 HDB3 1 into 12 demultiplexer circuit diagram multiplexer 30 pin how to interface microcontroller with encoder

    16 line to 4 line coder multiplexer

    Abstract: LEVEL ONE COMMUNICATIONS circuit diagram of 64-1 multiplexer Frame structure for Multiplexing of four E2 streams into E3 stream 500E SXT6234 HDB3 AMI ENCODER DECODER Frame structure for Multiplexing of four E1 streams into E2 stream multiplexing demultiplexing e2 E1 HDB3
    Text: DATA SHEET AUGUST 1998 Revision 1.3 SXT6234 E-Rate Multiplexer General Description Features • Performs four-E1 to one-E2, or four-E2 to one-E3 multiplexing. Five ICs will implement a sixteen-E1 to one-E3 multiplexer. The SXT6234 E-Rate Multiplexer is a single-chip solution


    Original     		PDF SXT6234 SXT6234 16 line to 4 line coder multiplexer LEVEL ONE COMMUNICATIONS circuit diagram of 64-1 multiplexer Frame structure for Multiplexing of four E2 streams into E3 stream 500E HDB3 AMI ENCODER DECODER Frame structure for Multiplexing of four E1 streams into E2 stream multiplexing demultiplexing e2 E1 HDB3

    16 line to 4 line coder multiplexer

    Abstract: Frame structure for Multiplexing of four E1 streams into E2 stream LEVEL ONE COMMUNICATIONS LXT6234QE HDB3 Frame structure for Multiplexing of four E2 streams into E3 stream E2 hdb3 HDB3 DECODER E1 AMI HDB3 decoder mais
    Text: DATA SHEET JULY 1999 Revision 2.0 LXT6234 E-Rate Multiplexer General Description Features The LXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data


    Original     		PDF LXT6234 LXT6234 recommenda-1130 PDS-6234-7/99-2 16 line to 4 line coder multiplexer Frame structure for Multiplexing of four E1 streams into E2 stream LEVEL ONE COMMUNICATIONS LXT6234QE HDB3 Frame structure for Multiplexing of four E2 streams into E3 stream E2 hdb3 HDB3 DECODER E1 AMI HDB3 decoder mais

    multiplexing e1 frame to e3 frame

    Abstract: HDB3 E2 SDB6234 HDB3 to nrz 1 into 12 demultiplexer circuit diagram HDB3 decoder 1 into 16 demultiplexer circuit diagram using 1 i multiplexing e2 frame e3 design 16 bit demultiplexer introduction HDB3 can use where
    Text: APPLICATION NOTE 9501 APRIL 1996 SXT6234 E-Rate Multiplexer For 16-E1/E3 Multiplexer/Demultiplexer Introduction 1 E1 Standard The SXT6234 E-Rate Multiplexer offers a simple and economic approach to building E1/E2, E2/E3 and E1/E3 multiplexers and demultiplexers. This application note


    Original     		PDF SXT6234 16-E1/E3 16E1/E3 SDB6234 multiplexing e1 frame to e3 frame HDB3 E2 HDB3 to nrz 1 into 12 demultiplexer circuit diagram HDB3 decoder 1 into 16 demultiplexer circuit diagram using 1 i multiplexing e2 frame e3 design 16 bit demultiplexer introduction HDB3 can use where

    E1 HDB3

    Abstract: 16 line to 4 line coder multiplexer HDB3 to nrz HDB3 AMI ENCODER DECODER Frame structure for Multiplexing of four E2 streams into E3 stream circuit diagram of 64-1 multiplexer NOTES ON MULTIPLEXER nrz to hdb3 E2 hdb3 HDB3 decoder
    Text: 6234_4.fm4 Page 1 Wednesday, June 12, 1996 4:32 PM DATA SHEET APRIL, 1996 SXT6234 E-Rate Multiplexer 1 General Description Features The SXT6234 E-Rate Multiplexer is a single-chip solution for multi plexi ng four tri butary channels into a single high speed data stream and for demultiplexing a high speed data


    Original     		PDF SXT6234 SXT6234 E1 HDB3 16 line to 4 line coder multiplexer HDB3 to nrz HDB3 AMI ENCODER DECODER Frame structure for Multiplexing of four E2 streams into E3 stream circuit diagram of 64-1 multiplexer NOTES ON MULTIPLEXER nrz to hdb3 E2 hdb3 HDB3 decoder

    RP5A

    Abstract: B412 HDB3 HDB3 coaxial link PE-64937 PE-65415 XR-T7288 XR-T7288IP XR-T7288IW E1 HDB3
    Text: XR-T7288 .the analog plus CEPT1 Line Interface company TM June 1997-3 FEATURES D Fully Integrated 2.048Mbits/s Line Interface D Minimal External Circuitry Required D Intended For Use In Systems That Must Comply With CCITT Specifications G.703, G.823, I.431,


    Original     		PDF XR-T7288 048Mbits/s 100mW 108mW XR-T7288 RP5A B412 HDB3 HDB3 coaxial link PE-64937 PE-65415 XR-T7288IP XR-T7288IW E1 HDB3

    DS3184

    Abstract: No abstract text available
    Text: ERRATA SHEET DS3161/DS3162/DS3163/DS3164 Single/Dual/Triple/Quad ATM/Packet PHYs for DS3/E3/STS-1 www.maxim-ic.com REVISION A1 ERRATA The errata listed below describe situations where DS3161/DS3162/DS3163/DS3164 revision A1 components perform differently than expected or differently than described in the data sheet. Dallas Semiconductor intends to


    Original     		PDF DS3161/DS3162/DS3163/DS3164 DS3161/DS3162/DS3163/DS3164 DS3184 62/52/40MHz 368MHz Clear-Channel-52Mbps/DS3/E3, 62/52/40MHz.

    Untitled

    Abstract: No abstract text available
    Text: XRT7300 E3/DS3/STS-1 Line Interface Unit January 2000 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data


    Original     		PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE

    DS3184

    Abstract: HDB3 AMI ENCODER DECODER HDB3 can use where lm000 6 dual port liu 6 PORT LIU DS3182 DS3183 DS3181
    Text: ERRATA SHEET DS3181/DS3182/DS3183/DS3184 Single/Dual/Triple/Quad ATM/Packet PHYs with LIUs www.maxim-ic.com REVISION A1 ERRATA The errata listed below describe situations where DS3181/DS3182/DS3183/DS3184 revision A1 components perform differently than expected or differently than described in the data sheet. Dallas Semiconductor intends to


    Original     		PDF DS3181/DS3182/DS3183/DS3184 DS3181/DS3182/DS3183/DS3184 DS3181of DS3184 62/52/40MHz 368MHz Clear-Channel-52Mbps/DS3/E3, 62/52/40MHz. HDB3 AMI ENCODER DECODER HDB3 can use where lm000 6 dual port liu 6 PORT LIU DS3182 DS3183 DS3181

    Untitled

    Abstract: No abstract text available
    Text: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data


    Original     		PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE

    Untitled

    Abstract: No abstract text available
    Text: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data


    Original     		PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE

    MV1441

    Abstract: DS3077 HDB3 MV1442 HDB3 to nrz HDB3 AMI ENCODER DECODER
    Text: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MV1442 HDB3 Encoder/Decoder/Clock Regenerator


    Original     		PDF MV1442 DS3077 MV1442, 048Mbit MV1441 DS3077 HDB3 MV1442 HDB3 to nrz HDB3 AMI ENCODER DECODER

    DS3077

    Abstract: MV1441 MV1442 AMI Semiconductor encoder Digital Alarm Clock 40 pin AMI HDB3 APPLICATION
    Text: MV1442 HDB3 Encoder/Decoder/Clock Regenerator DS3077 The MV1442, along with other devices in the Zarlink 2Mbit PCM signalling series comprise a group of circuits which will perform the common channel signalling and error detection functions for a 2.048Mbit PCM transmission link operating in


    Original     		PDF MV1442 DS3077 MV1442, 048Mbit MV1442 DS3077 MV1441 AMI Semiconductor encoder Digital Alarm Clock 40 pin AMI HDB3 APPLICATION

    Untitled

    Abstract: No abstract text available
    Text: MV1442 HDB3 Encoder/Decoder/Clock Regenerator DS3077 The MV1442, along with other devices in the Zarlink 2Mbit PCM signalling series comprise a group of circuits which will perform the common channel signalling and error detection functions for a 2.048Mbit PCM transmission link operating in


    Original     		PDF MV1442 DS3077 MV1442, 048Mbit MV1442

    Untitled

    Abstract: No abstract text available
    Text: MV1442 HDB3 Encoder/Decoder/Clock Regenerator DS3077 The MV1442, along with other devices in the Zarlink 2Mbit PCM signalling series comprise a group of circuits which will perform the common channel signalling and error detection functions for a 2.048Mbit PCM transmission link operating in


    Original     		PDF MV1442 DS3077 MV1442, 048Mbit MV1442

    XRT73L00A

    Abstract: No abstract text available
    Text: XRT73LC00A E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2008 REV. 1.0.1 GENERAL DESCRIPTION FEATURES The XRT73LC00A DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L00A and consists of a line transmitter and receiver integrated on a single chip and is designed for DS3, E3 or


    Original     		PDF XRT73LC00A XRT73LC00A XRT73L00A 15-Nov-2010

    MV1445

    Abstract: G732 DECODER
    Text: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MV1445 PRELIMINARY INFORMATION


    Original     		PDF MV1445 DS3109 MV1445 048Mbit G732 DECODER

    aux-04

    Abstract: No abstract text available
    Text: DATA S H E E T JULY 1999 Revision 2.0 LXT6234 E-Rate Multiplexer General Description Features The LXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data


    OCR Scan     		PDF LXT6234 LXT6234 aux-04

    Untitled

    Abstract: No abstract text available
    Text: IgT Integrated Telecom Technology, Inc. E3 Framer EAC-030-A User’s Manual Copyright 1994 -1 9 9 7 Integrated Telecom Technology, Inc. All Rights Reserved Integrated Telecom Technology, Inc. 18310 Montgomery Village Avenue, Suite 300 Gaithersburg, MD 20879 USA


    OCR Scan     		PDF EAC-030-A

    PE-65885

    Abstract: EI-28 IC 92112 HDB3 HDB3 coaxial link IC 92112 8 pin XRT7288 PE-65351 PE-65415 XRT7288IP
    Text: XRT7288 CEPT1 Line Interface JE’ E X q R May 1998-2 FEATURES • Fully Integrated 2.048Mbits/s Line Interface • Minimal External Circuitry Required • Intended For Use In Systems That Must Comply W ith CCITT Specifications G.703, G.823, 1.431, G.732, G.735, G.739


    OCR Scan     		PDF XRT7288 048Mbits/s or120Q 10OmW 108mW XRT7288 PE-65885 EI-28 IC 92112 HDB3 HDB3 coaxial link IC 92112 8 pin PE-65351 PE-65415 XRT7288IP

    Untitled

    Abstract: No abstract text available
    Text: P re lim in a ry XRT7300 JP E X 4R DS3/E3/STS-1 Line Interface Unit October 1998-1 FEATURES • Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications Transmit Interface Characteristics


    OCR Scan     		PDF XRT7300 368Mbps) 736Mbps) 84Mbps)