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    HD74LV1GT Datasheets (80)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    HD74LV1GT00A Hitachi Semiconductor 2-input NAND Gate Original PDF
    HD74LV1GT00A Renesas Technology 2-input NAND Gate / CMOS Logic Level Shiftereg Original PDF
    HD74LV1GT00A Renesas Technology 2-input NAND Gate / CMOS Logic Level Shifter Original PDF
    HD74LV1GT00ACME Renesas Technology 2-input NAND Gate / CMOS Logic Level Shiftereg Original PDF
    HD74LV1GT00ACME Renesas Technology 2-input NAND Gate Original PDF
    HD74LV1GT00AVSE Renesas Technology 2-input NAND Gate Original PDF
    HD74LV1GT00AVSE Renesas Technology 2-input NAND Gate / CMOS Logic Level Shiftereg Original PDF
    HD74LV1GT02A Hitachi Semiconductor 2-input NOR Gate Original PDF
    HD74LV1GT02A Renesas Technology 2-input NOR Gate / CMOS Logic Level Shifter Original PDF
    HD74LV1GT02A Renesas Technology 2-input NOR Gate / CMOS Logic Level Shifter Original PDF
    HD74LV1GT02ACME Renesas Technology 2-input NOR Gate Original PDF
    HD74LV1GT02ACME Renesas Technology 2-input NOR Gate / CMOS Logic Level Shifter Original PDF
    HD74LV1GT02AVSE Renesas Technology 2-input NOR Gate Original PDF
    HD74LV1GT02AVSE Renesas Technology 2-input NOR Gate / CMOS Logic Level Shifter Original PDF
    HD74LV1GT04A Hitachi Semiconductor Inverter Original PDF
    HD74LV1GT04A Renesas Technology Inverter / CMOS Logic Level Shifter Original PDF
    HD74LV1GT04A Renesas Technology Inverter / CMOS Logic Level Shifter Original PDF
    HD74LV1GT04ACM Renesas Technology Inverter/Schmitt Trigger, 1-Element, CMOS, 5-SOT-353 Original PDF
    HD74LV1GT04ACME Renesas Technology Inverter Original PDF
    HD74LV1GT04ACME Renesas Technology Inverter/Schmitt Trigger, 1-Element, CMOS, 5-SOT-353 Original PDF

    HD74LV1GT Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT14A
    Text: HD74LV1GT14A Inverter with Schmitt-trigger Input ADE-205-329C Z 4th. Edition April 2001 Description The HD74LV1GT14A is high speed CMOS schmitt-trigger inverter using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS–TTL series. The internal


    Original     		HD74LV1GT14A ADE-205-329C HD74LV1GT14A Hitachi DSA0076 PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT04A
    Text: HD74LV1GT04A Inverter ADE-205-327C Z 4th. Edition August 2000 Description The HD74LV1GT04A has an inverter in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the


    Original     		HD74LV1GT04A ADE-205-327C HD74LV1GT04A v-2100 Hitachi DSA0076 PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT02A
    Text: HD74LV1GT02A 2–input NOR Gate ADE-205-326C Z 4th. Edition April 2000 Description The HD74LV1GT02A is high speed CMOS two input NOR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS–TTL series. The internal circuit of


    Original     		HD74LV1GT02A ADE-205-326C HD74LV1GT02A Hitachi DSA0076 PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT32A
    Text: HD74LV1GT32A 2–input OR Gate ADE-205-330C Z 4th. Edition April 2000 Description The HD74LV1GT32A is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS–TTL series. The internal circuit of


    Original     		HD74LV1GT32A ADE-205-330C HD74LV1GT32A Hitachi DSA0076 PDF

    HD74LV1GT126A

    Abstract: HD74LV1GT126ACME HD74LV1GT126AVSE
    Text: HD74LV1GT126A Bus Buffer Gate with 3–state Output / CMOS Logic Level Shifter REJ03D0124–0800Z Previous ADE-205-333F (Z Rev.8.00 Sep.25.2003 Description The HD74LV1GT126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled


    Original     		HD74LV1GT126A REJ03D0124 0800Z ADE-205-333F HD74LV1GT126A HD74LV1GT126ACME HD74LV1GT126AVSE PDF

    HD74LV1GT14ACME

    Abstract: HD74LV1GT14AVSE HD74LV1GT14A marking up- RENESAS ADE-205-329D
    Text: HD74LV1GT14A Inverter with Schmitt-trigger Input / CMOS Logic Level Shifter REJ03D0119–0600Z Previous ADE-205-329D (Z Rev.6.00 Sep.24.2003 Description The HD74LV1GT14A is high-speed CMOS schmitt-trigger inverter using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal


    Original     		HD74LV1GT14A REJ03D0119 0600Z ADE-205-329D HD74LV1GT14A HD74LV1GT14ACME HD74LV1GT14AVSE marking up- RENESAS ADE-205-329D PDF

    HD74LV1GT66A

    Abstract: HD74LV1GT66ACME HD74LV1GT66AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT66A Analog Switch REJ03D0121-0800 Rev.8.00 Mar 21, 2008 Description The HD74LV1GT66A has an analog switch in a 5 pin package. Switch section has its enable input control C . Highlevel voltage applied to C turns on the switch section. Applications include signal gating, chopping, modulation, or


    Original     		HD74LV1GT66A REJ03D0121-0800 HD74LV1GT66A HD74LV1GT66ACME HD74LV1GT66AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    HD74LV1GT02A

    Abstract: HD74LV1GT02ACME HD74LV1GT02AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT02A 2–input NOR Gate / CMOS Logic Level Shifter REJ03D0116-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT02A is high-speed CMOS two input NOR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction


    Original     		HD74LV1GT02A REJ03D0116-0900 HD74LV1GT02A HD74LV1GT02ACME HD74LV1GT02AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT66A
    Text: HD74LV1GT66A Analog Switch ADE-205-565B Z 3rd. Edition October 2000 Description The HD74LV1GT66A has an analog switch in a 5 pin package. Switch section has its enable input control (C). High level voltage applied to C turns on the switch section. Applications include signal gating,


    Original     		HD74LV1GT66A ADE-205-565B HD74LV1GT66A c2100 Hitachi DSA0076 PDF

    HD74LV1GT08ACME

    Abstract: and gate cmos HD74LV1GT08AVSE HD74LV1GT08A
    Text: HD74LV1GT08A 2–input AND Gate / CMOS Logic Level Shifter REJ03D0118–0800Z Previous ADE-205-328F (Z Rev.8.00 Sep.24.2003 Description The HD74LV1GT08A is high-speed CMOS two input AND gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of


    Original     		HD74LV1GT08A REJ03D0118 0800Z ADE-205-328F HD74LV1GT08A HD74LV1GT08ACME and gate cmos HD74LV1GT08AVSE PDF

    HD74LV1GT00A

    Abstract: HD74LV1GT00ACME HD74LV1GT00AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT00A 2–input NAND Gate / CMOS Logic Level Shifter REJ03D0115-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT00A is high-speed CMOS two input NAND gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction


    Original     		HD74LV1GT00A REJ03D0115-0900 HD74LV1GT00A HD74LV1GT00ACME HD74LV1GT00AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    HD74LV1GT126A

    Abstract: HD74LV1GT126ACME HD74LV1GT126AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT126A Bus Buffer Gate with 3–state Output / CMOS Logic Level Shifter REJ03D0124-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the associated output enable OE input is low. To ensure the high impedance state during power up or power down, OE


    Original     		HD74LV1GT126A REJ03D0124-0900 HD74LV1GT126A HD74LV1GT126ACME HD74LV1GT126AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    HD74LV1GT08A

    Abstract: HD74LV1GT08ACME HD74LV1GT08AVSE PTSP0005ZC-A PUSN0005KA-A RENESAS marking code
    Text: HD74LV1GT08A 2–input AND Gate / CMOS Logic Level Shifter REJ03D0118-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT08A is high-speed CMOS two input AND gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction


    Original     		HD74LV1GT08A REJ03D0118-0900 HD74LV1GT08A HD74LV1GT08ACME HD74LV1GT08AVSE PTSP0005ZC-A PUSN0005KA-A RENESAS marking code PDF

    HD74LV1GT125A

    Abstract: HD74LV1GT125ACME HD74LV1GT125AVSE
    Text: HD74LV1GT125A Bus Buffer Gate with 3–state Output / CMOS Logic Level Shifter REJ03D0123–0800Z Previous ADE-205-332F (Z Rev.8.00 Sep.24.2003 Description The HD74LV1GT125A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled


    Original     		HD74LV1GT125A REJ03D0123 0800Z ADE-205-332F HD74LV1GT125A HD74LV1GT125ACME HD74LV1GT125AVSE PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT08A
    Text: HD74LV1GT08A 2–input AND Gate ADE-205-328C Z 4th. Edition April 2000 Description The HD74LV1GT08A is high speed CMOS two input AND gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS–TTL series. The internal circuit of


    Original     		HD74LV1GT08A ADE-205-328C HD74LV1GT08A Hitachi DSA0076 PDF

    HD74LV1GT04A

    Abstract: HD74LV1GT04ACME HD74LV1GT04AVSE
    Text: HD74LV1GT04A Inverter / CMOS Logic Level Shifter REJ03D0117–0800Z Previous ADE-205-327F (Z Rev.8.00 Sep.24.2003 Description The HD74LV1GT04A has an inverter in a 5 pin package. The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from


    Original     		HD74LV1GT04A REJ03D0117 0800Z ADE-205-327F HD74LV1GT04A HD74LV1GT04ACME HD74LV1GT04AVSE PDF

    HD74LV1GT86A

    Abstract: HD74LV1GT86ACME HD74LV1GT86AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT86A 2–input Exclusive–OR Gate / CMOS Logic Level Shifter REJ03D0122-1000 Rev.10.00 Mar 21, 2008 Description The HD74LV1GT86A performs the Boolean functions Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true / complement element. If one of the inputs is low, the other input will be reproduced in true


    Original     		HD74LV1GT86A REJ03D0122-1000 HD74LV1GT86A HD74LV1GT86ACME HD74LV1GT86AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    HD74LV1GT14A

    Abstract: HD74LV1GT14ACME HD74LV1GT14AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT14A Inverter with Schmitt-trigger Input / CMOS Logic Level Shifter REJ03D0119-0700 Rev.7.00 Mar 21, 2008 Description The HD74LV1GT14A is high-speed CMOS schmitt-trigger inverter using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages


    Original     		HD74LV1GT14A REJ03D0119-0700 HD74LV1GT14A HD74LV1GT14ACME HD74LV1GT14AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    HD74LV1GT32A

    Abstract: HD74LV1GT32ACME HD74LV1GT32AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT32A 2–input OR Gate / CMOS Logic Level Shifter REJ03D0120-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT32A is high-speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction


    Original     		HD74LV1GT32A REJ03D0120-0900 HD74LV1GT32A HD74LV1GT32ACME HD74LV1GT32AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    HD74LV1GT04A

    Abstract: HD74LV1GT04ACME HD74LV1GT04AVSE PTSP0005ZC-A PUSN0005KA-A
    Text: HD74LV1GT04A Inverter / CMOS Logic Level Shifter REJ03D0117-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT04A has an inverter in a 5 pin package. The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0


    Original     		HD74LV1GT04A REJ03D0117-0900 HD74LV1GT04A HD74LV1GT04ACME HD74LV1GT04AVSE PTSP0005ZC-A PUSN0005KA-A PDF

    cmos logic circuit

    Abstract: HD74LV1GT86A HD74LV1GT86ACME HD74LV1GT86AVSE RENESAS MARKING AB
    Text: HD74LV1GT86A 2–input Exclusive–OR Gate / CMOS Logic Level Shifter REJ03D0122–0900Z Previous ADE-205-331G (Z Rev.9.00 Sep.24.2003 Description The HD74LV1GT86A performs the Boolean functions Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true / complement element. If one of the inputs is low, the other input will be


    Original     		HD74LV1GT86A REJ03D0122 0900Z ADE-205-331G HD74LV1GT86A cmos logic circuit HD74LV1GT86ACME HD74LV1GT86AVSE RENESAS MARKING AB PDF

    HD74LV1GT14A

    Abstract: Hitachi DSA0015
    Text: HD74LV1GT14A Inverter with Schmitt-trigger Input ADE-205-329B Z 3rd. Edition April 2000 Description The HD74LV1GT14A is high speed CMOS schmitt-trigger inverter using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS–TTL series. The internal


    Original     		HD74LV1GT14A ADE-205-329B HD74LV1GT14A Hitachi DSA0015 PDF

    Untitled

    Abstract: No abstract text available
    Text: HD74LV1GT66A Analog Switch REJ03D0121–0700Z Previous ADE-205-565E (Z Rev.7.00 Sep.25.2003 Description The HD74LV1GT66A has an analog switch in a 5 pin package. Switch section has its enable input control (C). High-level voltage applied to C turns on the switch section. Applications include signal gating,


    Original     		HD74LV1GT66A REJ03D0121â 0700Z ADE-205-565E HD74LV1GT66A PDF

    Hitachi DSA0076

    Abstract: HD74LV1GT125A
    Text: HD74LV1GT125A Bus Buffer Gate with 3–state Output ADE-205-332B Z 3rd. Edition April 2000 Description The HD74LV1GT125A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up


    Original     		HD74LV1GT125A ADE-205-332B HD74LV1GT125A Hitachi DSA0076 PDF