HD74ALVC1G00
Abstract: DSA003635
Text: HD74ALVC1G00 2–input NAND Gate ADE-205-604C Z Rev.3 Aug. 2001 Description The HD74ALVC1G00 has two–input NAND gate in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
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HD74ALVC1G00
ADE-205-604C
HD74ALVC1G00
DSA003635
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HD74ALVC1G14
Abstract: HD74ALVC1G14VSE
Text: HD74ALVC1G14 Schmitt-trigger Inverter Buffer REJ03D0111–0300Z Previous ADE-205-627B (Z Rev.3.00 Nov.12.2003 Description The HD74ALVC1G14 has an inverter with schmitt-trigger input in a 5 pin package. Low voltage and highspeed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
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HD74ALVC1G14
REJ03D0111
0300Z
ADE-205-627B
HD74ALVC1G14
HD74ALVC1G14VSE
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Hitachi DSA0076
Abstract: HD74ALVC1G00
Text: HD74ALVC1G00 2–input NAND Gate ADE-205-604A Z 2nd. Edition March 2001 Description The HD74ALVC1G00 has two–input NAND gate in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
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HD74ALVC1G00
ADE-205-604A
HD74ALVC1G00
Hitachi DSA0076
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Hitachi DSA0087
Abstract: HD74ALVC1G125
Text: HD74ALVC1G125 Bus Buffer Gate with 3-state Output ADE-205-617A Z Rev. 1 July. 2001 Description The HD74ALVC1G125 has a bus buffer gate with 3-state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up
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HD74ALVC1G125
ADE-205-617A
HD74ALVC1G125
Hitachi DSA0087
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Hitachi DSA0087
Abstract: HD74ALVC1G06
Text: HD74ALVC1G06 Single Inverter Buffer / Driver with Open Drain ADE-205-628 Z Rev.0 June. 2001 Description The HD74ALVC1G06 has an inverter in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the
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HD74ALVC1G06
ADE-205-628
HD74ALVC1G06
Hitachi DSA0087
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Hitachi DSA00279
Abstract: No abstract text available
Text: HD74ALVC1G14 Schmitt-trigger Inverter Buffer ADE-205-627 Z Rev.0 June. 2001 Description The HD74ALVC1G14 has an inverter with schmitt-trigger input in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
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HD74ALVC1G14
ADE-205-627
HD74ALVC1G14
D-85622
Hitachi DSA00279
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Hitachi DSA0087
Abstract: HD74ALVC1G80
Text: HD74ALVC1G80 Single Positive Edge-triggered D-type Flip Flop ADE-205-638 Z Preliminary Rev.0 July 2001 Description The HD74ALVC1G80 has D-type flip flop in a 5 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high speed operation is suitable for the battery
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HD74ALVC1G80
ADE-205-638
HD74ALVC1G80
Hitachi DSA0087
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Untitled
Abstract: No abstract text available
Text: HD74ALVC1G86 2–input Exclusive–OR Gate REJ03D0128–0400Z Previous ADE-205-608C (Z Rev.4.00 Nov.12.2003 Description The HD74ALVC1G86 performs the Boolean functions Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true / complement element. If one of the inputs is low, the other input will be
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HD74ALVC1G86
REJ03D0128
0400Z
ADE-205-608C
HD74ALVC1G86
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Untitled
Abstract: No abstract text available
Text: HD74ALVC1G32 2–input OR Gate REJ03D0112–0500Z Previous ADE-205-607D (Z Rev.5.00 Nov.12.2003 Description The HD74ALVC1G32 has two–input OR gate in a 5 pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
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HD74ALVC1G32
REJ03D0112
0500Z
ADE-205-607D
HD74ALVC1G32
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HD74ALVC1G66
Abstract: No abstract text available
Text: HD74ALVC1G66 Analog Switch ADE-205-625A Z Rev.1 Dec. 2001 Description The HD74ALVC1G66 has an analog switch in a 5 pin package. Switch section has its enable input control (C). High level voltage applied to C turns on the switch section. Applications include signal gating,
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HD74ALVC1G66
ADE-205-625A
HD74ALVC1G66
D-85622
D-85619
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HD74ALVC1G86
Abstract: Hitachi DSA00187
Text: HD74ALVC1G86 2–input Exclusive–OR Gate ADE-205-608 Z Preliminary 1st. Edition February 2001 Description The HD74ALVC1G86 performs the Boolean functions Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true / complement element. If one of the inputs is low, the other input will be
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HD74ALVC1G86
ADE-205-608
HD74ALVC1G86
Hitachi DSA00187
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HD74ALVC1G240
Abstract: Hitachi DSA0047
Text: HD74ALVC1G240 Bus Buffer Inverted with 3-state Output ADE-205-619A Z Rev. 1 July 2001 Description The HD74ALVC1G240 has a bus buffer inverted with 3-state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up
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HD74ALVC1G240
ADE-205-619A
HD74ALVC1G240
D-85622
D-85619
Hitachi DSA0047
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HD74ALVC1G04
Abstract: HD74ALVC1G04VSE
Text: HD74ALVC1G04 Single Inverter Buffer REJ03D0107–0200Z Previous ADE-205-626A (Z Rev.2.00 Oct.06.2003 Description The HD74ALVC1G04 has an inverter in a 5 pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
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HD74ALVC1G04
REJ03D0107
0200Z
ADE-205-626A
HD74ALVC1G04
HD74ALVC1G04VSE
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HD74ALVC1G80
Abstract: HD74ALVC1G80VSE
Text: HD74ALVC1G80 Single Positive Edge-triggered D-type Flip Flop REJ03D0127–0300Z Previous ADE-205-638B (Z Rev.3.00 Nov.12.2003 Description The HD74ALVC1G80 has D-type flip flop in a 5 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high-speed operation is suitable for the battery
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HD74ALVC1G80
REJ03D0127
0300Z
ADE-205-638B
HD74ALVC1G80
HD74ALVC1G80VSE
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HD74ALVC1G04
Abstract: Hitachi DSA0087
Text: HD74ALVC1G04 Single Inverter Buffer ADE-205-626 Z Rev.0 June. 2001 Description The HD74ALVC1G04 has an inverter in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the
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HD74ALVC1G04
ADE-205-626
HD74ALVC1G04
Hitachi DSA0087
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HD74ALVC1G80
Abstract: DSA003635
Text: HD74ALVC1G80 Single Positive Edge-triggered D-type Flip Flop ADE-205-638A Z Rev.1 August 2001 Description The HD74ALVC1G80 has D-type flip flop in a 5 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high speed operation is suitable for the battery
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Original
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HD74ALVC1G80
ADE-205-638A
HD74ALVC1G80
DSA003635
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Hitachi DSA0087
Abstract: HD74ALVC1G66
Text: HD74ALVC1G66 Analog Switch ADE-205-625 Z Rev.0 July. 2001 Description The HD74ALVC1G66 has an analog switch in a 5 pin package. Switch section has its enable input control (C). High level voltage applied to C turns on the switch section. Applications include signal gating,
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HD74ALVC1G66
ADE-205-625
HD74ALVC1G66
Hitachi DSA0087
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Untitled
Abstract: No abstract text available
Text: HD74ALVC1G00 2–input NAND Gate REJ03D0105–0500Z Previous ADE-205-604D (Z Rev.5.00 Oct.06.2003 Description The HD74ALVC1G00 has two–input NAND gate in a 5 pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
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HD74ALVC1G00
REJ03D0105
0500Z
ADE-205-604D
HD74ALVC1G00
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HD74ALVC1G125
Abstract: DSA003635
Text: HD74ALVC1G125 Bus Buffer Gate with 3-state Output ADE-205-617A Z Rev. 1 July 2001 Description The HD74ALVC1G125 has a bus buffer gate with 3-state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up
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PDF
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HD74ALVC1G125
ADE-205-617A
HD74ALVC1G125
D-85622
D-85619
DSA003635
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HD74ALVC1G06
Abstract: HD74ALVC1G06VSE PUSN0005KA-A
Text: HD74ALVC1G06 Single Inverter Buffer / Driver with Open Drain REJ03D0108-0500 Rev.5.00 Sep 08, 2006 Description The HD74ALVC1G06 has an inverter in a 5 pin package. Low voltage and high-speed operation is suitable for the battery powered products e.g., notebook computers , and the low power consumption extends the battery life.
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HD74ALVC1G06
REJ03D0108-0500
HD74ALVC1G06
HD74ALVC1G06VSE
PUSN0005KA-A
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HD74ALVC1G00
Abstract: HD74ALVC1G00VSE PUSN0005KA-A
Text: HD74ALVC1G00 2-input NAND Gate REJ03D0105–0600 Rev.6.00 Jun.20.2005 Description The HD74ALVC1G00 has two–input NAND gate in a 5 pin package. Low voltage and high-speed operation is suitable for the battery powered products e.g., notebook computers , and the low power consumption extends the battery life.
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HD74ALVC1G00
REJ03D0105
HD74ALVC1G00
HD74ALVC1G00VSE
PUSN0005KA-A
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HD74ALVC1G125
Abstract: HD74ALVC1G125VSE
Text: HD74ALVC1G125 Bus Buffer Gate with 3-state Output REJ03D0129–0300Z Previous ADE-205-617B (Z Rev.3.00 Nov.12.2003 Description The HD74ALVC1G125 has a bus buffer gate with 3-state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up
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HD74ALVC1G125
REJ03D0129
0300Z
ADE-205-617B
HD74ALVC1G125
HD74ALVC1G125VSE
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HD74ALVC1G240
Abstract: HD74ALVC1G240VSE
Text: HD74ALVC1G240 Bus Buffer Inverted with 3-state Output REJ03D0131–0300Z Previous ADE-205-619B (Z Rev.3.00 Nov.12.2003 Description The HD74ALVC1G240 has a bus buffer inverted with 3-state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up
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Original
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HD74ALVC1G240
REJ03D0131
0300Z
ADE-205-619B
HD74ALVC1G240
HD74ALVC1G240VSE
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HD74ALVC1G08
Abstract: DSA003635
Text: HD74ALVC1G08 2–input AND Gate ADE-205-606C Z Rev.3 Aug. 2001 Description The HD74ALVC1G08 has two–input AND gate in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
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HD74ALVC1G08
ADE-205-606C
HD74ALVC1G08
DSA003635
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