SN74ABT3612
Abstract: B1494
Text: SN74ABT3612 64 x 36 x 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY S C BS129F - JULY 1992 - R EVISED FEBRUARY 1996 EFB, FFB, AEB, and AFB Flags Synchronized by CLKB Passive Parity Checking on Each Port Parity Generation Can Be Selected for Each Port
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SN74ABT3612
36-bit
0103bSE
B1494
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SN74ALVCH162525
Abstract: No abstract text available
Text: SN74ALVCH162525 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES058- NOVEMBER 1995 • Member of the Texas Instruments Wldebus Family • EPIC™ Enhanced-Performance Implanted CMOS Submicron Process • B-Port Outputs Have Equivalen 26-ft Series
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SN74ALVCH162525
18-BIT
SCES058-
MIL-STD-883C,
JESD-17
300-mil
010E40E
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QCH7727
Abstract: SN54ABT18646 JM9E H TR 1A60
Text: SN54ABT18646 SCAN TEST DEVICE WITH 18-BIT TRANSCEIVERS AND REGISTERS _ S GBS306 - AU G U S T 1992 - REVISED AU G U S T 1994 • Members of the Texas Instruments SCOPE Family of Testability Products S C O P E ™ Instruction Set - IEEE Standard 1149.1-1990 Required
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SN54ABT18646
18-BIT
SGBS306
6S5303
QCH7727
JM9E
H TR 1A60
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SN74LVCH16244A
Abstract: No abstract text available
Text: SN74LVCH16244A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS S C A S 3 1 3 B - NO VEM BER 1993 - REVISED AUG UST 1995 DGG OR DL PACKAGE CTOP VIEW • Member of the Texas Instruments Wldebus Family • EPIC™ Enhanced-Performance Implanted CMOS) Submicron Process
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SN74LVCH16244A
16-BIT
SCAS313B-
MIL-STD-883C,
JESD-17
AThl723
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