R3000A
Abstract: functional diagram of ALU R3010A block alu IDT79R3081 R3081 2873 R3010A Integrated Device Technology CFC-1
Text: R3010A Core RISC FLOATING POINT ACCELERATOR FPA CORE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Hardware support of single- and double-precision operations: — Floating-Point Add — Floating-Point Subtract — Floating-Point Multiply
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R3010A
50MHz
R3000A
64-bit
32-bit
R3010A
functional diagram of ALU
block alu
IDT79R3081
R3081
2873
R3010A Integrated Device Technology
CFC-1
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D-10
Abstract: D-12 D-16 DSP96002 3F800000 DSP96002 APPLICATIONS DSP96002 fft
Text: APPENDIX D D.1 FLOATING-POINT NUMBER STORAGE AND ARITHMETIC D.1.1 General The IEEE standard for binary floating point arithmetic provides for the compatibility of floating-point numbers across all implementations which use the standard by defining bit-level encoding of floating-point numbers.
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32-bit
DSP96002
D-10
D-12
D-16
3F800000
DSP96002 APPLICATIONS
DSP96002 fft
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C-15
Abstract: C-16 DSP96002 DSP96002 fft
Text: APPENDIX C IEEE ARITHMETIC C.1 FLOATING-POINT NUMBER STORAGE AND ARITHMETIC C.1.1 General The IEEE standard for binary floating point arithmetic provides for the compatibility of floating-point numbers across all implementations which use the standard by defining bit-level encoding of floating-point numbers.
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32-bit
DSP96002
C-15
C-16
DSP96002 fft
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DX2-66
Abstract: 80C186 80C188 Intel 486 DX 486 SXSA
Text: DEVELOPMENT SOFTWARE LOG POINT TECHNOLOGIES, INC. SuperSpeed* Floating Point Math Products Log Point SuperSpeed Soft CoProcessors are compact, high performance numerical processors that constitute the first general purpose exponential floating point efp
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80C186,
80C186XL/EA/EB/EC,
80L186EA/EB/EC,
80C188,
80C188XL/EA/EB/EC,
80L188EA/EB/EC,
Intel386TM
Intel486TM
DX2-66
80C186
80C188
Intel 486 DX
486 SXSA
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5962R1023102VXC
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675E – FEBRUARY 2013 – REVISED MAY 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675E
64-Bit
250-MHz
256K-Byte
384K-Byte
5962R1023102VXC
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8086 opcode sheet
Abstract: 8086 opcode sheet free download 8086 mnemonic opcode intel 8086 internal architecture CACHE MEMORY FOR 8086 8086 opcode machine code intel 8086 opcode instruction 8086 mnemonic code 8086 opcode instruction set opcode 8086
Text: W 59 W 59.1 WAIT/FWAIT—Wait Opcode Instruction Description 9B WAIT Check pending unmasked floating-point exceptions. 9B FWAIT Check pending unmasked floating-point exceptions. Description Causes the processor to check for and handle pending, unmasked, floating-point exceptions before
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Virtual-8086
8086 opcode sheet
8086 opcode sheet free download
8086 mnemonic opcode
intel 8086 internal architecture
CACHE MEMORY FOR 8086
8086 opcode machine code
intel 8086 opcode instruction
8086 mnemonic code
8086 opcode
instruction set opcode 8086
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5962R1023102VXC
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675F – FEBRUARY 2013 – REVISED JUNE 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675F
64-Bit
250-MHz
256K-Byte
384K-Byte
5962R1023102VXC
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Untitled
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675F – FEBRUARY 2013 – REVISED JUNE 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675F
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SPRS675G
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675G – FEBRUARY 2013 – REVISED JANUARY 2014 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675G
64-Bit
250-MHz
256K-Byte
384K-Byte
SPRS675G
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Untitled
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675A – FEBRUARY 2013 – REVISED MARCH 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675A
32-Bit-Wide
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SMV320C6727BHFHM
Abstract: SMV320C6727BHFHMPR 5962R1023102VXC SMV320C6727BHFHW 5962R1023101VXC
Text: SMV320C6727B-SP www.ti.com SPRS675F – FEBRUARY 2013 – REVISED JUNE 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675F
SMV320C6727BHFHM
SMV320C6727BHFHMPR
5962R1023102VXC
SMV320C6727BHFHW
5962R1023101VXC
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5962R1023102VXC
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675A – FEBRUARY 2013 – REVISED MARCH 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675A
64-Bit
250-MHz
256K-Byte
384K-Byte
5962R1023102VXC
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Untitled
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675A – FEBRUARY 2013 – REVISED MARCH 2013 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675A
32-Bit-Wide
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SPRS675G
Abstract: No abstract text available
Text: SMV320C6727B-SP www.ti.com SPRS675G – FEBRUARY 2013 – REVISED JANUARY 2014 Floating-Point Digital Signal Processor Check for Samples: SMV320C6727B-SP 1 Floating-Point Digital Signal Processor 1.1 Features 123 • 32- and 64-Bit 250-MHz Floating-Point DSPs
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SMV320C6727B-SP
SPRS675G
64-Bit
250-MHz
256K-Byte
384K-Byte
SPRS675G
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80960SB
Abstract: No abstract text available
Text: Floating-Point Instructions 1Q CHAPTER 10 FLOATING-POINT INSTRUCTIONS This chapter describes the floating-point processing capabilities of the 80960SB processor. The subjects discussed include the real number data types, the execution environment for floating-point operations, the floating-point instructions, and fault and exception handling.
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80960SB
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i960TM
Abstract: 400921FB
Text: Floating-Point Operation 7 CHAPTER 7 FLOATING-POINT OPERATION This chapter describes the floating-point processing capabilities o f the i960 MC processor. The subjects discussed include the real number data types, the execution environment for floating-point operations, the floating-point instructions and fault and exception handling.
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tms390
Abstract: L64811 L64814 TMS390C sun sparc pinout
Text: LSI LOGIC L64814 Floating-Point Unit FPU Preliminary Description The L64814 Floating-Point Unit (FPU) is a highperformance, CMOS implementation of the SPARC (Scalable Processor ARChitecture) FPU. The FPU combines a floating-point controller w ith a high-throughput floating-point processor
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L64814
tms390
L64811
TMS390C
sun sparc pinout
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TMS34082
Abstract: CID20 TMS34082A TMS34082B-40 MSA15-0 TMS34020 emulator
Text: TMS34082A, TMS34082B GRAPHICS FLOATING-POINT PROCESSOR SCGS001A - D315Q, SEPTEMBER 1988 - REVISED SEPTEMBER 1992 • High-Performance Floating-Point RISC Processor Optimized for Graphics • TWo Operating Modes - Floating-Point Coprocessor for TMS34020 Graphics System Processor
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TMS34082A,
TMS34082B
SCGS001A
D315Q,
TMS34020
TMS34082
TMS34082A-40,
TMS34082B-40
CID20
TMS34082A
MSA15-0
TMS34020 emulator
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am29325
Abstract: H-14 AM29325GC WF023740 ScansUX970 TB000640
Text: Am29325 32-Bit Floating-Point Processor • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products, Newton-Raphson division
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Am29325
32-Bit
32-bit,
16-bit
WF023790
WF023800
WF023810
16-Bit,
H-14
AM29325GC
WF023740
ScansUX970
TB000640
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Untitled
Abstract: No abstract text available
Text: NOV 2 i « # 1 Am29C325 CMOS 32-Bit Floating-Point Processor > 3 DISTINCTIVE CHARACTERISTICS Single VLSI device performs high-speed single precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle
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Am29C325
32-Bit
32-bit,
16-bit
Am29325
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Am29325
Abstract: H-14
Text: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle
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Am29C325
32-Bit
32-bit,
16-bit
Am29325
H-14
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PD102
Abstract: ncl 039 Am29C325 Am29325 AM29C33 pin diagram of amd am2 processor th02 H-14 AM27S43 Am29CPL14
Text: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle
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Am29C325
32-Bit
32-bit,
16-bit
Am29325
PD102
ncl 039
AM29C33
pin diagram of amd am2 processor
th02
H-14
AM27S43
Am29CPL14
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Untitled
Abstract: No abstract text available
Text: in te l CHAPTER 7 FLOATING-POINT UNIT The Intel Architecture Floating-Point Unit FPU provides high-performance floating-point processing capabilities. It supports the real, integer, and BCD-integer data types and the floating point processing algorithms and exception handling architecture defined in the IEEE 754 and
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01fl070fl
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H-14
Abstract: L-13 WF023740 ScansUX971 Am29C325
Text: Am29C325 CMOS 32-Bit Floating-Point Processor ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products,
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Am29C325
32-Bit
32-bit,
16-bit
Am29325
WF023760
WF023790
WF023800
H-14
L-13
WF023740
ScansUX971
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