Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    FIF01 Search Results

    FIF01 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    IC51-1324-828

    Abstract: IDT723622 IDT723632 IDT723642
    Text: IDT723622 IDT723632 IDT723642 CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted


    Original
    IDT723622 IDT723632 IDT723642 IDT723622 IDT723632 IDT723642 83MHz PN120-1) PQ132-1) IC51-1324-828 PDF

    SMD W2T

    Abstract: w2t smd BTS 131 SMD MBA IST DATE SHEET SN54ACT3632
    Text: • fl^bi723 aiiossT ist. ■ SN54ACT3632 512x36x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY _ _ S G B S310-SEPTEM BER 1996 * Free-Running CLKA and CLKB Can Be Asynchronous or Coincident ► Two Independent 512 x 36 Clocked FIFOs


    OCR Scan
    flibi723 D110S21 SN54ACT3632 512x36x2 SGBS310-SEPTEMBER 5962-9562801QYA 132-Pin SMD W2T w2t smd BTS 131 SMD MBA IST DATE SHEET SN54ACT3632 PDF

    free downloadable applications of 8051

    Abstract: 8051 microcontroller pin configuration MMU 8051 USB97C100 8051 register map How keyboard with 8051 works micro sd interface with 8051 with circuit SA10 SA13 SA14
    Text: USB97C100 ADVANCE INFORMATION STANDARD MICROSYSTEMS CORPORATION Multi-Endpoint USB Peripheral Controller FEATURES - • • • • High Performance USB Peripheral C ontroller Engine Integrated USB Transceiver Serial Interface Engine SIE 8051 M icrocontroller (MCU)


    OCR Scan
    USB97C100 USB97C100 free downloadable applications of 8051 8051 microcontroller pin configuration MMU 8051 8051 register map How keyboard with 8051 works micro sd interface with 8051 with circuit SA10 SA13 SA14 PDF

    BO-35

    Abstract: CY7C43622 CY7C43632 CY7C43642 CY7C43662 CY7C43682 BO35 AQ35 bq35
    Text: • CY7C 43622 C Y 7C 43632/C Y 7C 43642 C Y 7C 43662/C Y 7C 43682 ¡o x o w m . m p' rVv^ ' YX xP XR F ^ P R E L IM IN A R Y 256/512/1 K/4K/16K x36 x2 Bidirectional Synchronous FIFO Features F ully as yn ch ro n o u s and sim u ltan eo u s read an d w rite


    OCR Scan
    CY7C43622 CY7C43632/CY7C43642 CY7C43662/CY7C43682 256x36x2 CY7C43622) 512x36x2 CY7C43632) Kx36x2 CY7C43642) 4Kx36x2 BO-35 CY7C43622 CY7C43632 CY7C43642 CY7C43662 CY7C43682 BO35 AQ35 bq35 PDF

    Untitled

    Abstract: No abstract text available
    Text: 3.3 VOLT CMOS SyncBiFlFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024x36x2 Integrated Device Technology, Inc. PRELIMINARY IDT72V3624 IDT72V3634 IDT72V3644 • M aster R eset clears d ata and configures FIFO, Partial R eset clears data but retains configuration settings


    OCR Scan
    024x36x2 IDT72V3624 IDT72V3634 IDT72V3644 128-pin T723624/723634/723644 PK128-1) 72V3624 72V3634 72V3644 PDF

    Untitled

    Abstract: No abstract text available
    Text: | CMOS Bus-Matching SyncFlFO 256 x 36, 512 x 36,1,024 x 36 dt PRELIMINARY ¡DT723633 IDT723643 Integrated D ev ic e Techno logy, Inc. NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES:


    OCR Scan
    DT723633 IDT723643 IDT723623-256 IDT723633-512 T723643-1 MO-136, 2S771 PDF

    Untitled

    Abstract: No abstract text available
    Text: ggSi'x jjûfey CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 IDT723622 ¡DT723642 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation for the IDT723642 FEATURES: • Free-running CLKA and CLKB m ay be asynchronous or


    OCR Scan
    1024x36x2 IDT723622 DT723642 IDT723632 IDT723642 Microprocw20 4A25771 IDT723622/723632/723642 PDF

    Untitled

    Abstract: No abstract text available
    Text: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1,024x36x2 IDT723622 IDT723632 IDT723642 Hhtegiated Devize Technology, lie . NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES: • Free-running C LK A and CLKB may be asynchronous or


    OCR Scan
    256x36x2, 512x36x2, 024x36x2 IDT723622 IDT723632 IDT723642 PDF

    Untitled

    Abstract: No abstract text available
    Text: In te g ra te d D e v i e T e d h n o Jo g y , lie . CMOS Triple Bus SyncFlFO1 With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The May 20 errata describes corrections that have


    OCR Scan
    1024x36x2 IDT723626 IDT723636 IDT723646 18-bit 18-bits PDF

    Untitled

    Abstract: No abstract text available
    Text: CMOS SyncBiFlFO WITH BUS MATCHING AND BYTE SWAPPING 64 x 36 x 2 IDT723614 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted


    OCR Scan
    IDT723614 36-bits 18-bits PDF

    Untitled

    Abstract: No abstract text available
    Text: 3.3 VOLT CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 • Passive parity checking on each Port • Parity Generation can be selected for each Port • Available in 132-pin plastic quad flat package PQF , or space saving 120-pin thin quad flat package (TQFP)


    OCR Scan
    132-pin 120-pin IDT723613 IDT72V3613 83MHz com/docs/PSC4036 com/docs/PSC4021 PDF

    Untitled

    Abstract: No abstract text available
    Text: Integrated Device Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 PRELIMINARY IDT723624 IDT723634 IDT723644 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.


    OCR Scan
    256x36x2, 512x36x2, 024x36x2 IDT723624 IDT723634 IDT723644 2S771 PDF

    Untitled

    Abstract: No abstract text available
    Text: |dy Integrated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2


    OCR Scan
    1024x36x2 IDT723646 IDT723626-256 IDT723636-512 IDT723646-10 36-bit 18-bit IDT723626/723636/723646 PK128-1) PDF

    Untitled

    Abstract: No abstract text available
    Text: Integrated Device TechnoJogy, lie. PRELIMINARY IDT723624 IDT723634 IDT723644 CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.


    OCR Scan
    IDT723624 IDT723634 IDT723644 1024x36x2 PDF

    JDS SB switch

    Abstract: CY7C43644V CY7C43664V CY7C43684V CY7C43664V/CY7C43684V
    Text: CY7C43644V CY7C43664V/CY7C43684V PRELIMINARY CYPRESS 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Features — Ic c = 60 m A , lSB= 12 m A F ully a s yn ch ro n o u s and sim u ltan eo u s read and w rite o p e ratio n p erm itted FWFT Mode, Ptease See Errata Attached


    OCR Scan
    CY7C43644V CY7C43664V/CY7C43684V Kx36x2 CY7C43644V) 4Kx36x2 CY7C43664V) 16Kx36x2 CY7C43684V) 35-micron 67-MHz JDS SB switch CY7C43644V CY7C43664V CY7C43684V CY7C43664V/CY7C43684V PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CY7C43644V CY7C43664V/CY7C43684V 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Features • 3.3V high-speed, low-power, bidirectional, first-in first-out FIFO mem ories w/ bus matching capabilities • 1 Kx36x2 (CY7C43644V)


    OCR Scan
    CY7C43644V CY7C43664V/CY7C43684V 1K/4K/16K Kx36x2 CY7C43644V) 4Kx36x2 CY7C43664V) 16Kx36x2 CY7C43684V) 35-micron PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C43626 CY7C43636/CY7C43646 CY7C43666/CY7C43686 . PRELIMINARY 2 5 6 / 5 1 2 / 1 K /4 K / 1 6 K x 3 6 / x 1 8 x 2 T ri B u s F I F O Fully asynchronous and sim ultaneous read and write operation permitted Mailbox bypass register for each FIFO Parallel and Serial Programmable Almost-Full and Alm ost-Em pty flags


    OCR Scan
    CY7C43626 CY7C43636/CY7C43646 CY7C43666/CY7C43686 128-pin IDT723626/36/46 CY7C43666-12AI 128-Lead CY7C43666-15AC x36/18x2 PDF

    Untitled

    Abstract: No abstract text available
    Text: - ^ n n n > CYPHhbo CY7C43622 CY7C43632/CY7C43642 CY7C43662/CY7C43682 PRELIMINARY = 256/512/1K/4K/16K x36 x2 Bidirectional Synchronous FIFO • F ully a s yn ch ro n o u s and sim u ltan eo u s read and w rite o p e ratio n p erm itted Features • H ig h -s p e ed , low -pow er, b id irec tio n al, First-In First-O ut


    OCR Scan
    CY7C43622 CY7C43632/CY7C43642 CY7C43662/CY7C43682 256/512/1K/4K/16K x36x2 PDF

    fifo asi cypress

    Abstract: No abstract text available
    Text: CY7C43624 CY7C43634/CY7C43644 CY7C43664/CY7C43684 PRELIMINARY CYPRESS 256/512/1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Fully asynchronous and sim ultaneous read and write operation permitted Mailbox bypass register for each FIFO Parallel and Serial Programmable Almost-Full and


    OCR Scan
    CY7C43624 CY7C43634/CY7C43644 CY7C43664/CY7C43684 256/512/1K/4K/16K 128-pin IDT723624/34/44 256x36x2 CY7C43624) fifo asi cypress PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT3632 51 2 x 36 x 2 C L O C K E D B I D I R E C T I O N A L F I RST - I N, F I R S T - O U T M E M O R Y S C A S 224C -JU N E 1 9 9 2 - REVISED SEPTEMBER 1995 F r e e - R u n n i n g C L K A and C L K B Can Be IRB, O R B , AEB , and AFB Flags A s y n c h r o n o u s or C o i n c i d e n t


    OCR Scan
    SN74ACT3632 PDF

    LG 1311

    Abstract: i1652
    Text: TMS320F243, TMS320F241 DSP CONTROLLERS SPRS064B-D EC EM BER 1997-R E V IS E D FEBRUARY 1999 * • High-Performance Static CMOS Technology Includes the T320C2xx Core CPU I • • • • - Object-Compatible With the TMS320C2xx - Source-Code-Compatible With


    OCR Scan
    TMS320F243, TMS320F241 SPRS064B-D 1997-R T320C2xx 16-Bit LG 1311 i1652 PDF

    TMS320C241

    Abstract: 1act0 C241
    Text: TMS320F241, TMS320C241, TMS320C242 DSP CONTROLLERS I • High-Performance Static CMOS Technology • I I I 1 • Includes the T320C2xx Core CPU - Object Compatible With the TMS320C2xx - Source Code Compatible With TMS320C25 - Upwardly Compatible With TMS320C5X


    OCR Scan
    TMS320F241, TMS320C241, TMS320C242 T320C2xx TMS320C2xx TMS320C25 TMS320C5X 50-ns 16-Bit TMS320C241 1act0 C241 PDF

    socket Yamaichi ic51 qfp

    Abstract: AI893 0R 508 9738A
    Text: IDT723622 IDT723632 IDT723642 CM OS Syn cBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 NOTE: T h e r e i s an e r r a ta n o t i c e o n th e l a s t p a g e a n d th e c o r r e c t i o n s h a v e b e e n i n c o r p o r a t e d i n t o t h i s d o c u m e n t .


    OCR Scan
    IDT723622 IDT723632 IDT723642 IDT723622-256 IDT723632-512 IDT723642-- socket Yamaichi ic51 qfp AI893 0R 508 9738A PDF

    CHN 044 VW

    Abstract: NB18
    Text: CMOS SyncBiFIFO with Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 IDT723624 IDT723634 IDT723644 • Port B bus sizing ot 36-bits long word , 18-bits (word) and 9-bits (byte) • Big- or Little-Endian tormat tor word and byte bus sizes • Master Reset clears data and contigures FIFO, Partial


    OCR Scan
    IDT723624-256 IDT723634-512 IDT723644-1 IDT723624 IDT723634 IDT723644 36-bits 18-bits PK128-1 CHN 044 VW NB18 PDF