75ALS126
Abstract: mw137 n75a LS126 SN75129
Text: SN55ALS126, $N75ALS126 QUADRUPLE LINE DRIVERS D2299, FEBRUARY 1 9 8 6 -REVISED OCTOBER 1989 S N 55A LS126. S N 75A LS126 . . . J PACKAGE S N 75A LS126 . . . D OR N PACKAGE Meets IBM 3 6 0 /3 7 0 I/O Interface Specification G A22-6974-3 Also See SN55ALS130 and SN75ALS130
|
OCR Scan
|
PDF
|
SN55ALS126,
N75ALS126
D2299,
A22-6974-3
SN55ALS130
SN75ALS130)
MC3481
LS126.
LS126
75ALS126
mw137
n75a
LS126
SN75129
|
Untitled
Abstract: No abstract text available
Text: TLC339M, TLC339I, TLC339C QUADRUPLE MICROPOWER LinCMOS COMPARATORS D3135, DECEMBER 1986-R EV ISED FEBRUARY 1989 • Very Low Power. . . 200 jjiW Typ at 5 V T LC 339M . . . J PACKAGE TLC339I. TLC339C . . . D. J, OR N PACKAGE • Fast Response Time . . . 2.5 |xs Typ with
|
OCR Scan
|
PDF
|
TLC339M,
TLC339I,
TLC339C
D3135,
1986-R
TLC339M
TLC339I
TLC339C
TLC339
LM339
|
SN75435
Abstract: SN74ls194
Text: SN75435 QUADRUPLE PERIPHERAL DRIVER WITH OUTPUT FAULT PROTECTION SLRS003A- D2848, FEBRUARY 1985 - REVISED NOVEMBER 1989 Saturating Outputs With Low On-State Resistance Very Low Standby Power. . . 53 mW Max High-impedance MOS- or TTL- Compatible Inputs Standard 5-V Supply Voltage
|
OCR Scan
|
PDF
|
SN75435
SLRS003A-
D2848,
600-mA
SN7427
SN74LS194
|
TL054A1
Abstract: TL051 TL051 equivalent diode u1d 315
Text: TL05x, TL05XA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS _ SLOS178 - FEBRUARY 1997 Direct Upgrades to TL07x and TL08x BiFET Operational Amplifiers Faster Slew Rate 20 V/|js Typ Without Increased Power Consumption • •
|
OCR Scan
|
PDF
|
TL05x,
TL05XA,
TL05xY
SLOS178
TL07x
TL08x
TL051
TL05x
TL054A1
TL051 equivalent
diode u1d 315
|
5bti
Abstract: No abstract text available
Text: TPS7133QPW P, TPS713 3Y M IC R O P O W ER LO W -D R O P O U T LD O V O L T A G E R E G U L A T O R S SLVS101A-FEBRUARY 1 9 9 5 - REVISED AUGUST 1995 Thermally Enhanced Surface-Mount Package (PWP) PWP PACKAGE (TOP VIEW) High-Current (500-mA) LDO Regulator
|
OCR Scan
|
PDF
|
TPS7133QPW
TPS713
SLVS101A-FEBRUARY
500-mA)
TPS7133QPWP
5bti
|
PAL16L8 programming specifications
Abstract: TIBPAL16R4 TIBPAL16L8
Text: TIBPAL16L8-20M. TIBPAL16R4 20M, TIBPAL16R6 20M, TIBPAL16R8 20M TIBPAL 16L8-15C, TIBPAL16R4 15C, TIBPAL 16R615C, TIBPAL 16R8 15C HIGH-PERFORMANCE IMPACT PAL CIRCUITS FEBRUARY 1984-REVISED DECEMBER 1987 • High-Performance Operation Propagation Delay M Suffix . . . 20 ns Max
|
OCR Scan
|
PDF
|
TIBPAL16L8-20M.
TIBPAL16R4
TIBPAL16R6
TIBPAL16R8
16L8-15C,
16R615C,
1984-REVISED
PAL16L8A,
PAL16R4A,
PAL16L8 programming specifications
TIBPAL16L8
|
TLC5602
Abstract: 8 bit digital to analog converter
Text: TLC5602 LinEPIC" 8 BIT DIGITAL TO-ANALOG CONVERTER D 3 2 2 4 , FEBRUARY 1989 • 8-Bit Resolution • ± 0 .2 % Linearity • Maxim um Conversion Rate . . . 3 0 MHz Typ 2 0 M Hz Min D U A L-IN -LIN E P AC KAG E {TO P VIE W Analog Output Voltage Range of
|
OCR Scan
|
PDF
|
TLC5602
TLC5602
8 bit digital to analog converter
|
amplifier se592
Abstract: No abstract text available
Text: SE592, NE592, NE592A DIFFERENTIAL VIDEO AMPLIFIERS D2667, FEBRUARY 1 9 8 4 -R E V ISE D FEBRUARY 1988 • 90-MHz Bandwidth NE592, N E592A . . . D O R N P A C K A G E SE592 . . . J P A C K A G E • Adjustable Gain to 400 TOP VIEW • No Frequency Compensation Required
|
OCR Scan
|
PDF
|
SE592,
NE592,
NE592A
D2667,
90-MHz
SE592
NE592
E592A
amplifier se592
|
Untitled
Abstract: No abstract text available
Text: SN75146 DUAL DIFFERENTIAL LINE RECEIVER SLLS0158 - FEBRUARY 1986 - REVISED MAY 1995 D OR P PACKAGE CTOP VIEW Meets or Exceeds the Requirements of ANSI EIA/TIA-422-B and -423-B Meets or Exceeds the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 With External
|
OCR Scan
|
PDF
|
SN75146
SLLS0158
EIA/TIA-422-B
-423-B
EIA/TIA-232-E
pA9637
iA9639
11N--
|
LM311 application notes
Abstract: LM311 LM3111 LM311 OPERATIONAL AMPLIFIER OPERATION lm311 application note LM311 application SLCS007A LM311DBLE 100 khz crystal
Text: LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES SLCS007A- SEPTEMBER 1973 - REVISED FEBRUARY 1992 Fast Response Times LM111 . . . J PACKAGE TOP VIEW Strobe Capability Maximum Input Bias C u rren t. . . 300 nA NC[ 1 EMIT O U T [ 2 Maximum Input Offset C u rren t. . . 70 nA
|
OCR Scan
|
PDF
|
LM111,
LM211,
LM311,
LM311Y
SLCS007A-
LM311
LM111
LM311 application notes
LM311
LM3111
LM311 OPERATIONAL AMPLIFIER OPERATION
lm311 application note
LM311 application
SLCS007A
LM311DBLE
100 khz crystal
|
CT 2048
Abstract: D8228
Text: SN74ACT7203L, SN74ACT7204L, SN74ACT7205L, SN74ACT7206L 2048 x 9,4096 x 9,8192 x 9,16384 x9 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES SCAS226A - FEBRUARY 1993 - REVISED SEPTEMBER 1995 Reads and Writes Can Be Asynchronous or Coincident Organization: - SN74ACT7203L - 2048 x 9
|
OCR Scan
|
PDF
|
SN74ACT7203L,
SN74ACT7204L,
SN74ACT7205L,
SN74ACT7206L
SCAS226A
SN74ACT7203L
SN74ACT7204L
SN74ACT7205L
IDT7203/7204
CT 2048
D8228
|
SN54LV14
Abstract: 2020CN
Text: SN54LV14, SN74LV14 HEX SCHMITT-TRIGGER INVERTERS _ S C L S 1 8 7 B - FEBRUARY 1 9 9 3 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-|i Process SN54LV14 . . . J OR W PACKAGE SN74LV14. . . D, DB, OR PW PACKAGE (TOP VIEW) TVplcal V q l p (Output Ground Bounce)
|
OCR Scan
|
PDF
|
SN54LV14,
SN74LV14
MIL-STD-883C,
JESD-17
300-mll
SN54LV14
2020CN
|
Untitled
Abstract: No abstract text available
Text: SN54LVU04, SN74LVU04 HEX INVERTERS S C L S 1 B 5 B - FEBRUARY 1993 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-n Process Typical V q l p (Output Ground Bounce) < 0.8 V at V c c . Ta = 25°C Typical V q h v (Output V q h Undershoot)
|
OCR Scan
|
PDF
|
SN54LVU04,
SN74LVU04
MIL-STD-883C,
JESD-17
300-mil
|
Untitled
Abstract: No abstract text available
Text: SN54ALVTH16652, SN74ALVTH16652 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCES192 - FEBRUARY 1999 State-of-the-Art Advanced BiCMOS Technology ABT Widebus Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation
|
OCR Scan
|
PDF
|
SN54ALVTH16652,
SN74ALVTH16652
16-BIT
SCES192
|
|
|
F585
Abstract: No abstract text available
Text: February 6, 1997 TIM5964-16L-151 1•RF PERFORMANCE SPECIFICATIONS CHARACTERISTICS Output Pow er at 1dB SYMBOL CONDITION P id B Ta= 25 °C MIN. TYP. MAX. UNIT 41.5 42.5 6.0 7.0 — dBm Com pression Point Pow er G ain at 1dB G id B Com pression Point V d s = 10V
|
OCR Scan
|
PDF
|
TIM5964-16L-151
TIM5964-
16L-151
2-16G1B)
F585
|
Untitled
Abstract: No abstract text available
Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C - FEBRUARY 1993 - REVISED FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Input-Ready, Output-Ready, and Half-Full Flags
|
OCR Scan
|
PDF
|
SN74ACT7881
SCAS227C
SN74ACT7882,
SN74ACT7884,
SN74ACT7811
50-pF
68-Pin
80-Pln
DO-D17
|
Untitled
Abstract: No abstract text available
Text: SN54ABT16501, SN74ABT16501 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS _ SCBS086C - FEBRUARY 1991 - REVISED JANUARY 1997 Members of the Texas Instruments Widebus Family SN54ABT16501 . . . W D PACKAGE SN74ABT16501 . . . DGG OR DL PACKAGE
|
OCR Scan
|
PDF
|
SCBS086C
SN54ABT16501,
SN74ABT16501
18-BIT
SN54ABT16501
SN74ABT16501
MIL-STD-883,
JESD-17
|
Untitled
Abstract: No abstract text available
Text: 54AC 11004, 74AC11004 HEX INVERTERS TI0044— D2957, FEBRUARY 1068— REVISED M ARCH 1990 54AC11004 . . . J PACKAGE 74AC11004 . . . DW OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout TOP VIEW • Center-Pin Vq c and GND Configurations to
|
OCR Scan
|
PDF
|
74AC11004
TI0044--
D2957,
500-mA
300-mil
54AC11004
74AC11004
|
TL598
Abstract: PULSE WIDTH MODULATION CONTROL CIRCUIT
Text: TL59B PULSE WIDTH-MODULATION CONTROL CIRCUIT 0 3 0 2 6 . FEBRUARY 1 9 8 8 -R E V IS E D OCTOBER 1988 Complete PW M Power Control Function • Totem-Pole Outputs for 2 0 0-m A Sink or Source Current • Output Control Selects Parallel or Push-Pull Operation
|
OCR Scan
|
PDF
|
TL59B
TL598
PULSE WIDTH MODULATION CONTROL CIRCUIT
|
LM311
Abstract: ic lm311 circuit diagram LM311 application notes SLCS007A LM311DBLE LM311T LM111 fk package
Text: LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES SLCS007A-SEPTEMBER 1 9 7 3 - REVISED FEBRUARY 1992 LM111 . . . J PACKAGE Fast Response Times TOP VIEW Strobe Capability Maximum Input Bias C u rre n t. . . 300 nA NC[ EMIT O U T [ IN + [ IN -[
|
OCR Scan
|
PDF
|
LM111,
LM211,
LM311,
LM311Y
SLCS007A-SEPTEMBER
LM311
LM111
LM311
ic lm311 circuit diagram
LM311 application notes
SLCS007A
LM311DBLE
LM311T
LM111 fk package
|
d3798
Abstract: ABT16543
Text: SN54ABT16543, SN74ABT16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS087A - D379B, FEBRUARY 1991 - R EVISED O CTO BER 1992 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-llB™ BiCMOS Design Significantly Reduces Power Dissipation
|
OCR Scan
|
PDF
|
SN54ABT16543,
SN74ABT16543
16-BIT
SCBS087A
D379B,
JESD-17
-32-mA
64-mA
300-mil
380-mil
d3798
ABT16543
|
ramdac
Abstract: ramdac 800 600 vga TVP3703
Text: TVP3703 VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC XLAS10 0 - FEBRUARY 1995 • Fully Integrated Dual Clock Synthesizer and 16-Blt Pixel Port True-Color RAMDAC • Functionally Interchangeable with STG1703 Programmable Power-Down Features On-Chip Cyclic Redundancy Check CRC
|
OCR Scan
|
PDF
|
TVP3703
XLAS10
16-Blt
STG1703
ramdac
ramdac 800 600 vga
|
Untitled
Abstract: No abstract text available
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SC LS190P- FEBRUARY 19 9 3 - REVISED JULY 1996 EPIC Enhanced-Performance Implanted CMOS 2-fi Process Typical Vqlp (Output Ground Bounce) < 0.8 V at Vc c , Ta = 25°C SN54LV138. . . J OR W PACKAGE
|
OCR Scan
|
PDF
|
SN54LV138,
SN74LV138
LS190P-
SN54LV138.
SN74LV13S.
MIL-STD-883C,
JESD-17
300-mll
|
TLC371MD
Abstract: No abstract text available
Text: TLC371, TLC371Y LinCMOS DIFFERENTIAL COMPARATORS ^ _SLCSQ17 - JULY 1991 - R EVISED FEBRUARY 1992 • Single or Dual-Supply Operation D OR P PACKAGE TOP VIEW • Wide Range of Supply Voltages 3 V to 16 V IN - [ 2 a ] V DD
|
OCR Scan
|
PDF
|
TLC371,
TLC371Y
SLCSQ17
TLC371
fabLCS017
TLC371MD
|
