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    FAIRCHILD SEMICONDUCTOR 74LS SERIES Search Results

    FAIRCHILD SEMICONDUCTOR 74LS SERIES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPHR7404PU Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 40 V, 0.00074 Ω@10V, SOP Advance, U-MOS-H Visit Toshiba Electronic Devices & Storage Corporation
    MG800FXF1JMS3 Toshiba Electronic Devices & Storage Corporation N-ch SiC MOSFET Module, 3300 V, 800 A, iXPLV, High-side: SiC SBD、Low-side: SiC MOSFET Visit Toshiba Electronic Devices & Storage Corporation
    XPQR8308QB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 80 V, 350 A, 0.00083 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    XPQ1R00AQB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 100 V, 300 A, 0.00103 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    TK190U65Z Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 650 V, 15 A, 0.19 Ohm@10V, TOLL Visit Toshiba Electronic Devices & Storage Corporation

    FAIRCHILD SEMICONDUCTOR 74LS SERIES Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Difference between LS, HC, HCT devices

    Abstract: 74HCT AN-368 difference between HC LS series 74HCT databook 74HC240 ic ttl 74ls HC LS IC difference between 74ls and 74hc ic Cmos 74 HC ttl ls
    Text: Fairchild Semiconductor Application Note 368 March 1984 The 54HC/74HC series of high speed CMOS logic is unique in that it has a sub-family of components, designated 54HCT/74HCT. Generally, when one encounters a 54/74 series number, the following letters designate some speed and


    Original     		PDF 54HC/74HC 54HCT/74HCT. 54LS/74LS Difference between LS, HC, HCT devices 74HCT AN-368 difference between HC LS series 74HCT databook 74HC240 ic ttl 74ls HC LS IC difference between 74ls and 74hc ic Cmos 74 HC ttl ls

    cd4023bcn

    Abstract: No abstract text available
    Text: Revised April 2002 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered


    Original     		PDF CD4023BC CD4023BCM CD4023BC CD4023BCN CD4023BCM CD4023BCMX CD4023BCSJ cd4023bcn

    74xx04

    Abstract: 74XX08 74XX00 74xx151 74xx161 TTL 74XX04 CMOS TTL Logic Family Specifications 74xx139 74als power consumption 74XX374
    Text: Fairchild Semiconductor Application Note 319 June 1983 The MM54HC/MM74HC family of high speed logic components provides a combination of speed and power characteristics that is not duplicated by bipolar logic families or any other CMOS family. This CMOS family has operating speeds


    Original     		PDF MM54HC/MM74HC 54LS/74LS) 54ALS/74ALS 54S/74S CD4000 54C/74C, 74xx04 74XX08 74XX00 74xx151 74xx161 TTL 74XX04 CMOS TTL Logic Family Specifications 74xx139 74als power consumption 74XX374

    CD4011BCN

    Abstract: 74LS series logic gates 3 input or gate CD4011BCM
    Text: Revised March 2002 CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate • Quad 2-Input NAND Buffered B Series Gate General Description Features The CD4001BC and CD4011BC quad gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current


    Original     		PDF CD4001BC/CD4011BC CD4001BC CD4011BC CD4011BCMX CD4011BCN CD4011BCSJ CD4011BCSJX CD4011BCM 74LS series logic gates 3 input or gate CD4011BCM

    internal structure 74LS00 nand gate

    Abstract: MM74HC ic mm74hc IC TTL 74LS00 CD4000 FAIRCHILD MM74HC AN-313 mm74c CMOS TTL Logic Family Specifications CD4000 NAND
    Text: Fairchild Semiconductor Application Note 313 Larry Wakeman April 1998 The input and output characteristics of the MM74HC high-speed CMOS logic family were conceived to meet several basic goals. These goals are to provide input current and voltage requirements, noise immunity and quiescent


    Original     		PDF MM74HC CD4000 MM74C MM74HCT MM74HC internal structure 74LS00 nand gate ic mm74hc IC TTL 74LS00 FAIRCHILD MM74HC AN-313 CMOS TTL Logic Family Specifications CD4000 NAND

    Untitled

    Abstract: No abstract text available
    Text: MM74HC86 Quad 2-Input Exclusive OR Gate Description Features • •    Typical Propagation Delay: 9ns Wide Operating Voltage Range: 2–6V Low Input Current: 1mA Maximum Low Quiescent Current: 20mA Max. 74 Series Output Drive Capability: 10 LS-TTL Loads


    Original     		PDF MM74HC86 MM74HC86

    SOP65P640X110-14M

    Abstract: SOIC127P600X145-14M SOP65P640X110 MTC14REV6
    Text: MM74HC86 Quad 2-Input Exclusive OR Gate Description Features • •    Typical Propagation Delay: 9ns Wide Operating Voltage Range: 2–6V Low Input Current: 1mA Maximum Low Quiescent Current: 20mA Max. 74 Series Output Drive Capability: 10 LS-TTL Loads


    Original     		PDF MM74HC86 MM74HC86 SOP65P640X110-14M SOIC127P600X145-14M SOP65P640X110 MTC14REV6

    54HC390

    Abstract: 54HC139 for 74hc04 CD4000 MM74HC 74hc164 74hc00 equivalent 74HC00 25c74 FAIRCHILD MM74HC
    Text: Fairchild Semiconductor Application Note 317 April 1989 When deciding what circuits to use for a design, speed is most often a very important criteria. MM74HC is intended to offer the same basic speed performance as low power Schottky TTL while giving the designer the low power and


    Original     		PDF MM74HC CD4000 MM54C/MM74C 54HC390 54HC139 for 74hc04 CD4000 74hc164 74hc00 equivalent 74HC00 25c74 FAIRCHILD MM74HC

    74LS

    Abstract: CD4023BC CD4023BCM CD4023BCN CD4023BCS M14B M14D MS-001 MS-013 N14A
    Text: Revised June 1999 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered


    Original     		PDF CD4023BC CD4023BC 74LS CD4023BCM CD4023BCN CD4023BCS M14B M14D MS-001 MS-013 N14A

    74LS

    Abstract: CD4023BC CD4023BCM CD4023BCN CD4023BCSJ M14A M14D MS-001 N14A
    Text: Revised January 2004 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered


    Original     		PDF CD4023BC 74LS CD4023BC CD4023BCM CD4023BCN CD4023BCSJ M14A M14D MS-001 N14A

    74ls gate symbols

    Abstract: 74LS CD4023BC CD4023BCM CD4023BCN CD4023BCS M14A M14D MS-001 N14A
    Text: Revised August 2000 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered


    Original     		PDF CD4023BC 74ls gate symbols 74LS CD4023BC CD4023BCM CD4023BCN CD4023BCS M14A M14D MS-001 N14A

    Untitled

    Abstract: No abstract text available
    Text: Revised April 2002 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered


    Original     		PDF CD4023BC

    74LS

    Abstract: CD4023BC CD4023BCM CD4023BCN CD4023BCSJ M14A M14D MS-001 N14A CD4023
    Text: Revised April 2002 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered


    Original     		PDF CD4023BC 74LS CD4023BC CD4023BCM CD4023BCN CD4023BCSJ M14A M14D MS-001 N14A CD4023

    74als power consumption

    Abstract: 74AS TTL SERIES 74AS 74AS Characteristics AN-476 Complete for 74LS family 74AS SERIES pnp transistor 1000v 74AS fan-out 74ls series logic family
    Text: Fairchild Semiconductor Application Note 476 March 1995 INTRODUCTION Since the introduction of the first bipolar Transistor-Transistor Logic TTL family (DM54/74), system designers have wanted more speed, less power consumption, or a combination of the two attributes. These requirements have spawned other logic families such as the DM54/


    Original     		PDF DM54/74) DM54/ DM54/74LS 74als power consumption 74AS TTL SERIES 74AS 74AS Characteristics AN-476 Complete for 74LS family 74AS SERIES pnp transistor 1000v 74AS fan-out 74ls series logic family

    CD4011

    Abstract: CD4001BCN CD4011BC CD4001BCM 74LS CD4001BC CD4001BCSJ CD4011BCM CD4011BCN M14A
    Text: Revised January 1999 CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate • Quad 2-Input NAND Buffered B Series Gate General Description Features The CD4001BC and CD4011BC quad gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current


    Original     		PDF CD4001BC/CD4011BC CD4001BC CD4011BC CD4011 CD4001BCN CD4001BCM 74LS CD4001BCSJ CD4011BCM CD4011BCN M14A

    CD4011BCN

    Abstract: CD4011BCM CD4001BCN CD4011BC CD4001BCM 74LS CD4001BC CD4001BCSJ M14A cd4011
    Text: Revised March 2002 CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate • Quad 2-Input NAND Buffered B Series Gate General Description Features The CD4001BC and CD4011BC quad gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current


    Original     		PDF CD4001BC/CD4011BC CD4001BC CD4011BC CD4001BC/CD4011BC CD4011BCN CD4011BCM CD4001BCN CD4001BCM 74LS CD4001BCSJ M14A cd4011

    CD4071

    Abstract: Buffered CD4081BC CD4081BCN 74LS CD4071BC CD4071BCM CD4071BCN CD4081BCM M14A
    Text: Revised January 1999 CD4071BC • CD4081BC Quad 2-Input OR Buffered B Series Gate • Quad 2-Input AND Buffered B Series Gate General Description Features The CD4071BC and CD4081BC quad gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current


    Original     		PDF CD4071BC CD4081BC CD4071BC CD4081BC CD4071 Buffered CD4081BCN 74LS CD4071BCM CD4071BCN CD4081BCM M14A

    Untitled

    Abstract: No abstract text available
    Text: MM74HC595 8-Bit Shift Register with Output Latches Features Description ̇ Low Quiescent current: 80µA Maximum 74HC Series ̇ ̇ Low Input Current: 1µA Maximum The MM74HC595 high-speed shift register utilizes advanced silicon-gate CMOS technology. This device


    Original     		PDF MM74HC595 MM74HC595 30MHz

    MM74HC595N

    Abstract: Fairchild Semiconductor technology 74HC 74LS MM74HC595 MM74HC595M MM74HC595MTC MM74HC595MTCX MM74HC595MX MM74HC595SJ
    Text: MM74HC595 8-Bit Shift Register with Output Latches Features Description ƒ Low Quiescent current: 80µA Maximum 74HC Series ƒ ƒ Low Input Current: 1µA Maximum The MM74HC595 high-speed shift register utilizes advanced silicon-gate CMOS technology. This device


    Original     		PDF MM74HC595 30MHz MM74HC595 MM74HC595N Fairchild Semiconductor technology 74HC 74LS MM74HC595M MM74HC595MTC MM74HC595MTCX MM74HC595MX MM74HC595SJ

    74HC

    Abstract: MM54HC MM54HC00 MM74HC MM74HC00 MM54HC00J
    Text: MM74HC00 Quad 2-Input NAND Gate General Description Features These NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs. All devices


    Original     		PDF MM74HC00 54HC/74HC 54LS/74LS 74HC MM54HC MM54HC00 MM74HC MM74HC00 MM54HC00J

    74HC

    Abstract: M14A MM74HC02 MM74HC02M MM74HC02MTC MM74HC02N MTC14 N14A
    Text: MM74HC02 Quad 2-Input NOR Gate General Description Features These NOR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs, providing


    Original     		PDF MM74HC02 54LS/74LS 74HC M14A MM74HC02 MM74HC02M MM74HC02MTC MM74HC02N MTC14 N14A

    74LS670N

    Abstract: No abstract text available
    Text: SEMICONDUCTOR t m DM74LS670 3-STATE 4-by-4 Register Files and the read tim e 24 ns typical . The register file has a non-volatile readout in th a t data is not lost w hen addressed. General Description These register files are organized as 4 w ords of 4 bits each,


    OCR Scan     		PDF DM74LS670 74LS670N

    74LS109AN

    Abstract: 12111 74ls109am
    Text: I R C H I I - D EM I C O N D U C T O R T General Description This device contains tw o independent positive-edge-triggered J-K flip-flops w ith com plem entary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a v o lt­


    OCR Scan     		PDF DM74LS109A DM74LS109A 74LS109AN 12111 74ls109am

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS670 3-STATE 4-by-4 Register Files and the read tim e 24 ns typical . The register file has a non-volatile readout in that data is not lost w hen addressed. General Description These register files are organized as 4 w ords of 4 bits each,


    OCR Scan     		PDF DM74LS670