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    933HM/B Rochester Electronics LLC 933H - Dual Four Input Expander Visit Rochester Electronics LLC Buy
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    SF Impression Pixel

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    Pilz International PNOZ M0P BASE UNIT NOT EXPANDABLE (ALTERNATE: 773 110)

    Safety Controller Base Unit, 3-6 Safety Functions, 6 SO, 24 VDC, PNOZ Series | Pilz PNOZ M0P BASE UNIT NOT EXPANDABLE
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    Glenair Inc 103-026-008

    Spiral Wraps, Sleeves, Tubing & Conduit ArmorStrand .250 ID Braided Shield
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    Glenair Inc 103-026-016

    Spiral Wraps, Sleeves, Tubing & Conduit AMBERSTRAND 0.500" BRAID
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    Panduit Corp 07498320237

    Spiral Wraps, Sleeves, Tubing & Conduit EXP SLV BLK 1/4 200' ROLL
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    TTI 07498320237 Spool 114 1
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    Panduit Corp 07498320249

    Spiral Wraps, Sleeves, Tubing & Conduit SLEEVING EXPD 200'
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    EXPANDABLE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MIL-I-631

    Abstract: AMS-DTL-23053 D570 D638
    Text: Alpha Wire | 711 Lidgerwood Avenue, Elizabeth, NJ 07207 Tel: 1-800-52 ALPHA 25742 , Web: www.alphawire.com Customer Specification PART NO. GRP110NF1/8 Construction 1) Tubing Type Expandable Sleeving 2) Tubing Material Braided Polyethelene Terephthalate 3) Minimum Supplied ID(In)


    Original     		PDF GRP110NF1/8 MIL-I-631 2002/95/EC MIL-I-631 AMS-DTL-23053 D570 D638

    PC13

    Abstract: S3P72B9 SAM47 C72B
    Text: S3C72B5/C72B7/C72B9/P72B9 1 PRODUCT OVERVIEW PRODUCT OVERVIEW OVERVIEW The S3C72B5/C72B7/C72B9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 Samsung Arrangeable Microcontrollers . With an up-to-1280-dot LCD direct drive capability, segment expandable circuit, 8-bit and 16-bit timer/counter,


    Original     		PDF S3C72B5/C72B7/C72B9/P72B9 S3C72B5/C72B7/C72B9 SAM47 up-to-1280-dot 16-bit 128-pin 1001B, 0011B" PC13 S3P72B9 SAM47 C72B

    MVME5110

    Abstract: MVME51105E-2263 MVME5100 MVME51105E-2161 MVME51105E-2163 MVME5107-2163 MVME51105E-2261 IPMC7616E-002 MVME51005E-0161 SCANBE ejector
    Text: D ATA S H E E T MPC7410, MPC750 or MPC755 microprocessor with 32KB/32KB L1 cache Up to 2MB of secondary backside cache 100 MHz frontside bus Up to 512MB of on-board ECC SDRAM – expandable up to 1GB with optional RAM500 memory expansion modules 17MB flash memory


    Original     		PDF MPC7410, MPC750 MPC755 32KB/32KB 512MB RAM500 P1386 32/64-bit MVME5100 264MB/s MVME5110 MVME51105E-2263 MVME51105E-2161 MVME51105E-2163 MVME5107-2163 MVME51105E-2261 IPMC7616E-002 MVME51005E-0161 SCANBE ejector

    FCT521

    Abstract: 54FCT521
    Text: 54FCT521 8-Bit Identity Comparator General Description Features The ’FCT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.


    Original     		PDF 54FCT521 FCT521 DS100968-1 DS100968-2 DS100968-4 DS100968-3 54FCT521

    F 9324

    Abstract: DM9324 9324DMQB 9324FMQB C1995 DM9324N J16A N16E W16A 9792
    Text: 9324 DM9324 5-Bit Comparator General Description The 9324 expandable comparators provide comparison between two 5-bit words and give three outputs ‘‘less than’’ ‘‘greater than’’ and ‘‘equal to’’ A HIGH on the active LOW Enable Input forces all three outputs LOW


    Original     		PDF DM9324 9324DMQB 9324FMQB DM9324N C1995 RRD-B30M115 F 9324 DM9324N J16A N16E W16A 9792

    A115-A

    Abstract: C101 PCA9518 PCA9518DBQR PCA9518DBR
    Text: PCA9518 EXPANDABLE FIVE-CHANNEL I2C HUB www.ti.com SCPS132A – JUNE 2006 – REVISED JULY 2007 FEATURES • • • • • • • • • Expandable Five-Channel Bidirectional Buffer 400-kHz Fast I2C Bus Operating VCC Range of 3 V to 3.6 V 5-V Tolerant I2C and Enable Input Pins to


    Original     		PDF PCA9518 SCPS132A 400-kHz 000-V A114-A) A115-A) 1000-om A115-A C101 PCA9518 PCA9518DBQR PCA9518DBR

    1030J6C

    Abstract: C1030B TDC1030B6C 1030J6A
    Text: m m m T D C 1 0 3 0 M First-In First-Out Memory 64 Words by 9 Bits Cascadable T he T R W T D C 1 0 3 0 is an expandable, First-In First-Out FIFO m em ory organized as 64 w o rd s by 9 bits. A 1 5 M H z data rate m akes it ideal in high-speed ap p li­ cations. Bu rst data rates of 18MFHz can be obtained in


    OCR Scan     		PDF 18MFHz 1030J6C C1030B TDC1030B6C 1030J6A

    Binary Multipliers

    Abstract: TTL 7428 SN54285/74285
    Text: SN54284, SN54285, SN74284, SN74285 BIT BY 4-BIT PARALLEL BINARY MULTIPLIERS MAY 1972 - REVISED MARCH 1988 • Fast Multiplication of Two Binary Numbers 8-Bit Product in 40 ns Typical • Expandable for N-Bit-by-n-Bit Applications: 16-Bit Product in 70 ns Typical


    OCR Scan     		PDF SN54284, SN54285, SN74284, SN74285 16-Bit 32-Bit SN54285 Binary Multipliers TTL 7428 SN54285/74285

    8085 pin diagram

    Abstract: No abstract text available
    Text: J> SöböMSb m n ilII I W MATRA m GQGGTTS bll Novem ber 1990 M H S M8259 DATA SHEET_ PROGRAMMABLE INTERRUPT CONTROLLER FEATURES . 8085,8086,8088 COMPATIBLE . EIGHT-LEVEL PRIORITY CONTROLLER . EXPANDABLE TO 64 LEVELS . PROGRAMMABLE INTERRUPT MODES FULLY


    OCR Scan     		PDF M8259 CAS01 CAS02 DDD1Q13 8085 pin diagram

    CY7C028-15AI

    Abstract: WH15 CY7C027 CY7C028 CY7C037 CY7C038 IDT7027
    Text: CY7C027/028 CY7C037/038 PRELIMINARY 32K/64K x 16/18 Dual-Port Static RAM Fully asynchronous operation Automatic power-down Expandable data bus to 32/36 bits or more using Mas­ ter/Slave chip select when using more than one device On-chip arbitration logic


    OCR Scan     		PDF CY7C027/028 CY7C037/038 CY7C027) CY7C028) CY7C037) CY7C038) 35-micron 32K/64K CY7C028-15AI WH15 CY7C027 CY7C028 CY7C037 CY7C038 IDT7027

    8086 interrupt structure

    Abstract: 8080a 8086 microcomputer LR2 D 80286 address decoder 80286 microprocessor pin out diagram 8086 interrupt vector table 8086 interrupts application 8086 logic diagram 8086 timing diagram
    Text: 82C59A 82C 59A CMOS Programmable Interrupt Controller ¡APX86 Family DISTINCTIVE CHARACTERISTICS • • • • • • • Pin C om patible with NMOS 8259A Expandable to 64 Levels Eight Level Priority Controller Individual Request Mask Capability Programmable Interrupt Modes


    OCR Scan     		PDF 82C59A APX86 82C59A 6102A 8086 interrupt structure 8080a 8086 microcomputer LR2 D 80286 address decoder 80286 microprocessor pin out diagram 8086 interrupt vector table 8086 interrupts application 8086 logic diagram 8086 timing diagram

    FX403Q

    Abstract: FX003 FX403 FX403-Q FX503 wn transistor
    Text: FX403-Q QTC ADDRESS &DATA ENCODER DECODER * N-DIGI T HSC ADDRESS DECODING DECODES SUFFIX INSTRUCTION CODES * GROUP AND ALL-CALL DECODING CODED BLEEP AND AUDIO MUTE OUTPUTS * EXPANDABLE CODE-ROM ADDRESSING ENCODES N - D IGIT ADDRESS /DATA CODES * L O W POWER CMOS PROCESS


    OCR Scan     		PDF FX403-Q FX403Q FX-003 237437b FX003 FX403 FX403-Q FX503 wn transistor

    F10166

    Abstract: F10566
    Text: F10166^ F10566 5-BIT COMPARATOR F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10166/F10566 are high-speed expandable 5-Bit Comparators for comparing the magnitude of two binary words. Two outputs are provided: A>B and A<B. A = B can be obtained by NORing the two outputs with an additional gate. A HIGH level on the


    OCR Scan     		PDF F10166^ F10566^ F10166/F10566 F10166S F10166 F10566

    Untitled

    Abstract: No abstract text available
    Text: 67C4502-35/50/65/80 a Deep First-in First-out FIFO 1024x9 C M O S Memory o> O .u cn DISTINCTIVE CHARACTERISTICS M Retransmit capability Expandable in both width an djtepth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry


    OCR Scan     		PDF 67C4502-35/50/65/80 1024x9 67C4502

    74ACT461

    Abstract: PAL20X8 8bit synchronous counter
    Text: Zero Power CMOS Hard Array Logic ZHAL"24A Series ZHAL24A Evaluation #4 Features/Benefits Logic Symbol • Demonstration pattern tor Z H A L24A Series ZHAL20X8A • 8-blt counter • Three-state output ZHAL20X8A • Expandable in 8-blt increments • Equivalent to 74ACT461


    OCR Scan     		PDF ZHAL24A ZHAL20X8A) 74ACT461 ZHAL20X8A PAL20X8 8bit synchronous counter

    Z80 FIO

    Abstract: Z8038
    Text: Z8038 FIO; Z8038(F!0 128 Byte FIFO I/O Port DISTINCTIVE CHARACTERISTICS Asynchronous FIFO Interface — 128-byte FIFO provides bidirectional CPU to CPU or peripheral interface. Expandable In Length and Width — FlOs can be connected in parallel for wider words,


    OCR Scan     		PDF Z8038 128-byte IEEE488. Z8038* Z80 FIO

    Untitled

    Abstract: No abstract text available
    Text: r h o le x FEATURES • The expandable elastomer diaphragm has NEMA 4X sealing and adapts to a wide range of cable diameters ■ The Stainless Steel strain relief spring has an extraordi­ nary strain relief without the use of tools or hardware Spirit cable back shells achieve extraordinary sealing and


    OCR Scan     		PDF accomp51-60B3

    am2764

    Abstract: No abstract text available
    Text: 6086ZUIV/9086ZUJV Am29806/Am29809 6-Bit Chip Select Decoder 9-Bit Equal-to-Comparator DISTINCTIVE CHARACTERISTICS • • High-speed, expandable, 9-bit "equal-to" comparator Am29809 High-speed comparator with chip select decoder (Am29806) Multibus compatible, open-collector acknowledge


    OCR Scan     		PDF 6086ZUIV/9086ZUJV Am29806/Am29809 Am29809 Am29806 IC000010 03424B am2764

    HR04

    Abstract: 67C4033
    Text: 67C 4033 First-In First-Out FIFO 64x5 Memory 1 0 /1 5 MHz (Cascadable) CMOS Features • Zero standby power Orderinfg Inform ation PART NUMBER PKG TEMP DESCRIPTION • TTL-compatible Inputs and outputs 67C4033-10 N,J,NL Com 10 MHz in/out • Readily expandable In word width and depth


    OCR Scan     		PDF 15-MHz 67C4033-10 67C4033-15 67C4033 67G4033 87C4033-15 HR04 67C4033

    Untitled

    Abstract: No abstract text available
    Text: 67C4503-35/50/65/80 Deep First-in First-out FIFO 2048x9 C M O S Memory DISTINCTIVE CHARACTERISTICS Retransmit capability Expandable in both width an djlepth Increased noise immunity for XI-CMOS threshold RAM based FIFO 2048x9 organization Cycle tim es of 45/65/80/100 nanoseconds


    OCR Scan     		PDF 67C4503-35/50/65/80 2048x9 67C4503

    Untitled

    Abstract: No abstract text available
    Text: m o le x * 12.30mm .484" Pitch COMPODRE Wire-to-Wire, Wire-to-Board Pod, Plug and Receptacle Features and Benefits Electrical • Fully customizable and expandable to meet your application needs ■ One connector system to meet both your power and signal needs


    OCR Scan     		PDF PS-43510-001 PS-5556-001 E29179 LR19980

    74s482

    Abstract: 74S48 54S482
    Text: TYPES SN54S482, SN74S482 4-BIT-SLICE EXPANDABLE CONTROL ELEMENTS D 211 2, M A R C H 1976 - R E V I S E D O C T O B E R 1980 • 4-Bit Slice is Cascadable to N-Bits SN 54S482 . . . J P A C K A G E SN 74S482 . . . J O R N P A C K A G E TO P V IE W • Designed Specifically for Microcontroller/


    OCR Scan     		PDF SN54S482, SN74S482 20-Pin 300-Mil 54S482 74S482 SN54S482 74S48 54S482

    Untitled

    Abstract: No abstract text available
    Text: 32K/64K X 9 CMOS PARALLEL IN-OUT FIFO MODULE FEATURES: First-In/First-Out memory module 64K x 9 IDT7M208 or 32K x 9 (IDT7M207) High speed: 20ns (max.) access time Asynchronous and sim ultaneous read and write Fully expandable: depth and/or width MASTER/SLAVE multiprocessing applications


    OCR Scan     		PDF 32K/64K IDT7M208) IDT7M207) IDT7M207 IDT7M208 IDT7205 IDT7206 IDT7205/6S IDT7205 IDT7206

    Untitled

    Abstract: No abstract text available
    Text: i" &;< CMOS PARALLEL SyncFIFO CLOCKED FIFO 5 1 2 X 18-BIT & 1024 X 18-BIT FEATURES • • • • • 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write cycle time Easily expandable in width Read and write clocks can be independent or coincident


    OCR Scan     		PDF 18-BIT 18-bit 68-lead IDT72215L/72225L 72215LB/72225LB